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objdump.c: Fix coding for DISASSEMBLER_NEEDS_RELOC:
(struct objdump_disasm_info): Add 'reloc' field. (disassemble_bytes): Fix check for when an insn has a reloc associated with it. Improve comment explaining why the use of octets is wrong. Set the 'reloc' field in objdump_disasm_info structure. (objdump_print_addr): Use new 'reloc' field to lookup the correct address for the symbol associated with the current instruction's relocation. (disassemble_info): Initialise 'reloc' field. gas/arm/inst.d: Allow for ARM ports which decode the reloc associated with branches and so show the exact symbolic destination address rather than an offset from the start of the section. gas/arm/pic.d: Likewise.
This commit is contained in:
Nick Clifton
parent
b15c27d7c1
commit
ce04548af9
@ -1,3 +1,17 @@
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2005-03-01 Stig Petter Olsroed <stigpo@users.sourceforge.net>
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Nick Clifton <nickc@redhat.com>
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* objdump.c: Fix coding for DISASSEMBLER_NEEDS_RELOC:
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(struct objdump_disasm_info): Add 'reloc' field.
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(disassemble_bytes): Fix check for when an insn has a reloc
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associated with it. Improve comment explaining why the use of
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octets is wrong. Set the 'reloc' field in objdump_disasm_info
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structure.
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(objdump_print_addr): Use new 'reloc' field to lookup the correct
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address for the symbol associated with the current instruction's
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relocation.
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(disassemble_info): Initialise 'reloc' field.
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2005-02-28 Jakub Jelinek <jakub@redhat.com>
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* readelf.c (get_file_type, get_machine_name, get_osabi_name,
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@ -128,6 +128,9 @@ struct objdump_disasm_info
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arelent ** dynrelbuf;
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long dynrelcount;
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disassembler_ftype disassemble_fn;
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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arelent * reloc;
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#endif
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};
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/* Architecture to disassemble for, or default if NULL. */
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@ -852,6 +855,9 @@ objdump_print_addr (bfd_vma vma,
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{
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struct objdump_disasm_info *aux;
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asymbol *sym;
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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bfd_boolean skip_find = FALSE;
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#endif
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if (sorted_symcount < 1)
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{
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@ -861,7 +867,25 @@ objdump_print_addr (bfd_vma vma,
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}
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aux = (struct objdump_disasm_info *) info->application_data;
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sym = find_symbol_for_address (vma, info, NULL);
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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if (aux->reloc != NULL
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&& aux->reloc->sym_ptr_ptr != NULL
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&& * aux->reloc->sym_ptr_ptr != NULL)
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{
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sym = * aux->reloc->sym_ptr_ptr;
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/* Adjust the vma to the reloc. */
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vma += bfd_asymbol_value (sym);
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if (bfd_is_und_section (bfd_get_section (sym)))
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skip_find = TRUE;
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}
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if (!skip_find)
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#endif
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sym = find_symbol_for_address (vma, info, NULL);
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objdump_print_addr_with_sym (aux->abfd, aux->sec, sym, vma, info,
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skip_zeroes);
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}
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@ -1238,6 +1262,7 @@ disassemble_bytes (struct disassemble_info * info,
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unsigned int opb = info->octets_per_byte;
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unsigned int skip_zeroes = info->skip_zeroes;
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unsigned int skip_zeroes_at_end = info->skip_zeroes_at_end;
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int octets = opb;
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SFILE sfile;
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aux = (struct objdump_disasm_info *) info->application_data;
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@ -1282,8 +1307,14 @@ disassemble_bytes (struct disassemble_info * info,
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while (addr_offset < stop_offset)
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{
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bfd_vma z;
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int octets = 0;
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bfd_boolean need_nl = FALSE;
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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int previous_octets;
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/* Remember the length of the previous instruction. */
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previous_octets = octets;
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#endif
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octets = 0;
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/* If we see more than SKIP_ZEROES octets of zeroes, we just
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print `...'. */
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@ -1348,19 +1379,40 @@ disassemble_bytes (struct disassemble_info * info,
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info->stream = (FILE *) &sfile;
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info->bytes_per_line = 0;
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info->bytes_per_chunk = 0;
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info->flags = 0;
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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/* FIXME: This is wrong. It tests the number of octets
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in the last instruction, not the current one. */
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if (*relppp < relppend
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&& (**relppp)->address >= rel_offset + addr_offset
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&& ((**relppp)->address
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< rel_offset + addr_offset + octets / opb))
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info->flags = INSN_HAS_RELOC;
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else
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#endif
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info->flags = 0;
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if (*relppp < relppend)
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{
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bfd_signed_vma distance_to_rel;
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distance_to_rel = (**relppp)->address
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- (rel_offset + addr_offset);
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/* Check to see if the current reloc is associated with
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the instruction that we are about to disassemble. */
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if (distance_to_rel == 0
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/* FIXME: This is wrong. We are trying to catch
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relocs that are addressed part way through the
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current instruction, as might happen with a packed
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VLIW instruction. Unfortunately we do not know the
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length of the current instruction since we have not
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disassembled it yet. Instead we take a guess based
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upon the length of the previous instruction. The
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proper solution is to have a new target-specific
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disassembler function which just returns the length
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of an instruction at a given address without trying
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to display its disassembly. */
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|| (distance_to_rel > 0
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&& distance_to_rel < (bfd_signed_vma) (previous_octets/ opb)))
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{
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info->flags = INSN_HAS_RELOC;
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aux->reloc = **relppp;
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}
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else
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aux->reloc = NULL;
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}
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#endif
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octets = (*disassemble_fn) (section->vma + addr_offset, info);
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info->fprintf_func = (fprintf_ftype) fprintf;
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info->stream = stdout;
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@ -1817,6 +1869,9 @@ disassemble_data (bfd *abfd)
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aux.require_sec = FALSE;
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aux.dynrelbuf = NULL;
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aux.dynrelcount = 0;
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#ifdef DISASSEMBLER_NEEDS_RELOCS
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aux.reloc = NULL;
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#endif
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disasm_info.print_address_func = objdump_print_address;
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disasm_info.symbol_at_address_func = objdump_symbol_at_address;
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@ -1,3 +1,12 @@
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2005-03-01 Stig Petter Olsroed <stigpo@users.sourceforge.net>
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Nick Clifton <nickc@redhat.com>
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* gas/arm/inst.d: Allow for ARM ports which decode the reloc
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associated with branches and so show the exact symbolic
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destination address rather than an offset from the start of the
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section.
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* gas/arm/pic.d: Likewise.
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2005-03-01 Alan Modra <amodra@bigpond.net.au>
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* gas/m68k/mcf-emac.d: Allow for 64-bit addresses.
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@ -159,13 +159,13 @@ Disassembly of section .text:
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0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
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0+258 <[^>]*> ef123456 ? swi 0x00123456
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0+25c <[^>]*> 2f000033 ? swics 0x00000033
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0+260 <[^>]*> ebfffffe ? bl 0+260 <[^>]*>
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0+260 <[^>]*> ebfffffe ? bl 0[0123456789abcdef]+ <[^>]*>
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[ ]*260:.*_wombat.*
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0+264 <[^>]*> 5bfffffe ? blpl 0+264 <[^>]*>
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0+264 <[^>]*> 5bfffffe ? blpl 0[0123456789abcdef]+ <[^>]*>
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[ ]*264:.*ARM.*hohum
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0+268 <[^>]*> eafffffe ? b 0+268 <[^>]*>
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0+268 <[^>]*> eafffffe ? b 0[0123456789abcdef]+ <[^>]*>
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[ ]*268:.*_wibble.*
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0+26c <[^>]*> dafffffe ? ble 0+26c <[^>]*>
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0+26c <[^>]*> dafffffe ? ble 0[0123456789abcdef]+ <[^>]*>
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[ ]*26c:.*testerfunc.*
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0+270 <[^>]*> e1a01102 ? mov r1, r2, lsl #2
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0+274 <[^>]*> e1a01002 ? mov r1, r2
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@ -8,7 +8,7 @@
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Disassembly of section .text:
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00+0 <[^>]*> ebfffffe bl 00+0 <[^>]*>
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0: R_ARM_PC24 foo
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00+4 <[^>]*> ebfffffe bl 00+4 <[^>]*>
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00+4 <[^>]*> ebfffffe bl 0[0123456789abcdef]+ <[^>]*>
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4: R_ARM_PLT32 foo
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\.\.\.
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8: R_ARM_ABS32 sym
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