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Fix bugs in the disassembly of some ld-instructions

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This commit is contained in:
Arnold Metselaar 2008-09-14 08:38:02 +00:00
parent 06e476f547
commit d04117369b
2 changed files with 10 additions and 1 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
* z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
(tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
2008-09-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].

6
opcodes/z80-dis.c
View File

@ -128,8 +128,10 @@ static int
prt_rr_nn (struct buffer *buf, disassemble_info * info, char *txt)
{
char mytxt[TXTSIZ];
int rr;
snprintf (mytxt, TXTSIZ, txt, rr_str[(buf->data[0] >> 4) & 3]);
rr = (buf->data[buf->n_fetch - 1] >> 4) & 3;
snprintf (mytxt, TXTSIZ, txt, rr_str[rr]);
return prt_nn (buf, info, mytxt);
}
@ -297,9 +299,11 @@ struct tab_elt opc_ed[] =
{ 0x4A, 0xCF, prt_rr, "adc hl," },
{ 0x4B, 0xCF, prt_rr_nn, "ld %s,(0x%%04x)" },
{ 0x4D, 0xFF, prt, "reti" },
{ 0x4F, 0xFF, prt, "ld r,a" },
{ 0x56, 0xFF, prt, "im 1" },
{ 0x57, 0xFF, prt, "ld a,i" },
{ 0x5E, 0xFF, prt, "im 2" },
{ 0x5F, 0xFF, prt, "ld a,r" },
{ 0x67, 0xFF, prt, "rrd" },
{ 0x6F, 0xFF, prt, "rld" },
{ 0xA0, 0xE4, cis, "" },