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* read.c (emit_expr_fix): Handle size 3.

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* config/tc-avr.c (md_assemble): Call dwarf2_emit_insn.
	* config/tc-d30v.c (write_long, write_1_short,
	write_2_short, md_assemble): Likewise.
	* config/tc-dlx.c (md_assemble): Likewise.
	* config/tc-i860.c (md_assemble): Likewise.
	* config/tc-mn10200.c (md_assemble): Likewise.
	* config/tc-pj.c (md_assemble): Likewise.
	* config/tc-vax.c (md_assemble): Likewise.
This commit is contained in:
Alan Modra 2009-09-08 10:36:39 +00:00
parent 6e5e57c9e6
commit d4f4f3fb2b
9 changed files with 29 additions and 1 deletions
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12
gas/ChangeLog
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@ -1,3 +1,15 @@
2009-09-08 Alan Modra <amodra@bigpond.net.au>
* read.c (emit_expr_fix): Handle size 3.
* config/tc-avr.c (md_assemble): Call dwarf2_emit_insn.
* config/tc-d30v.c (write_long, write_1_short,
write_2_short, md_assemble): Likewise.
* config/tc-dlx.c (md_assemble): Likewise.
* config/tc-i860.c (md_assemble): Likewise.
* config/tc-mn10200.c (md_assemble): Likewise.
* config/tc-pj.c (md_assemble): Likewise.
* config/tc-vax.c (md_assemble): Likewise.
2009-09-07 Daniel Gutson <dgutson@codesourcery.com>
* config/tc-arm.c (arm_cpus): cortex-r4f CPU added.

2
gas/config/tc-avr.c
View File

@ -1366,6 +1366,8 @@ md_assemble (char *str)
if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
dwarf2_emit_insn (0);
/* We used to set input_line_pointer to the result of get_operands,
but that is wrong. Our caller assumes we don't change it. */
{

5
gas/config/tc-d30v.c
View File

@ -23,6 +23,7 @@
#include "safe-ctype.h"
#include "subsegs.h"
#include "opcode/d30v.h"
#include "dwarf2dbg.h"
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
@ -593,6 +594,7 @@ write_long (struct d30v_insn *opcode ATTRIBUTE_UNUSED,
int i, where;
char *f = frag_more (8);
dwarf2_emit_insn (8);
insn |= FM11;
d30v_number_to_chars (f, insn, 8);
@ -620,6 +622,7 @@ write_1_short (struct d30v_insn *opcode,
char *f = frag_more (8);
int i, where;
dwarf2_emit_insn (8);
if (warn_nops == NOP_ALL)
as_warn (_("%s NOP inserted"), use_sequential ?
_("sequential") : _("parallel"));
@ -1087,6 +1090,7 @@ write_2_short (struct d30v_insn *opcode1,
}
f = frag_more (8);
dwarf2_emit_insn (8);
d30v_number_to_chars (f, insn, 8);
/* If the previous instruction was a 32-bit multiply but it is put into a
@ -1684,6 +1688,7 @@ md_assemble (char *str)
else
{
f = frag_more (8);
dwarf2_emit_insn (8);
d30v_number_to_chars (f, NOP2, 8);
if (warn_nops == NOP_ALL || warn_nops == NOP_MULTIPLY)

2
gas/config/tc-dlx.c
View File

@ -909,6 +909,8 @@ md_assemble (char *str)
know (str);
machine_ip (str);
toP = frag_more (4);
dwarf2_emit_insn (4);
/* Put out the opcode. */
md_number_to_chars (toP, the_insn.opcode, 4);

1
gas/config/tc-i860.c
View File

@ -408,6 +408,7 @@ md_assemble (char *str)
as_warn (_("An instruction was expanded (%s)"), str);
}
dwarf2_emit_insn (0);
i = 0;
do
{

3
gas/config/tc-mn10200.c
View File

@ -1,6 +1,6 @@
/* tc-mn10200.c -- Assembler code for the Matsushita 10200
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
2005, 2006, 2007 Free Software Foundation, Inc.
2005, 2006, 2007, 2009 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -1156,6 +1156,7 @@ keep_going:
abort ();
/* Write out the instruction. */
dwarf2_emit_insn (0);
if (relaxable && fc > 0)
{
/* On a 64-bit host the size of an 'int' is not the same

1
gas/config/tc-pj.c
View File

@ -261,6 +261,7 @@ md_assemble (char *str)
return;
}
dwarf2_emit_insn (0);
if (opcode->opcode == -1)
{
/* It's a fake opcode. Dig out the args and pretend that was

1
gas/config/tc-vax.c
View File

@ -2713,6 +2713,7 @@ md_assemble (char *instruction_string)
if (need_pass_2 || goofed)
return;
dwarf2_emit_insn (0);
/* Emit op-code. */
/* Remember where it is, in case we want to modify the op-code later. */
opcode_low_byteP = frag_more (v.vit_opcode_nbytes);

3
gas/read.c
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@ -4265,6 +4265,9 @@ emit_expr_fix (expressionS *exp, unsigned int nbytes, fragS *frag, char *p)
case 2:
r = BFD_RELOC_16;
break;
case 3:
r = BFD_RELOC_24;
break;
case 4:
r = BFD_RELOC_32;
break;