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@ -317,7 +317,7 @@ static int mips_trap;
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by a assembling two single width halves into two single width floating
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point registers which just happen to alias the double width destination
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register. On some architectures this aliasing can be disabled by a bit
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in the status register, and the settin gof this bit cannot be determined
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in the status register, and the setting of this bit cannot be determined
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automatically at assemble time. */
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static int mips_disable_float_construction;
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