mirror of
https://github.com/darlinghq/darling-gdb.git
synced 2024-11-24 12:39:59 +00:00
2003-06-19 Andrew Cagney <cagney@redhat.com>
* ld-insn.h: Update copyright. (cache_fields): Define. (insn_table_fields): Add insn_field_6 and insn_field_7. (load_insn_table): Pass in the "cache_rules". * ld-insn.c: Update copyright. (load_insn_table): Add parameter "cache_rules". Handle "cache", "computed" and "scratch" fields. (main): Pass "cache_rules" to load_insn_table. * ld-cache.h: Update copyright. (append_cache_table): Declare. * ld-cache.c: Update copyright. (append_cache_table): New function. (load_cache_table): Call. * gen-model.c: Include "ld-cache.h". * gen-itable.c: Include "ld-cache.h". * igen.c: Move #include "ld-cache.h" to earlier. Update copyright. (main): Permit a NULL "cache_rules". Pass address of "cache_rules" to load_insn_table. * Makefile.in (tmp-ld-insn): Add "ld-cache.o". (tmp-igen): Do not include ppc-cache-rules. (gen-itable.o, gen-model.o): Add "ld-cache.h". * ppc-cache-rules: Delete file. * ppc-instructions: Add cache rules.
This commit is contained in:
Andrew Cagney
parent
cd0f588e19
commit
d81bb16ac0
@ -1,3 +1,30 @@
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2003-06-19 Andrew Cagney <cagney@redhat.com>
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* ld-insn.h: Update copyright.
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(cache_fields): Define.
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(insn_table_fields): Add insn_field_6 and insn_field_7.
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(load_insn_table): Pass in the "cache_rules".
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* ld-insn.c: Update copyright.
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(load_insn_table): Add parameter "cache_rules". Handle "cache",
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"computed" and "scratch" fields.
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(main): Pass "cache_rules" to load_insn_table.
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* ld-cache.h: Update copyright.
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(append_cache_table): Declare.
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* ld-cache.c: Update copyright.
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(append_cache_table): New function.
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(load_cache_table): Call.
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* gen-model.c: Include "ld-cache.h".
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* gen-itable.c: Include "ld-cache.h".
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* igen.c: Move #include "ld-cache.h" to earlier. Update
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copyright.
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(main): Permit a NULL "cache_rules". Pass address of
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"cache_rules" to load_insn_table.
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* Makefile.in (tmp-ld-insn): Add "ld-cache.o".
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(tmp-igen): Do not include ppc-cache-rules.
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(gen-itable.o, gen-model.o): Add "ld-cache.h".
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* ppc-cache-rules: Delete file.
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* ppc-instructions: Add cache rules.
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2003-06-19 Andrew Cagney <cagney@redhat.com>
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* Makefile.in (ICACHE_CFLAGS, SEMANTICS_CFLAGS): Delete.
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@ -460,10 +460,9 @@ tmp-dgen: dgen ppc-spr-table $(srcdir)/../../move-if-change
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touch tmp-dgen
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tmp-igen: igen ppc-instructions $(IGEN_OPCODE_RULES) ppc-cache-rules $(srcdir)/../../move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
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tmp-igen: igen ppc-instructions $(IGEN_OPCODE_RULES) $(srcdir)/../../move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
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./igen $(IGEN_FLAGS) \
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-o $(srcdir)/$(IGEN_OPCODE_RULES) \
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-k $(srcdir)/ppc-cache-rules \
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-I $(srcdir) -i $(srcdir)/ppc-instructions \
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-n icache.h -hc tmp-icache.h \
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-n icache.c -c tmp-icache.c \
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@ -534,12 +533,12 @@ tmp-ld-cache: ld-cache.o misc.o lf.o table.o filter_host.o
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ld-insn.o: ld-insn.c misc.h lf.h table.h ld-insn.h ld-decode.h igen.h
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$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/ld-insn.c
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tmp-ld-insn: ld-insn.o misc.o lf.o table.o ld-decode.o filter_host.o filter.o
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$(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-insn -DMAIN $(srcdir)/ld-insn.c misc.o lf.o table.o ld-decode.o filter_host.o filter.o $(BUILD_LIBS)
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$(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-insn -DMAIN $(srcdir)/ld-insn.c ld-cache.o misc.o lf.o table.o ld-decode.o filter_host.o filter.o $(BUILD_LIBS)
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gen-model.o: gen-model.c misc.h lf.h table.h gen-model.h ld-decode.h igen.h ld-insn.h
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gen-model.o: gen-model.c misc.h lf.h table.h gen-model.h ld-decode.h igen.h ld-insn.h ld-cache.h
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$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-model.c
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gen-itable.o: gen-itable.c misc.h lf.h table.h gen-itable.h ld-decode.h igen.h ld-insn.h igen.h
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gen-itable.o: gen-itable.c misc.h lf.h table.h gen-itable.h ld-decode.h igen.h ld-insn.h igen.h ld-cache.h
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$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-itable.c
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gen-icache.o: gen-icache.c misc.h lf.h table.h gen-icache.h ld-decode.h igen.h ld-insn.h gen-semantics.h gen-idecode.h
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@ -26,6 +26,7 @@
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#include "filter.h"
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#include "ld-cache.h"
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#include "ld-decode.h"
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#include "ld-insn.h"
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@ -25,6 +25,7 @@
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#include "filter.h"
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#include "ld-cache.h"
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#include "ld-decode.h"
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#include "ld-insn.h"
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@ -29,8 +29,8 @@
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#include "filter.h"
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#include "ld-decode.h"
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#include "ld-cache.h"
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#include "ld-decode.h"
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#include "ld-insn.h"
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#include "igen.h"
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@ -480,11 +480,12 @@ main(int argc,
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force_decode_gen_type(optarg);
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break;
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case 'i':
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if (decode_rules == NULL || cache_rules == NULL) {
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fprintf(stderr, "Must specify decode and cache tables\n");
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if (decode_rules == NULL) {
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fprintf(stderr, "Must specify decode tables\n");
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exit (1);
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}
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instructions = load_insn_table(optarg, decode_rules, filters, includes);
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instructions = load_insn_table(optarg, decode_rules, filters, includes,
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&cache_rules);
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fprintf(stderr, "\texpanding ...\n");
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insn_table_expand_insns(instructions);
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break;
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@ -1,6 +1,6 @@
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/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -46,6 +46,24 @@ static const name_map cache_type_map[] = {
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};
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void
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append_cache_rule (cache_table **table, char *type, char *field_name,
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char *derived_name, char *type_def,
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char *expression, table_entry *file_entry)
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{
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while ((*table) != NULL)
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table = &(*table)->next;
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(*table) = ZALLOC(cache_table);
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(*table)->type = name2i(type, cache_type_map);
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(*table)->field_name = field_name;
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(*table)->derived_name = derived_name;
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(*table)->type_def = (strlen(type_def) > 0 ? type_def : NULL);
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(*table)->expression = (strlen(expression) > 0 ? expression : NULL);
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(*table)->file_entry = file_entry;
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(*table)->next = NULL;
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}
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cache_table *
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load_cache_table(char *file_name,
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int hi_bit_nr)
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@ -55,19 +73,13 @@ load_cache_table(char *file_name,
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cache_table *table = NULL;
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cache_table **curr_rule = &table;
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while ((entry = table_entry_read(file)) != NULL) {
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cache_table *new_rule = ZALLOC(cache_table);
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new_rule->type = name2i(entry->fields[ca_type], cache_type_map);
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new_rule->field_name = entry->fields[ca_field_name];
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new_rule->derived_name = entry->fields[ca_derived_name];
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new_rule->type_def = (strlen(entry->fields[ca_type_def])
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? entry->fields[ca_type_def]
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: NULL);
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new_rule->expression = (strlen(entry->fields[ca_expression]) > 0
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? entry->fields[ca_expression]
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: NULL);
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new_rule->file_entry = entry;
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*curr_rule = new_rule;
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curr_rule = &new_rule->next;
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append_cache_rule (curr_rule, entry->fields[ca_type],
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entry->fields[ca_field_name],
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entry->fields[ca_derived_name],
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entry->fields[ca_type_def],
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entry->fields[ca_expression],
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entry);
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curr_rule = &(*curr_rule)->next;
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}
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return table;
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}
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@ -1,6 +1,6 @@
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/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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Copyright 1994, 1995, 1996, 1997, 2003, Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -79,3 +79,13 @@ struct _cache_table {
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extern cache_table *load_cache_table
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(char *file_name,
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int hi_bit_nr);
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extern void append_cache_rule
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(cache_table **table,
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char *type,
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char *field_name,
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char *derived_name,
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char *type_def,
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char *expression,
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table_entry *file_entry);
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@ -1,6 +1,6 @@
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/* This file is part of the program psim.
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Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
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Copyright 1994, 1995, 1996, 2003 Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -332,7 +332,8 @@ insn_table *
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load_insn_table(const char *file_name,
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decode_table *decode_rules,
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filter *filters,
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table_include *includes)
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table_include *includes,
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cache_table **cache_rules)
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{
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table *file = table_open(file_name, nr_insn_table_fields, nr_insn_model_table_fields);
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insn_table *table = ZALLOC(insn_table);
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@ -344,6 +345,33 @@ load_insn_table(const char *file_name,
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|| it_is("internal", file_entry->fields[insn_flags])) {
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insn_table_insert_function(table, file_entry);
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}
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else if ((it_is("function", file_entry->fields[insn_form])
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|| it_is("internal", file_entry->fields[insn_form]))
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&& !is_filtered_out(file_entry->fields[insn_flags], filters)) {
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/* Ok, this is evil. Need to convert a new style function into
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an old style function. Construct an old style table and then
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copy it back. */
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char *fields[nr_insn_table_fields];
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memset (fields, 0, sizeof fields);
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fields[insn_flags] = file_entry->fields[insn_form];
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fields[function_type] = file_entry->fields[insn_name];
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fields[function_name] = file_entry->fields[insn_comment];
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fields[function_param] = file_entry->fields[insn_field_6];
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memcpy (file_entry->fields, fields,
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sizeof (fields[0]) * file_entry->nr_fields);
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insn_table_insert_function(table, file_entry);
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#if 0
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":" "..."
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":" <filter-flags>
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":" <filter-models>
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":" <typedef>
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":" <name>
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[ ":" <parameter-list> ]
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<nl>
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[ <function-model> ]
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<code-block>
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#endif
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}
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else if (it_is("model", file_entry->fields[insn_flags])) {
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model_table_insert(table, file_entry);
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}
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@ -366,6 +394,18 @@ load_insn_table(const char *file_name,
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&& !is_filtered_out(file_entry->fields[insn_flags], filters)) {
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parse_include_entry (file, file_entry, filters, includes);
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}
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else if ((it_is("cache", file_entry->fields[insn_form])
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|| it_is("compute", file_entry->fields[insn_form])
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|| it_is("scratch", file_entry->fields[insn_form]))
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&& !is_filtered_out(file_entry->fields[insn_flags], filters)) {
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append_cache_rule (cache_rules,
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file_entry->fields[insn_form], /* type */
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file_entry->fields[cache_name],
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file_entry->fields[cache_derived_name],
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file_entry->fields[cache_type_def],
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file_entry->fields[cache_expression],
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file_entry);
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}
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else {
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insn_fields *fields;
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/* skip instructions that aren't relevant to the mode */
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@ -930,6 +970,7 @@ main(int argc, char **argv)
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filter *filters = NULL;
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decode_table *decode_rules = NULL;
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insn_table *instructions = NULL;
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cache_table *cache_rules = NULL;
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if (argc != 5)
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error("Usage: insn <filter> <hi-bit-nr> <decode-table> <insn-table>\n");
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@ -938,7 +979,8 @@ main(int argc, char **argv)
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hi_bit_nr = a2i(argv[2]);
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ASSERT(hi_bit_nr < insn_bit_size);
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decode_rules = load_decode_table(argv[3], hi_bit_nr);
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instructions = load_insn_table(argv[4], decode_rules, filters, NULL);
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instructions = load_insn_table(argv[4], decode_rules, filters, NULL,
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&cache_rules);
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insn_table_expand_insns(instructions);
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dump_insn_table(instructions, 0, -1);
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@ -1,6 +1,6 @@
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/* This file is part of the program psim.
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Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
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Copyright 1994, 1995, 1996, 2003 Andrew Cagney
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
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@ -119,6 +119,8 @@ typedef enum {
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insn_mnemonic,
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insn_name,
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insn_comment,
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insn_field_6,
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insn_field_7,
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nr_insn_table_fields
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} insn_table_fields;
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@ -139,6 +141,13 @@ typedef enum {
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include_path = insn_name,
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} model_include_fields;
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typedef enum {
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cache_type_def = insn_name,
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cache_derived_name = insn_comment,
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cache_name = insn_field_6,
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cache_expression = insn_field_7,
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} cache_fields;
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typedef struct _insn insn;
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struct _insn {
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table_entry *file_entry;
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@ -189,7 +198,8 @@ extern insn_table *load_insn_table
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(const char *file_name,
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decode_table *decode_rules,
|
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filter *filters,
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table_include *includes);
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table_include *includes,
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cache_table **cache_rules);
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model *models;
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model *last_model;
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|
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@ -1,65 +0,0 @@
|
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#
|
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# This file is part of the program psim.
|
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#
|
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# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
|
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#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
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cache:RA:RA::
|
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cache:RA:rA:signed_word *:(cpu_registers(processor)->gpr + RA)
|
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cache:RA:RA_BITMASK:unsigned32:(1 << RA)
|
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compute:RA:RA_is_0:int:(RA == 0)
|
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cache:RT:RT::
|
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cache:RT:rT:signed_word *:(cpu_registers(processor)->gpr + RT)
|
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cache:RT:RT_BITMASK:unsigned32:(1 << RT)
|
||||
cache:RS:RS::
|
||||
cache:RS:rS:signed_word *:(cpu_registers(processor)->gpr + RS)
|
||||
cache:RS:RS_BITMASK:unsigned32:(1 << RS)
|
||||
cache:RB:RB::
|
||||
cache:RB:rB:signed_word *:(cpu_registers(processor)->gpr + RB)
|
||||
cache:RB:RB_BITMASK:unsigned32:(1 << RB)
|
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scratch:FRA:FRA::
|
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cache:FRA:frA:unsigned64 *:(cpu_registers(processor)->fpr + FRA)
|
||||
cache:FRA:FRA_BITMASK:unsigned32:(1 << FRA)
|
||||
scratch:FRB:FRB::
|
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cache:FRB:frB:unsigned64 *:(cpu_registers(processor)->fpr + FRB)
|
||||
cache:FRB:FRB_BITMASK:unsigned32:(1 << FRB)
|
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scratch:FRC:FRC::
|
||||
cache:FRC:frC:unsigned64 *:(cpu_registers(processor)->fpr + FRC)
|
||||
cache:FRC:FRC_BITMASK:unsigned32:(1 << FRC)
|
||||
scratch:FRS:FRS::
|
||||
cache:FRS:frS:unsigned64 *:(cpu_registers(processor)->fpr + FRS)
|
||||
cache:FRS:FRS_BITMASK:unsigned32:(1 << FRS)
|
||||
scratch:FRT:FRT::
|
||||
cache:FRT:frT:unsigned64 *:(cpu_registers(processor)->fpr + FRT)
|
||||
cache:FRT:FRT_BITMASK:unsigned32:(1 << FRT)
|
||||
cache:SI:EXTS_SI:unsigned_word:((signed_word)(signed16)instruction)
|
||||
scratch:BI:BI::
|
||||
cache:BI:BIT32_BI::BIT32(BI)
|
||||
cache:BF:BF::
|
||||
cache:BF:BF_BITMASK:unsigned32:(1 << BF)
|
||||
scratch:BA:BA::
|
||||
cache:BA:BIT32_BA::BIT32(BA)
|
||||
cache:BA:BA_BITMASK:unsigned32:(1 << BA)
|
||||
scratch:BB:BB::
|
||||
cache:BB:BIT32_BB::BIT32(BB)
|
||||
cache:BB:BB_BITMASK:unsigned32:(1 << BB)
|
||||
cache:BT:BT::
|
||||
cache:BT:BT_BITMASK:unsigned32:(1 << BT)
|
||||
cache:BD:EXTS_BD_0b00:unsigned_word:(((signed_word)(signed16)instruction) & ~3)
|
||||
cache:LI:EXTS_LI_0b00:unsigned_word:((((signed_word)(signed32)(instruction << 6)) >> 6) & ~0x3)
|
||||
cache:D:EXTS_D:unsigned_word:((signed_word)(signed16)(instruction))
|
||||
cache:DS:EXTS_DS_0b00:unsigned_word:(((signed_word)(signed16)instruction) & ~0x3)
|
||||
#compute:SPR:SPR_is_256:int:(SPR == 256)
|
||||
@ -1,7 +1,7 @@
|
||||
#
|
||||
# This file is part of the program psim.
|
||||
#
|
||||
# Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
|
||||
# Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
|
||||
#
|
||||
# --
|
||||
#
|
||||
@ -33,6 +33,53 @@
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
#
|
||||
|
||||
:cache::::RA:RA:
|
||||
:cache:::signed_word *:rA:RA:(cpu_registers(processor)->gpr + RA)
|
||||
:cache:::unsigned32:RA_BITMASK:RA:(1 << RA)
|
||||
:compute:::int:RA_is_0:RA:(RA == 0)
|
||||
:cache::::RT:RT:
|
||||
:cache:::signed_word *:rT:RT:(cpu_registers(processor)->gpr + RT)
|
||||
:cache:::unsigned32:RT_BITMASK:RT:(1 << RT)
|
||||
:cache::::RS:RS:
|
||||
:cache:::signed_word *:rS:RS:(cpu_registers(processor)->gpr + RS)
|
||||
:cache:::unsigned32:RS_BITMASK:RS:(1 << RS)
|
||||
:cache::::RB:RB:
|
||||
:cache:::signed_word *:rB:RB:(cpu_registers(processor)->gpr + RB)
|
||||
:cache:::unsigned32:RB_BITMASK:RB:(1 << RB)
|
||||
:scratch::::FRA:FRA:
|
||||
:cache:::unsigned64 *:frA:FRA:(cpu_registers(processor)->fpr + FRA)
|
||||
:cache:::unsigned32:FRA_BITMASK:FRA:(1 << FRA)
|
||||
:scratch::::FRB:FRB:
|
||||
:cache:::unsigned64 *:frB:FRB:(cpu_registers(processor)->fpr + FRB)
|
||||
:cache:::unsigned32:FRB_BITMASK:FRB:(1 << FRB)
|
||||
:scratch::::FRC:FRC:
|
||||
:cache:::unsigned64 *:frC:FRC:(cpu_registers(processor)->fpr + FRC)
|
||||
:cache:::unsigned32:FRC_BITMASK:FRC:(1 << FRC)
|
||||
:scratch::::FRS:FRS:
|
||||
:cache:::unsigned64 *:frS:FRS:(cpu_registers(processor)->fpr + FRS)
|
||||
:cache:::unsigned32:FRS_BITMASK:FRS:(1 << FRS)
|
||||
:scratch::::FRT:FRT:
|
||||
:cache:::unsigned64 *:frT:FRT:(cpu_registers(processor)->fpr + FRT)
|
||||
:cache:::unsigned32:FRT_BITMASK:FRT:(1 << FRT)
|
||||
:cache:::unsigned_word:EXTS_SI:SI:((signed_word)(signed16)instruction)
|
||||
:scratch::::BI:BI:
|
||||
:cache::::BIT32_BI:BI:BIT32(BI)
|
||||
:cache::::BF:BF:
|
||||
:cache:::unsigned32:BF_BITMASK:BF:(1 << BF)
|
||||
:scratch::::BA:BA:
|
||||
:cache::::BIT32_BA:BA:BIT32(BA)
|
||||
:cache:::unsigned32:BA_BITMASK:BA:(1 << BA)
|
||||
:scratch::::BB:BB:
|
||||
:cache::::BIT32_BB:BB:BIT32(BB)
|
||||
:cache:::unsigned32:BB_BITMASK:BB:(1 << BB)
|
||||
:cache::::BT:BT:
|
||||
:cache:::unsigned32:BT_BITMASK:BT:(1 << BT)
|
||||
:cache:::unsigned_word:EXTS_BD_0b00:BD:(((signed_word)(signed16)instruction) & ~3)
|
||||
:cache:::unsigned_word:EXTS_LI_0b00:LI:((((signed_word)(signed32)(instruction << 6)) >> 6) & ~0x3)
|
||||
:cache:::unsigned_word:EXTS_D:D:((signed_word)(signed16)(instruction))
|
||||
:cache:::unsigned_word:EXTS_DS_0b00:DS:(((signed_word)(signed16)instruction) & ~0x3)
|
||||
#:compute:::int:SPR_is_256:SPR:(SPR == 256)
|
||||
|
||||
# PowerPC models
|
||||
::model:604:ppc604: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0
|
||||
|
||||
Loading…
Reference in New Issue
Block a user