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PR binutils/13135

Browse Source 
* arm-dis.c: Add necessary casts for printing integer values.
	Use %s when printing string values.
	* hppa-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* microblaze-dis.c: Likewise.
	* mips-dis.c: Likewise.
	* ppc-dis.c: Likewise.
	* sparc-dis.c: Likewise.

	* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
This commit is contained in:
Nick Clifton 2012-07-24 12:56:47 +00:00
parent e2d12c2152
commit d908c8af5a
10 changed files with 76 additions and 59 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
include/ChangeLog
View File

@ -1,3 +1,8 @@
2012-07-24 Dr David Alan Gilbert <dave@treblig.org>
PR binutils/13135
* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
2012-07-13 Doug Evans <dje@google.com>
* filenames.h: #include "hashtab.h".

2
include/dis-asm.h
View File

@ -35,7 +35,7 @@ extern "C" {
#include <stdio.h>
#include "bfd.h"
typedef int (*fprintf_ftype) (void *, const char*, ...) /*ATTRIBUTE_FPTR_PRINTF_2*/;
typedef int (*fprintf_ftype) (void *, const char*, ...) ATTRIBUTE_FPTR_PRINTF_2;
enum dis_insn_type
{

11
opcodes/ChangeLog
View File

@ -1,3 +1,14 @@
2012-07-24 Dr David Alan Gilbert <dave@treblig.org>
PR binutils/13135
* arm-dis.c: Add necessary casts for printing integer values.
Use %s when printing string values.
* hppa-dis.c: Likewise.
* m68k-dis.c: Likewise.
* microblaze-dis.c: Likewise.
* mips-dis.c: Likewise.
* sparc-dis.c: Likewise.
2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
PR binutils/14355

57
opcodes/arm-dis.c
View File

@ -1,6 +1,7 @@
/* Instruction printing code for the ARM
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modification by James G. Smith (jsmith@cygnus.co.uk)
@ -1925,7 +1926,7 @@ print_insn_coprocessor (bfd_vma pc,
{
if (offset)
func (stream, ", #%d]%s",
offset,
(int) offset,
WRITEBACK_BIT_SET ? "!" : "");
else if (NEGATIVE_BIT_SET)
func (stream, ", #-0]");
@ -1939,7 +1940,7 @@ print_insn_coprocessor (bfd_vma pc,
if (WRITEBACK_BIT_SET)
{
if (offset)
func (stream, ", #%d", offset);
func (stream, ", #%d", (int) offset);
else if (NEGATIVE_BIT_SET)
func (stream, ", #-0");
}
@ -1947,7 +1948,7 @@ print_insn_coprocessor (bfd_vma pc,
{
func (stream, ", {%s%d}",
(NEGATIVE_BIT_SET && !offset) ? "-" : "",
offset);
(int) offset);
value_in_comment = offset;
}
}
@ -2258,7 +2259,7 @@ print_insn_coprocessor (bfd_vma pc,
{
/* given (20, 23) | given (0, 3) */
value = ((given >> 16) & 0xf0) | (given & 0xf);
func (stream, "%d", value);
func (stream, "%d", (int) value);
}
break;
@ -2383,7 +2384,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
/* Pre-indexed. Elide offset of positive zero when
non-writeback. */
if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", (int) offset);
if (NEGATIVE_BIT_SET)
offset = -offset;
@ -2398,7 +2399,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
}
else /* Post indexed. */
{
func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", (int) offset);
/* Ie ignore the offset. */
offset = pc + 8;
@ -2420,7 +2421,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
/* Elide offset of positive zero when non-writeback. */
offset = given & 0xfff;
if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", (int) offset);
}
else
{
@ -2438,7 +2439,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
/* Always show offset. */
offset = given & 0xfff;
func (stream, "], #%s%d",
NEGATIVE_BIT_SET ? "-" : "", offset);
NEGATIVE_BIT_SET ? "-" : "", (int) offset);
}
else
{
@ -3036,7 +3037,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
/* Elide positive zero offset. */
if (offset || NEGATIVE_BIT_SET)
func (stream, "[pc, #%s%d]\t; ",
NEGATIVE_BIT_SET ? "-" : "", offset);
NEGATIVE_BIT_SET ? "-" : "", (int) offset);
else
func (stream, "[pc]\t; ");
if (NEGATIVE_BIT_SET)
@ -3047,7 +3048,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
{
/* Always show the offset. */
func (stream, "[pc], #%s%d",
NEGATIVE_BIT_SET ? "-" : "", offset);
NEGATIVE_BIT_SET ? "-" : "", (int) offset);
if (! allow_unpredictable)
is_unpredictable = TRUE;
}
@ -3226,7 +3227,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
{
if (offset)
func (stream, ", #%d]%s",
value_in_comment,
(int) value_in_comment,
WRITEBACK_BIT_SET ? "!" : "");
else
func (stream, "]");
@ -3238,11 +3239,11 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
if (WRITEBACK_BIT_SET)
{
if (offset)
func (stream, ", #%d", value_in_comment);
func (stream, ", #%d", (int) value_in_comment);
}
else
{
func (stream, ", {%d}", offset);
func (stream, ", {%d}", (int) offset);
value_in_comment = offset;
}
}
@ -3284,7 +3285,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
if (name != NULL)
func (stream, "%s", name);
else
func (stream, "(UNDEF: %lu)", sysm);
func (stream, "(UNDEF: %lu)", (unsigned long) sysm);
}
else
{
@ -3448,7 +3449,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
if (name != NULL)
func (stream, "%s", name);
else
func (stream, "(UNDEF: %lu)", sysm);
func (stream, "(UNDEF: %lu)", (unsigned long) sysm);
}
break;
@ -3607,14 +3608,14 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
if (started)
func (stream, ", ");
started = 1;
func (stream, arm_regnames[14] /* "lr" */);
func (stream, "%s", arm_regnames[14] /* "lr" */);
}
if (domaskpc)
{
if (started)
func (stream, ", ");
func (stream, arm_regnames[15] /* "pc" */);
func (stream, "%s", arm_regnames[15] /* "pc" */);
}
func (stream, "}");
@ -3680,17 +3681,17 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
break;
case 'd':
func (stream, "%ld", reg);
func (stream, "%ld", (long) reg);
value_in_comment = reg;
break;
case 'H':
func (stream, "%ld", reg << 1);
func (stream, "%ld", (long) (reg << 1));
value_in_comment = reg << 1;
break;
case 'W':
func (stream, "%ld", reg << 2);
func (stream, "%ld", (long) (reg << 2));
value_in_comment = reg << 2;
break;
@ -3704,7 +3705,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
break;
case 'x':
func (stream, "0x%04lx", reg);
func (stream, "0x%04lx", (long) reg);
break;
case 'B':
@ -4010,11 +4011,11 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
}
if (postind)
func (stream, "], #%d", offset);
func (stream, "], #%d", (int) offset);
else
{
if (offset)
func (stream, ", #%d", offset);
func (stream, ", #%d", (int) offset);
func (stream, writeback ? "]!" : "]");
}
@ -4243,11 +4244,11 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
if (name != NULL)
func (stream, "%s", name);
else
func (stream, "(UNDEF: %lu)", sysm);
func (stream, "(UNDEF: %lu)", (unsigned long) sysm);
}
else
{
func (stream, psr_name (given & 0xff));
func (stream, "%s", psr_name (given & 0xff));
}
break;
@ -4265,10 +4266,10 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
if (name != NULL)
func (stream, "%s", name);
else
func (stream, "(UNDEF: %lu)", sm);
func (stream, "(UNDEF: %lu)", (unsigned long) sm);
}
else
func (stream, psr_name (given & 0xff));
func (stream, "%s", psr_name (given & 0xff));
break;
case '0': case '1': case '2': case '3': case '4':

8
opcodes/hppa-dis.c
View File

@ -1,6 +1,6 @@
/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003,
2005, 2007 Free Software Foundation, Inc.
2005, 2007, 2012 Free Software Foundation, Inc.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
@ -176,13 +176,13 @@ static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
static void
fput_reg (unsigned reg, disassemble_info *info)
{
(*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
(*info->fprintf_func) (info->stream, "%s", reg ? reg_names[reg] : "r0");
}
static void
fput_fp_reg (unsigned reg, disassemble_info *info)
{
(*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
(*info->fprintf_func) (info->stream, "%s", reg ? fp_reg_names[reg] : "fr0");
}
static void
@ -199,7 +199,7 @@ fput_fp_reg_r (unsigned reg, disassemble_info *info)
static void
fput_creg (unsigned reg, disassemble_info *info)
{
(*info->fprintf_func) (info->stream, control_reg[reg]);
(*info->fprintf_func) (info->stream, "%s", control_reg[reg]);
}
/* Print constants with sign. */

8
opcodes/m68k-dis.c
View File

@ -1,7 +1,7 @@
/* Print Motorola 68k instructions.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
Free Software Foundation, Inc.
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@ -654,7 +654,7 @@ print_insn_arg (const char *d,
{
static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
FETCH_ARG (2, val);
(*info->fprintf_func) (info->stream, cacheFieldName[val]);
(*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
break;
}
@ -792,7 +792,7 @@ print_insn_arg (const char *d,
static char *const scalefactor_name[] = { "<<", ">>" };
FETCH_ARG (1, val);
(*info->fprintf_func) (info->stream, scalefactor_name[val]);
(*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
}
else
{

6
opcodes/microblaze-dis.c
View File

@ -1,6 +1,6 @@
/* Disassemble Xilinx microblaze instructions.
Copyright 2009 Free Software Foundation, Inc.
Copyright 2009, 2012 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@ -227,7 +227,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
prev_insn_vma = curr_insn_vma;
if (op->name == NULL)
print_func (stream, ".short 0x%04x", inst);
print_func (stream, ".short 0x%04x", (unsigned int) inst);
else
{
print_func (stream, "%s", op->name);
@ -383,7 +383,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
break;
default:
/* If the disassembler lags the instruction set. */
print_func (stream, "\tundecoded operands, inst is 0x%04x", inst);
print_func (stream, "\tundecoded operands, inst is 0x%04x", (unsigned int) inst);
break;
}
}

32
opcodes/mips-dis.c
View File

@ -2408,19 +2408,19 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case '1':
infprintf (is, "0x%lx", GET_OP (insn, STYPE));
infprintf (is, "0x%x", GET_OP (insn, STYPE));
break;
case '<':
infprintf (is, "0x%lx", GET_OP (insn, SHAMT));
infprintf (is, "0x%x", GET_OP (insn, SHAMT));
break;
case '\\':
infprintf (is, "0x%lx", GET_OP (insn, 3BITPOS));
infprintf (is, "0x%x", GET_OP (insn, 3BITPOS));
break;
case '|':
infprintf (is, "0x%lx", GET_OP (insn, TRAP));
infprintf (is, "0x%x", GET_OP (insn, TRAP));
break;
case '~':
@ -2452,7 +2452,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case 'c':
infprintf (is, "0x%lx", GET_OP (insn, CODE));
infprintf (is, "0x%x", GET_OP (insn, CODE));
break;
case 'd':
@ -2460,12 +2460,12 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case 'h':
infprintf (is, "0x%lx", GET_OP (insn, PREFX));
infprintf (is, "0x%x", GET_OP (insn, PREFX));
break;
case 'i':
case 'u':
infprintf (is, "0x%lx", GET_OP (insn, IMMEDIATE));
infprintf (is, "0x%x", GET_OP (insn, IMMEDIATE));
break;
case 'j': /* Same as i, but sign-extended. */
@ -2519,7 +2519,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case 'q':
infprintf (is, "0x%lx", GET_OP (insn, CODE2));
infprintf (is, "0x%x", GET_OP (insn, CODE2));
break;
case 't':
@ -2536,11 +2536,11 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case 'B':
infprintf (is, "0x%lx", GET_OP (insn, CODE10));
infprintf (is, "0x%x", GET_OP (insn, CODE10));
break;
case 'C':
infprintf (is, "0x%lx", GET_OP (insn, COPZ));
infprintf (is, "0x%x", GET_OP (insn, COPZ));
break;
case 'D':
@ -2555,7 +2555,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
'T' format. Therefore, until we gain understanding of
cp2 register names, we can simply print the register
numbers. */
infprintf (is, "$%ld", GET_OP (insn, RT));
infprintf (is, "$%d", GET_OP (insn, RT));
break;
case 'G':
@ -2577,13 +2577,13 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
infprintf (is, "%s", mips_cp0_names[GET_OP (insn, RS)]);
break;
default:
infprintf (is, "$%ld", GET_OP (insn, RS));
infprintf (is, "$%d", GET_OP (insn, RS));
break;
}
break;
case 'H':
infprintf (is, "%ld", GET_OP (insn, SEL));
infprintf (is, "%d", GET_OP (insn, SEL));
break;
case 'K':
@ -2591,13 +2591,13 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
break;
case 'M':
infprintf (is, "$fcc%ld", GET_OP (insn, CCC));
infprintf (is, "$fcc%d", GET_OP (insn, CCC));
break;
case 'N':
infprintf (is,
(op->pinfo & (FP_D | FP_S)) != 0
? "$fcc%ld" : "$cc%ld",
? "$fcc%d" : "$cc%d",
GET_OP (insn, BCC));
break;
@ -2793,7 +2793,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
case 'C':
immed = micromips_imm_c_map[GET_OP (insn, IMMC)];
infprintf (is, "0x%lx", immed);
infprintf (is, "0x%x", immed);
break;
case 'D':

2
opcodes/ppc-dis.c
View File

@ -666,7 +666,7 @@ print_insn_powerpc (bfd_vma memaddr,
(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
}
else
(*info->fprintf_func) (info->stream, "%d", value);
(*info->fprintf_func) (info->stream, "%d", (int) value);
if (need_paren)
{

4
opcodes/sparc-dis.c
View File

@ -550,7 +550,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
/* Can't do simple format if source and dest are different. */
continue;
(*info->fprintf_func) (stream, opcode->name);
(*info->fprintf_func) (stream, "%s", opcode->name);
{
const char *s;
@ -704,7 +704,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
break;
case ')': /* 5 bit unsigned immediate from RS3. */
(info->fprintf_func) (stream, "%#x", X_RS3 (insn));
(info->fprintf_func) (stream, "%#x", (unsigned int) X_RS3 (insn));
break;
case 'X': /* 5 bit unsigned immediate. */