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https://github.com/darlinghq/darling-gdb.git
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2007-11-19 Markus Deuling <deuling@de.ibm.com>
* gdbarch.sh (register_sim_regno): Add gdbarch as parameter. * gdbarch.{c,h}: Regenerate. * arch-utils.h (legacy_register_sim_regno): Add gdbarch as parameter. * score-tdep.c (score_register_sim_regno): Likewise. * sim-regno.h (one2one_register_sim_regno): Likewise. * arch-utils.c (legacy_register_sim_regno): Add gdbarch as parameter. Replace current_gdbarch by gdbarch. * sh-tdep.c (sh_sh2a_register_sim_regno) (sh_dsp_register_sim_regno): Likewise. * rs6000-tdep.c (rs6000_register_sim_regno): Likewise. * mips-tdep.c (mips_register_sim_regno): Likewise. * m32c-tdep.c (m32c_register_sim_regno): Likewise. * frv-tdep.c (frv_register_sim_regno): Likewise. * arm-tdep.c (arm_register_sim_regno): Likewise. * remote-sim.c (one2one_register_sim_regno): Likewise.
This commit is contained in:
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@ -1,3 +1,23 @@
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2007-11-19 Markus Deuling <deuling@de.ibm.com>
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* gdbarch.sh (register_sim_regno): Add gdbarch as parameter.
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* gdbarch.{c,h}: Regenerate.
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* arch-utils.h (legacy_register_sim_regno): Add gdbarch as parameter.
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* score-tdep.c (score_register_sim_regno): Likewise.
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* sim-regno.h (one2one_register_sim_regno): Likewise.
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* arch-utils.c (legacy_register_sim_regno): Add gdbarch as parameter.
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Replace current_gdbarch by gdbarch.
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* sh-tdep.c (sh_sh2a_register_sim_regno)
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(sh_dsp_register_sim_regno): Likewise.
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* rs6000-tdep.c (rs6000_register_sim_regno): Likewise.
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* mips-tdep.c (mips_register_sim_regno): Likewise.
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* m32c-tdep.c (m32c_register_sim_regno): Likewise.
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* frv-tdep.c (frv_register_sim_regno): Likewise.
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* arm-tdep.c (arm_register_sim_regno): Likewise.
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* remote-sim.c (one2one_register_sim_regno): Likewise.
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2007-11-16 Ulrich Weigand <uweigand@de.ibm.com>
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* configure.ac (--enable-targets): New configure option.
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@ -38,16 +38,16 @@
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int
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legacy_register_sim_regno (int regnum)
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legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum)
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{
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/* Only makes sense to supply raw registers. */
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
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/* NOTE: cagney/2002-05-13: The old code did it this way and it is
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suspected that some GDB/SIM combinations may rely on this
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behavour. The default should be one2one_register_sim_regno
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(below). */
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if (gdbarch_register_name (current_gdbarch, regnum) != NULL
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&& gdbarch_register_name (current_gdbarch, regnum)[0] != '\0')
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if (gdbarch_register_name (gdbarch, regnum) != NULL
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&& gdbarch_register_name (gdbarch, regnum)[0] != '\0')
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return regnum;
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else
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return LEGACY_SIM_REGNO_IGNORE;
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@ -89,7 +89,7 @@ int default_remote_register_number (struct gdbarch *gdbarch,
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(LEGACY_SIM_REGNO_IGNORE) when the register doesn't have a valid
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name. */
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extern int legacy_register_sim_regno (int regnum);
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extern int legacy_register_sim_regno (struct gdbarch *gdbarch, int regnum);
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/* Return the selected byte order, or BFD_ENDIAN_UNKNOWN if no byte
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order was explicitly selected. */
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@ -1462,10 +1462,10 @@ arm_dwarf_reg_to_regnum (int reg)
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/* Map GDB internal REGNUM onto the Arm simulator register numbers. */
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static int
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arm_register_sim_regno (int regnum)
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arm_register_sim_regno (struct gdbarch *gdbarch, int regnum)
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{
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int reg = regnum;
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gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
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gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
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if (regnum >= ARM_WR0_REGNUM && regnum <= ARM_WR15_REGNUM)
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return regnum - ARM_WR0_REGNUM + SIM_ARM_IWMMXT_COP0R0_REGNUM;
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@ -349,7 +349,7 @@ frv_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
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}
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static int
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frv_register_sim_regno (int reg)
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frv_register_sim_regno (struct gdbarch *gdbarch, int reg)
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{
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static const int spr_map[] =
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{
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@ -393,7 +393,7 @@ frv_register_sim_regno (int reg)
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H_SPR_FNER1, /* fner1_regnum */
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};
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gdb_assert (reg >= 0 && reg < gdbarch_num_regs (current_gdbarch));
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gdb_assert (reg >= 0 && reg < gdbarch_num_regs (gdbarch));
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if (first_gpr_regnum <= reg && reg <= last_gpr_regnum)
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return reg - first_gpr_regnum + SIM_FRV_GR0_REGNUM;
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@ -290,7 +290,7 @@ struct gdbarch startup_gdbarch =
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default_print_registers_info, /* print_registers_info */
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0, /* print_float_info */
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0, /* print_vector_info */
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0, /* register_sim_regno */
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legacy_register_sim_regno, /* register_sim_regno */
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cannot_register_not, /* cannot_fetch_register */
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cannot_register_not, /* cannot_store_register */
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0, /* get_longjmp_target */
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@ -1799,7 +1799,7 @@ gdbarch_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
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gdb_assert (gdbarch->register_sim_regno != NULL);
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if (gdbarch_debug >= 2)
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fprintf_unfiltered (gdb_stdlog, "gdbarch_register_sim_regno called\n");
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return gdbarch->register_sim_regno (reg_nr);
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return gdbarch->register_sim_regno (gdbarch, reg_nr);
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}
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void
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@ -296,7 +296,7 @@ extern void set_gdbarch_print_vector_info (struct gdbarch *gdbarch, gdbarch_prin
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/* MAP a GDB RAW register number onto a simulator register number. See
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also include/...-sim.h. */
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typedef int (gdbarch_register_sim_regno_ftype) (int reg_nr);
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typedef int (gdbarch_register_sim_regno_ftype) (struct gdbarch *gdbarch, int reg_nr);
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extern int gdbarch_register_sim_regno (struct gdbarch *gdbarch, int reg_nr);
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extern void set_gdbarch_register_sim_regno (struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno);
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@ -444,7 +444,7 @@ M:void:print_float_info:struct ui_file *file, struct frame_info *frame, const ch
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M:void:print_vector_info:struct ui_file *file, struct frame_info *frame, const char *args:file, frame, args
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# MAP a GDB RAW register number onto a simulator register number. See
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# also include/...-sim.h.
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f:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
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m:int:register_sim_regno:int reg_nr:reg_nr::legacy_register_sim_regno::0
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m:int:cannot_fetch_register:int regnum:regnum::cannot_register_not::0
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m:int:cannot_store_register:int regnum:regnum::cannot_register_not::0
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# setjmp/longjmp support.
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@ -241,9 +241,9 @@ m32c_register_type (struct gdbarch *arch, int reg_nr)
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static int
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m32c_register_sim_regno (int reg_nr)
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m32c_register_sim_regno (struct gdbarch *gdbarch, int reg_nr)
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{
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return gdbarch_tdep (current_gdbarch)->regs[reg_nr].sim_num;
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return gdbarch_tdep (gdbarch)->regs[reg_nr].sim_num;
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}
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@ -4982,19 +4982,17 @@ mips_dwarf_dwarf2_ecoff_reg_to_regnum (int num)
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}
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static int
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mips_register_sim_regno (int regnum)
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mips_register_sim_regno (struct gdbarch *gdbarch, int regnum)
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{
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/* Only makes sense to supply raw registers. */
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
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/* FIXME: cagney/2002-05-13: Need to look at the pseudo register to
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decide if it is valid. Should instead define a standard sim/gdb
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register numbering scheme. */
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if (gdbarch_register_name (current_gdbarch,
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gdbarch_num_regs
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(current_gdbarch) + regnum) != NULL
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&& gdbarch_register_name (current_gdbarch,
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gdbarch_num_regs
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(current_gdbarch) + regnum)[0] != '\0')
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if (gdbarch_register_name (gdbarch,
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gdbarch_num_regs (gdbarch) + regnum) != NULL
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&& gdbarch_register_name (gdbarch,
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gdbarch_num_regs (gdbarch) + regnum)[0] != '\0')
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return regnum;
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else
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return LEGACY_SIM_REGNO_IGNORE;
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@ -269,10 +269,10 @@ gdb_os_error (host_callback * p, const char *format,...)
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}
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int
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one2one_register_sim_regno (int regnum)
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one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum)
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{
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/* Only makes sense to supply raw registers. */
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch));
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gdb_assert (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch));
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return regnum;
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}
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@ -342,17 +342,17 @@ init_sim_regno_table (struct gdbarch *arch)
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/* Given a GDB register number REG, return the corresponding SIM
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register number. */
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static int
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rs6000_register_sim_regno (int reg)
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rs6000_register_sim_regno (struct gdbarch *gdbarch, int reg)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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int sim_regno;
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if (tdep->sim_regno == NULL)
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init_sim_regno_table (current_gdbarch);
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init_sim_regno_table (gdbarch);
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gdb_assert (0 <= reg
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&& reg <= gdbarch_num_regs (current_gdbarch)
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+ gdbarch_num_pseudo_regs (current_gdbarch));
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&& reg <= gdbarch_num_regs (gdbarch)
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+ gdbarch_num_pseudo_regs (gdbarch));
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sim_regno = tdep->sim_regno[reg];
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if (sim_regno >= 0)
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}
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static int
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score_register_sim_regno (int regnum)
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score_register_sim_regno (struct gdbarch *gdbarch, int regnum)
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{
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gdb_assert (regnum >= 0 && regnum < SCORE_NUM_REGS);
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return regnum;
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}
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static int
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sh_dsp_register_sim_regno (int nr)
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sh_dsp_register_sim_regno (struct gdbarch *gdbarch, int nr)
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{
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if (legacy_register_sim_regno (nr) < 0)
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return legacy_register_sim_regno (nr);
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if (legacy_register_sim_regno (gdbarch, nr) < 0)
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return legacy_register_sim_regno (gdbarch, nr);
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if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
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return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
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if (nr == MOD_REGNUM)
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@ -2304,7 +2304,7 @@ sh_dsp_register_sim_regno (int nr)
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}
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static int
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sh_sh2a_register_sim_regno (int nr)
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sh_sh2a_register_sim_regno (struct gdbarch *gdbarch, int nr)
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{
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switch (nr)
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{
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@ -2329,7 +2329,7 @@ sh_sh2a_register_sim_regno (int nr)
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default:
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break;
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}
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return legacy_register_sim_regno (nr);
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return legacy_register_sim_regno (gdbarch, nr);
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}
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/* Set up the register unwinding such that call-clobbered registers are
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/* Treat all raw registers as valid. */
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extern int one2one_register_sim_regno (int regnum);
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extern int one2one_register_sim_regno (struct gdbarch *gdbarch, int regnum);
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#endif
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