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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
Keith Walker <keith.walker@arm.com> * tc-arm.c (ARM_EXT_V5J, ARM_ARCH_V5TEJ): Define. (insns): Add pattern for bxj instruction. (do_bxj): New function. (arm_cpus): Add arm926ej. (arm_archs): Add armv5tej. Testsuite: 2002-01-18 Richard Earnshaw <rearnsha@arm.com> Keith Walker <keith.walker@arm.com> * gas/arm/arch5tej.s gas/arm/arch5tej.d: New files. * gas/arm/arm.exp (arch5tej): New dump test.
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@ -1,3 +1,12 @@
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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Keith Walker <keith.walker@arm.com>
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* tc-arm.c (ARM_EXT_V5J, ARM_ARCH_V5TEJ): Define.
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(insns): Add pattern for bxj instruction.
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(do_bxj): New function.
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(arm_cpus): Add arm926ej.
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(arm_archs): Add armv5tej.
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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* doc/c-arm.texi: Add new fpe options to list of supported flags.
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@ -54,6 +54,7 @@
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#define ARM_EXT_V5T 0x00000100 /* Thumb v2. */
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#define ARM_EXT_V5ExP 0x00000200 /* DSP core set. */
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#define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */
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#define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
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/* Co-processor space extensions. */
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#define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */
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@ -79,6 +80,7 @@
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#define ARM_ARCH_V5T (ARM_ARCH_V5 | ARM_EXT_V4T | ARM_EXT_V5T)
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#define ARM_ARCH_V5TExP (ARM_ARCH_V5T | ARM_EXT_V5ExP)
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#define ARM_ARCH_V5TE (ARM_ARCH_V5TExP | ARM_EXT_V5E)
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#define ARM_ARCH_V5TEJ (ARM_ARCH_V5TE | ARM_EXT_V5J)
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/* Processors with specific extensions in the co-processor space. */
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#define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE)
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@ -746,7 +748,7 @@ static void do_ldstv4 PARAMS ((char *));
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/* ARM v4T. */
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static void do_bx PARAMS ((char *));
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/* ARM v5. */
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/* ARM v5T. */
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static void do_blx PARAMS ((char *));
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static void do_bkpt PARAMS ((char *));
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static void do_clz PARAMS ((char *));
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@ -754,17 +756,20 @@ static void do_lstc2 PARAMS ((char *));
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static void do_cdp2 PARAMS ((char *));
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static void do_co_reg2 PARAMS ((char *));
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/* ARM v5ExP. */
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/* ARM v5TExP. */
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static void do_smla PARAMS ((char *));
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static void do_smlal PARAMS ((char *));
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static void do_smul PARAMS ((char *));
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static void do_qadd PARAMS ((char *));
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/* ARM v5E. */
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/* ARM v5TE. */
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static void do_pld PARAMS ((char *));
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static void do_ldrd PARAMS ((char *));
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static void do_co_reg2c PARAMS ((char *));
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/* ARM v5TEJ. */
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static void do_bxj PARAMS ((char *));
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/* Coprocessor Instructions. */
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static void do_cdp PARAMS ((char *));
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static void do_lstc PARAMS ((char *));
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@ -1105,7 +1110,7 @@ static const struct asm_opcode insns[] =
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not support Thumb. */
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{"bx", 0xe12fff10, 2, ARM_EXT_V4T | ARM_EXT_V5, do_bx},
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/* ARM Architecture 5. */
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/* ARM Architecture 5T. */
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/* Note: blx has 2 variants, so the .value is set dynamically.
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Only one of the variants has conditional execution. */
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{"blx", 0xe0000000, 3, ARM_EXT_V5, do_blx},
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@ -1119,7 +1124,7 @@ static const struct asm_opcode insns[] =
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{"mcr2", 0xfe000010, 0, ARM_EXT_V5, do_co_reg2},
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{"mrc2", 0xfe100010, 0, ARM_EXT_V5, do_co_reg2},
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/* ARM Architecture 5ExP. */
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/* ARM Architecture 5TExP. */
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{"smlabb", 0xe1000080, 6, ARM_EXT_V5ExP, do_smla},
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{"smlatb", 0xe10000a0, 6, ARM_EXT_V5ExP, do_smla},
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{"smlabt", 0xe10000c0, 6, ARM_EXT_V5ExP, do_smla},
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@ -1146,7 +1151,7 @@ static const struct asm_opcode insns[] =
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{"qsub", 0xe1200050, 4, ARM_EXT_V5ExP, do_qadd},
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{"qdsub", 0xe1600050, 5, ARM_EXT_V5ExP, do_qadd},
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/* ARM Architecture 5E. */
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/* ARM Architecture 5TE. */
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{"pld", 0xf450f000, 0, ARM_EXT_V5E, do_pld},
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{"ldrd", 0xe00000d0, 3, ARM_EXT_V5E, do_ldrd},
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{"strd", 0xe00000f0, 3, ARM_EXT_V5E, do_ldrd},
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@ -1154,6 +1159,9 @@ static const struct asm_opcode insns[] =
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{"mcrr", 0xec400000, 4, ARM_EXT_V5E, do_co_reg2c},
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{"mrrc", 0xec500000, 4, ARM_EXT_V5E, do_co_reg2c},
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/* ARM Architecture 5TEJ. */
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{"bxj", 0xe12fff20, 3, ARM_EXT_V5J, do_bxj},
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/* Core FPA instruction set (V1). */
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{"wfs", 0xee200110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
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{"rfs", 0xee300110, 3, FPU_FPA_EXT_V1, do_fpa_ctrl},
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@ -3876,6 +3884,28 @@ do_co_reg2 (str)
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end_of_line (str);
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}
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/* ARM v5TEJ. Jump to Jazelle code. */
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static void
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do_bxj (str)
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char * str;
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{
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int reg;
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skip_whitespace (str);
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if ((reg = reg_required_here (&str, 0)) == FAIL)
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{
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inst.error = BAD_ARGS;
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return;
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}
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/* Note - it is not illegal to do a "bxj pc". Useless, but not illegal. */
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if (reg == REG_PC)
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as_tsktsk (_("use of r15 in bxj is not really useful"));
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end_of_line (str);
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}
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/* THUMB V5 breakpoint instruction (argument parse)
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BKPT <immed_8>. */
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@ -10741,6 +10771,7 @@ static struct arm_cpu_option_table arm_cpus[] =
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should really set the FPU type explicitly. */
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{"arm9e-r0", ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
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{"arm9e", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
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{"arm926ej", ARM_ARCH_V5TEJ, FPU_ARCH_VFP_V2},
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{"arm946e-r0", ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
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{"arm946e", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
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{"arm966e-r0", ARM_ARCH_V5TExP, FPU_ARCH_VFP_V2},
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@ -10785,6 +10816,7 @@ static struct arm_arch_option_table arm_archs[] =
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{"armv5txm", ARM_ARCH_V5TxM, FPU_ARCH_VFP},
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{"armv5te", ARM_ARCH_V5TE, FPU_ARCH_VFP},
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{"armv5texp", ARM_ARCH_V5TExP, FPU_ARCH_VFP},
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{"armv5tej", ARM_ARCH_V5TEJ, FPU_ARCH_VFP},
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{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP},
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{NULL, 0, 0}
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};
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@ -1,3 +1,9 @@
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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Keith Walker <keith.walker@arm.com>
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* gas/arm/arch5tej.s gas/arm/arch5tej.d: New files.
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* gas/arm/arm.exp (arch5tej): New dump test.
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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* gas/arm/vfp1.d: Use new command-line options.
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15
gas/testsuite/gas/arm/arch5tej.d
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15
gas/testsuite/gas/arm/arch5tej.d
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@ -0,0 +1,15 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: ARM Architecture v5TEJ instructions
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#as: -march=armv5tej
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# Test the ARM Architecture v5TEJ instructions
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.*: +file format .*arm.*
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Disassembly of section .text:
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0+00 <[^>]*> e12fff20 ? bxj r0
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0+04 <[^>]*> e12fff21 ? bxj r1
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0+08 <[^>]*> e12fff2e ? bxj lr
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0+0c <[^>]*> 012fff20 ? bxjeq r0
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0+10 <[^>]*> 412fff20 ? bxjmi r0
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0+14 <[^>]*> 512fff27 ? bxjpl r7
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9
gas/testsuite/gas/arm/arch5tej.s
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9
gas/testsuite/gas/arm/arch5tej.s
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@ -0,0 +1,9 @@
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.text
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.align 0
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label:
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bxj r0
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bxj r1
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bxj r14
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bxjeq r0
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bxjmi r0
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bxjpl r7
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@ -35,6 +35,8 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
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gas_test "arch4t.s" "-marmv4t" $stdoptlist "Arm architecture 4t instructions"
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run_dump_test "arch5tej"
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gas_test "copro.s" "" $stdoptlist "Co processor instructions"
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gas_test "immed.s" "" $stdoptlist "immediate expressions"
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