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* nlmstub.def: Removed, this was moved to nlm/gdbserve.def

Browse Source 
long ago.

* config/alpha/{alpha-nw.mt, gdbserve.mt, tm-alphanw.h}: Removed.
* nlm/{README-ALPHA-NETWARE, aio.h, alpha-io.S, alpha-regdef.h,
  alpha.c, alpha.h, altdebug.h}: Removed.
This commit is contained in:
J.T. Conklin 1995-03-15 22:00:30 +00:00
parent 68c1bc9ca1
commit f919f30267
10 changed files with 0 additions and 1404 deletions
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3
gdb/config/alpha/alpha-nw.mt
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# Target: Little-endian Alpha
TDEPFILES= alpha-tdep.o
TM_FILE= tm-alphanw.h

3
gdb/config/alpha/gdbserve.mt
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# Target: GDBSERVE.NLM running on a little-endian Alpha
TDEPFILES= alpha.o alpha-io.o
CPU_FILE= alpha

14
gdb/config/alpha/tm-alphanw.h
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/* GDB target definitions for Alpha running Netware. */
/* Alpha/Netware uses NT PALcode, which causes call_pal bpt to give the PC of the
actual breakpoint, not PC+4, (like the OSF1 PALcode). */
#define DECR_PC_AFTER_BREAK 0
#define VM_MIN_ADDRESS ((CORE_ADDR)0)
#include "alpha/tm-alpha.h"
/* Stop backtracing when we wander into main. */
#define FRAME_CHAIN_VALID_ALTERNATE

60
gdb/nlm/README-ALPHA-NETWARE
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This is a preliminary release of GDB and GDBSERVE.NLM for Alpha/Netware.
Building this release is very straightforward. You just need to do the
following:
1) Unpack the release. gunzip < gdb-4.12.3.tar.gz | tar xvf -
should do the trick.
2) cd gdb-4.12.3
3) ./configure --target alpha-netware
4) make BISON=yacc [You can use either gcc, or the DEC compiler here].
Building GDBSERVE.NLM:
1) cd gdb-4.12.3/gdb/nlm
2) Edit Makefile, and change the value to NWAXPDEV to point at the
DEC development kit.
3) make
To debug a program, you need to install GDBSERVE.NLM on your server in
[SYSTEM] (or, anywhere in your search path). Then, connect your netware
server to the host with a null modem cable. Start up the app you want to
debug by doing `gdbserve 0 0 APPNAME APP-ARGS ...'. At this point, the
server will be stopped inside of GDBSERVE, waiting for debugger commands
from the serial line. Now, you run GDB on a copy of the app .o file,
and do a target command to connect to the server. `gdb foo.o', then
(gdb) target remote /dev/tty00. Note that foo.o should not be the NLM.
It should be the file that is input to alphanlm or nlmconv.
At this point, GDB should be paused at the first instruction of the program
(that's probably _Prelude). You can put a breakpoint at main, and then do
a continue command to debug your program. At that point, normal step/next
commands, backtrace, etc should work.
Known problems:
Sometimes you will see messages like the following:
warning: Hit heuristic-fence-post without finding
warning: enclosing function for address 0x1112f1f0
These can be ignored. They are usually associated with stepping over
external functions (like printf).
Function calling (ie: print foo(42)) is very slow. A fix for this is in
the works.
Due to last minute problems with GAS, I was not able to build GDBSERVE.NLM
with our tools, and I was unable to test code compiled with our tools. This
should not be a problem, as GDB will quite happily debug programs compiled
with either GCC, or the DEC tools. For the time being, GDBSERVE will be
compiled with the DEC tools.
We can't build prelude.o because the DEC dev kit didn't supply libhooks.h.
For the time being, I have just copied prelude.o from the DEC dev kit into
the GDB kit.
In case of problems:
If GDB hangs when talking to the target, try turning on remote debugging
(you can use ^C to wake up GDB if necessary). To do this, just type
`set remotedebug 1'. This will print out the protocol packets whenever
GDB and GDBSERVE talk to each other.

639
gdb/nlm/aio.h
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#ifndef _AIO_H_
#define _AIO_H_
/*----------------------------------------------------------------------------*
* *
* NetWare 386 Developer's Asynchronous I/O (AIO) Runtime library *
* *
* This include file defines the constants and prototypes required *
* to use the AIO application interface. *
* *
* (c) Copyright. 1991 Novell, Inc. All rights reserved. *
* *
*----------------------------------------------------------------------------*/
typedef unsigned long DWORD;
/*----------------------------------------------------------------------------*
* *
* Predefined hardware types for use with the AIOAcquirePort function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_COMX_TYPE (1)
#define AIO_ARTIC_TYPE (2)
#define AIO_WNIM_TYPE (3)
/*----------------------------------------------------------------------------*
* *
* Function completion code status values. *
* *
* Note that all error statuses are negative values. *
* *
*----------------------------------------------------------------------------*/
#define AIO_SUCCESS (0)
#define AIO_BAD_HANDLE (-1)
#define AIO_FAILURE (-2)
#define AIO_FUNC_NOT_SUPPORTED (-3)
#define AIO_INVALID_PARAMETER (-5)
#define AIO_PORT_NOT_AVAILABLE (-6)
#define AIO_QUALIFIED_SUCCESS (-7)
#define AIO_NO_MORE_PORTS (-8)
#define AIO_TYPE_NUMBER_INVALID (-10)
#define AIO_BOARD_NUMBER_INVALID (-11)
#define AIO_PORT_NUMBER_INVALID (-12)
#define AIO_RESOURCE_TAG_INVALID (-13)
#define AIO_DATA_PRESENT (-14)
#define AIO_BAD_REQUEST_TYPE (-15)
#define AIO_PORT_GONE (-20)
#define AIO_RTAG_INVALID (-21)
/* This is only for non-CLIB application */
#define ASYNCIOSignature 0x4E595341 /* 'NYSA' */
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOSetExternalControl function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_EXTERNAL_CONTROL (1)
#define AIO_EXTCTRL_DTR (1)
#define AIO_EXTCTRL_RTS (2)
#define AIO_BREAK_CONTROL (2)
#define AIO_SET_BREAK_OFF (0)
#define AIO_SET_BREAK_ON (1)
#define AIO_FLOW_CONTROL (3)
#define AIO_SOFTWARE_FLOW_CONTROL_OFF (0)
#define AIO_SOFTWARE_FLOW_CONTROL_ON (1)
#define AIO_HARDWARE_FLOW_CONTROL_OFF (0)
#define AIO_HARDWARE_FLOW_CONTROL_ON (2)
#define AIO_FLOW_CONTROL_CHARACTERS (4)
#define AIO_SET_DEADMAN_TIMER (5)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetExternalStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_EXTSTA_RI (0x00000001)
#define AIO_EXTSTA_DCD (0x00000008)
#define AIO_EXTSTA_DSR (0x00000010)
#define AIO_EXTSTA_CTS (0x00000020)
#define AIO_EXTSTA_BREAK (0x00000080)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOFlushBuffers function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_FLUSH_WRITE_BUFFER (0x0001)
#define AIO_FLUSH_READ_BUFFER (0x0002)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOReadStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_RECEIVE_ACTIVE (0)
#define AIO_RECEIVE_FULL (1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOWriteStatus function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_TRANSMIT_IDLE (0)
#define AIO_TRANSMIT_ACTIVE (1)
#define AIO_TRANSMIT_XOFFED (2)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOAcquirePort function. *
* *
*----------------------------------------------------------------------------*/
#define AIO_HARDWARE_TYPE_WILDCARD (-1)
#define AIO_BOARD_NUMBER_WILDCARD (-1)
#define AIO_PORT_NUMBER_WILDCARD (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOConfigurePort function. *
* *
*----------------------------------------------------------------------------*/
/* BitRate */
#define AIO_BAUD_50 (0)
#define AIO_BAUD_75 (1)
#define AIO_BAUD_110 (2)
#define AIO_BAUD_134p5 (3)
#define AIO_BAUD_150 (4)
#define AIO_BAUD_300 (5)
#define AIO_BAUD_600 (6)
#define AIO_BAUD_1200 (7)
#define AIO_BAUD_1800 (8)
#define AIO_BAUD_2000 (9)
#define AIO_BAUD_2400 (10)
#define AIO_BAUD_3600 (11)
#define AIO_BAUD_4800 (12)
#define AIO_BAUD_7200 (13)
#define AIO_BAUD_9600 (14)
#define AIO_BAUD_19200 (15)
#define AIO_BAUD_38400 (16)
#define AIO_BAUD_57600 (17)
#define AIO_BAUD_115200 (18)
/* DataBits */
#define AIO_DATA_BITS_5 (0)
#define AIO_DATA_BITS_6 (1)
#define AIO_DATA_BITS_7 (2)
#define AIO_DATA_BITS_8 (3)
/* StopBits */
#define AIO_STOP_BITS_1 (0)
#define AIO_STOP_BITS_1p5 (1)
#define AIO_STOP_BITS_2 (2)
/* Parity */
#define AIO_PARITY_NONE (0)
#define AIO_PARITY_ODD (1)
#define AIO_PARITY_EVEN (2)
#define AIO_PARITY_MARK (3)
#define AIO_PARITY_SPACE (4)
/* FlowControl */
#define AIO_SOFTWARE_FLOWCONTROL_OFF (0)
#define AIO_SOFTWARE_FLOWCONTROL_ON (1)
#define AIO_HARDWARE_FLOWCONTROL_OFF (0)
#define AIO_HARDWARE_FLOWCONTROL_ON (2)
#define AIO_DROPOUT_VALUE (0xFF)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOPORTCAPABILITIES structure. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of capabilities data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
BYTE minBitRate; /* minimum bit rate index supported */
BYTE maxBitRate; /* maximum bit rate index supported */
BYTE minDataBits; /* minimum data bits per char index supported */
BYTE maxDataBits; /* maximum data bits per char index supported */
BYTE minStopBits; /* minimum stop bits per char index supported */
BYTE maxStopBits; /* maximum stop bits per char index supported */
BYTE minParityMode; /* minimum parity mode index supported */
BYTE maxParityMode; /* maximum parity mode index supported */
BYTE minFlowCtrlMode; /* minimum flow control mode index supported */
BYTE maxFlowCtrlMode; /* maximum flow control mode index supported */
LONG miscCapabilities; /* miscellaneous capability flags */
LONG minReadBufferSize; /* minimum length of receive buffer */
LONG maxReadBufferSize; /* maximum length of receive buffer */
LONG minWriteBufferSize; /* minimum length of transmit buffer */
LONG maxWriteBufferSize; /* maximum length of transmit buffer */
WORD minDeadmanTime; /* minimum deadman time (seconds) */
WORD maxDeadmanTime; /* maximum deadman time (seconds) */
} AIOPORTCAPABILITIES;
#define AIO_PORT_NS_MINBITRATE (0x80000000)
#define AIO_PORT_NS_MAXBITRATE (0x40000000)
#define AIO_PORT_NS_MINDATABITS (0x20000000)
#define AIO_PORT_NS_MAXDATABITS (0x10000000)
#define AIO_PORT_NS_MINSTOPBITS (0x08000000)
#define AIO_PORT_NS_MAXSTOPBITS (0x04000000)
#define AIO_PORT_NS_MINPARITYMODE (0x02000000)
#define AIO_PORT_NS_MAXPARITYMODE (0x01000000)
#define AIO_PORT_NS_MINFLOWCTRLMODE (0x00800000)
#define AIO_PORT_NS_MAXFLOWCTRLMODE (0x00400000)
#define AIO_PORT_NS_MISCCAPABILITIES (0x00200000)
#define AIO_PORT_NS_MINREADBUFFERSIZE (0x00100000)
#define AIO_PORT_NS_MAXREADBUFFERSIZE (0x00080000)
#define AIO_PORT_NS_MINWRITEBUFFERSIZE (0x00040000)
#define AIO_PORT_NS_MAXWRITEBUFFERSIZE (0x00020000)
#define AIO_PORT_NS_MINDEADMANTIME (0x00010000)
#define AIO_PORT_NS_MAXDEADMANTIME (0x00008000)
#define AIO_PORT_CAPS_NOT_SUPPORTED (0x00007FFF)
#define AIO_PORT_CAPS_MAJOR_VERSION (1)
#define AIO_PORT_CAPS_MINOR_VERSION (0)
#define AIO_CAP_OUTPUT_BREAK (0x00000002)
#define AIO_CAP_FLOWCTRLCHARS (0x00000004)
#define AIO_CAP_PROGRAMMABLE (0x00000008)
#define AIO_CAP_INPUT (0x00000010)
#define AIO_CAP_OUTPUT (0x00000020)
typedef struct
{
WORD returnLength; /* byte length of driver capabilities structure */
BYTE byteData[2];
} AIODVRCAPABILITIES;
#define AIO_NO_STRUCT_DATA_RETURNED (2)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetPortsRollCall function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port info data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
int hardwareType; /* value used with AIOAcquirePort */
int boardNumber; /* " */
int portNumber; /* " */
WORD availability; /* availability of port for acquire */
LONG externalStatus; /* current external status value for port */
LONG chgdExternalStatus; /* changed external status value for port */
} AIOPORTINFO;
#define AIO_INFO_NS_HARDWARETYPE (0x80000000)
#define AIO_INFO_NS_BOARDNUMBER (0x40000000)
#define AIO_INFO_NS_PORTNUMBER (0x20000000)
#define AIO_INFO_NS_AVAILABILITY (0x10000000)
#define AIO_INFO_NS_EXTERNALSTATUS (0x08000000)
#define AIO_INFO_NS_CHGDEXTERNALSTATUS (0x04000000)
#define AIO_PORT_INFO_NOT_SUPPORTED (0x03FFFFFF)
#define AIO_PORT_INFO_MAJOR_VERSION (1)
#define AIO_PORT_INFO_MINOR_VERSION (0)
#define AIO_AVAILABLE_FOR_ACQUIRE (0)
#define AIO_ALREADY_ACQUIRED (1)
#define AIO_UNAVAILABLE (0xFF)
#define AIO_INITIAL (0)
#define AIO_SUCCESSOR (1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetPortConfiguration function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port configuration data */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
int hardwareType; /* value used with AIOAcquirePort */
int boardNumber; /* " */
int portNumber; /* " */
BYTE bitRate; /* Bits per second index */
BYTE dataBits; /* Bits per character index */
BYTE stopBits; /* Stop bits per char index */
BYTE parityMode; /* Generated parity index */
BYTE flowCtrlMode; /* Flow control mode */
BYTE breakMode; /* Break control mode */
LONG readSize; /* Receive buffer size */
LONG writeSize; /* Transmit buffer size */
BYTE transmitXon;
BYTE transmitXoff;
BYTE receiveXon;
BYTE receiveXoff;
WORD externalControl; /* set with AIO_EXTERNAL_CONTROL */
} AIOPORTCONFIG;
#define AIO_CONFIG_NS_HARDWARETYPE (0x80000000)
#define AIO_CONFIG_NS_BOARDNUMBER (0x40000000)
#define AIO_CONFIG_NS_PORTNUMBER (0x20000000)
#define AIO_CONFIG_NS_BITRATE (0x10000000)
#define AIO_CONFIG_NS_DATABITS (0x08000000)
#define AIO_CONFIG_NS_STOPBITS (0x04000000)
#define AIO_CONFIG_NS_PARITYMODE (0x02000000)
#define AIO_CONFIG_NS_FLOWCTRLMODE (0x01000000)
#define AIO_CONFIG_NS_BREAKMODE (0x00800000)
#define AIO_CONFIG_NS_READSIZE (0x00400000)
#define AIO_CONFIG_NS_WRITESIZE (0x00200000)
#define AIO_CONFIG_NS_TRANSMITXON (0x00100000)
#define AIO_CONFIG_NS_TRANSMITXOFF (0x00080000)
#define AIO_CONFIG_NS_RECEIVEXON (0x00040000)
#define AIO_CONFIG_NS_RECEIVEXOFF (0x00020000)
#define AIO_CONFIG_NS_EXTERNALCONTROL (0x00010000)
#define AIO_PORT_CONFIG_NOT_SUPPORTED (0x0007FFFF)
#define AIO_PORT_CONFIG_MAJOR_VERSION (1)
#define AIO_PORT_CONFIG_MINOR_VERSION (0)
#define AIO_EXTCTRL_DTR_ENABLE (1)
#define AIO_EXTCTRL_DTR_DISABLE (0)
#define AIO_EXTCTRL_RTS_ENABLE (2)
#define AIO_EXTCTRL_RTS_DISABLE (0)
#define AIO_BREAK_MODE_OFF (0)
#define AIO_BREAK_MODE_ON (1)
typedef struct
{
WORD returnLength; /* byte length of driver config structure */
BYTE byteData[2];
} AIODVRCONFIG;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with the AIOGetStatistics function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of port statistics structure */
BYTE majorVersion;
BYTE minorVersion;
LONG notSupportedMask;
LONG receiveBytes; /* total number of bytes received on port */
LONG transmitBytes; /* total number of bytes transmitted from port */
LONG parityErrors; /* number of receive parity errors */
LONG framingErrors; /* number of receive framing errors */
LONG overrunSoftware; /* number of software overruns (occurrences) */
LONG overrunHardware; /* number of hardware overruns (occurrences) */
} AIOPORTSTATISTICS;
#define AIO_STATS_NS_RECEIVEBYTES (0x80000000)
#define AIO_STATS_NS_TRANSMITBYTES (0x40000000)
#define AIO_STATS_NS_PARITYERRORS (0x20000000)
#define AIO_STATS_NS_FRAMINGERRORS (0x10000000)
#define AIO_STATS_NS_OVERRUNSOFTWARE (0x08000000)
#define AIO_STATS_NS_OVERRUNHARDWARE (0x04000000)
#define AIO_PORT_STATS_NOT_SUPPORTED (0x03FFFFFF)
#define AIO_PORT_STATS_MAJOR_VERSION (1)
#define AIO_PORT_STATS_MINOR_VERSION (0)
typedef struct
{
WORD returnLength; /* byte length of driver statistics structure */
BYTE byteData[2];
} AIODVRSTATISTICS;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetDriverList function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int hardwareType;
int ports;
char name[128];
} AIODRIVERLISTENTRY;
typedef struct
{
WORD returnLength;
AIODRIVERLISTENTRY driver[1];
} AIODRIVERLIST;
#define AIO_DRIVER_LIST_GET_FIRST (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetBoardList function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int boardNumber;
int ports;
char name[128];
} AIOBOARDLISTENTRY;
typedef struct
{
WORD returnLength;
AIOBOARDLISTENTRY board[1];
} AIOBOARDLIST;
#define AIO_BOARD_LIST_GET_FIRST (-1)
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOSetControlData function. *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
WORD returnLength; /* byte length of control data structure */
BYTE byteData[2];
} AIOCONTROLDATA;
/*----------------------------------------------------------------------------*
* *
* Definitions for use with AIOGetFirstPortInfo and AIOGetNextPortInfo *
* *
*----------------------------------------------------------------------------*/
typedef struct
{
int typeMask;
int boardMask;
int portMask;
int reserved[6];
} AIOPORTSEARCH;
/* reserved index values */
#define SEARCH_TYPE_INDEX 0
#define SEARCH_BOARD_INDEX 1
#define SEARCH_PORT_INDEX 2
/*----------------------------------------------------------------------------*
* *
* Definition of AIO functions. *
* *
*----------------------------------------------------------------------------*/
extern int AIOAcquirePort ( int *hardwareType,
int *boardNumber,
int *portNumber,
int *portHandle
);
extern int AIOAcquirePortWithRTag ( int *hardwareType,
int *boardNumber,
int *portNumber,
int *portHandle,
LONG RTag
);
extern int AIOConfigurePort ( int portHandle,
BYTE bitRate,
BYTE dataBits,
BYTE stopBits,
BYTE parityMode,
BYTE flowCtrlMode
);
extern int AIOFlushBuffers ( int portHandle,
WORD flushFlag
);
extern int AIOGetBoardList( int hardwareType,
int boardIndex,
AIOBOARDLIST *pBoardList );
extern int AIOGetDriverList ( int lastHardwareType,
AIODRIVERLIST *pDriverList
);
extern int AIOGetExternalStatus ( int portHandle,
LONG *extStatus,
LONG *chgdExtStatus
);
extern int AIOGetFirstPortInfo ( int hardwareType,
int boardNumber,
int portNumber,
AIOPORTSEARCH *portSearchP,
AIOPORTINFO *portInfoP,
AIOPORTCAPABILITIES *capabilitiesP,
AIODVRCAPABILITIES *dvrCapabilitiesP,
char *NLMModuleNameP );
extern int AIOGetNextPortInfo ( AIOPORTSEARCH *portSearchP,
AIOPORTINFO *portInfoP,
AIOPORTCAPABILITIES *capabilitiesP,
AIODVRCAPABILITIES *dvrCapabilitiesP,
char *NLMModuleNameP );
extern int AIOGetPortCapability ( int portHandle,
AIOPORTCAPABILITIES *pCapabilities,
AIODVRCAPABILITIES *pDvrCapabilities
);
extern int AIOGetPortConfiguration ( int portHandle,
AIOPORTCONFIG *pPortConfig,
AIODVRCONFIG *pDvrConfig
);
extern int AIOGetPortStatus ( int portHandle,
LONG *writeCount,
WORD *writeState,
LONG *readCount,
WORD *readState,
LONG *extStatus,
LONG *chgdExtStatus
);
extern int AIOGetReadBufferSize ( int portHandle,
LONG *readSize
);
extern int AIOGetPortStatistics ( int portHandle,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetFirstPortStatistics( int hardwareType,
int boardNumber,
int portNumber,
AIOPORTSEARCH *portSearchP,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetNextPortStatistics ( AIOPORTSEARCH *portSearchP,
AIOPORTSTATISTICS *pPortStatistics,
AIODVRSTATISTICS *pDvrStatistics
);
extern int AIOGetWriteBufferSize ( int portHandle,
LONG *writeSize
);
extern int AIOReadData ( int portHandle,
char *buffer,
LONG length,
LONG *numberBytesRead
);
extern int AIOReadStatus ( int portHandle,
LONG *count,
WORD *state
);
extern int AIOReleasePort ( int portHandle );
extern int AIOSetControlData ( int portHandle,
int requestType,
AIOCONTROLDATA *requestStructValue
);
extern int AIOSetExternalControl ( int portHandle,
int requestType,
int requestValue
);
extern int AIOSetFlowControl ( int portHandle,
int flowCtrlMode
);
extern int AIOSetFlowControlCharacters( int portHandle,
BYTE transmitXon,
BYTE transmitXoff,
BYTE receiveXon,
BYTE receiveXoff
);
extern int AIOSetReadBufferSize ( int portHandle,
LONG bufferSize
);
extern int AIOSetWriteBufferSize ( int portHandle,
LONG bufferSize
);
extern int AIOWriteData ( int portHandle,
char *buffer,
LONG length,
LONG *numberBytesWritten
);
extern int AIOWriteStatus ( int portHandle,
LONG *count,
WORD *state
);
#endif /* _AIO_H_ */

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gdb/nlm/alpha-io.S
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/*
* Copyright (C) 1993, 1994 by
* Digital Equipment Corporation, Maynard, Massachusetts.
* All rights reserved.
*
* This software is furnished under a license and may be used and copied
* only in accordance of the terms of such license and with the
* inclusion of the above copyright notice. This software or any other
* copies thereof may not be provided or otherwise made available to any
* other person. No title to and ownership of the software is hereby
* transferred.
*
* The information in this software is subject to change without notice
* and should not be construed as a commitment by Digital Equipment
* Corporation.
*
* Digital assumes no responsibility for the use or reliability of its
* software on equipment which is not supplied by Digital.
*
*/
#include "alpha-regdef.h"
#define LEAF_ENTRY(NAME) .text ; .align 4 ; .globl NAME ; .ent NAME, 0 ; NAME: ; .frame sp, 0, ra ; .prologue 0 ;
LEAF_ENTRY(flush_i_cache)
call_pal 0x86 /* IMB */
ret zero, (ra) /* return */
.end flush_i_cache
/* ++
*
* VOID
* outVti(
* ULONG Port
* ULONG Data
* )
*
* Routine Description:
*
* This Function Uses The 64-Bit Super-Page To Write Data To A Port
* Of The On-Board VTI Combo Chip For JENSEN.
*
* Arguments:
*
* Port (A0) - Port Number On VTI Chip To Which To Write Data
* data (a1) - data to write to the port, only low byte is significant
* To The VTI
*
* Return Value:
*
* None.
*
*/
LEAF_ENTRY(outVti)
/*
* generate super-page address of vti, base address
* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
* va<42:41> = 10 (binary) for super-page address
*/
lda t0, 0xc01c(zero) /* t0 = ffff ffff ffff c01c */
sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
/*
* Shift In The Port Number To Generate The Port Address We
* wish to access
* N.B. - Access Width Is Always Zero = Byte Access For VTI
*/
sll a0, 9, a0 /* a0 << 9 */
bis t0, a0, t0 /* T0 = Address Of VTI Port */
/*
* Do The Port Write, Guarantee That Subsequent Writes (And Reads)
* are ordered with respect to this write and return to caller
*/
stl a1, 0(t0) /* write data to port */
mb /* guarantee write ordering */
ret zero, (ra) /* return */
.end outVti
/*
*
* ULONG
* inVti(
* ULONG Port
* )
*
* Routine Description:
*
* This Function Uses The 64-Bit Super-Page To Read Data From A Port
* Of The On-Board VTI Combo Chip For JENSEN.
*
* Arguments:
*
* Port (A0) - Port Number On VTI Chip To Which To Write Data
*
* Return Value:
*
* Data (V0) - The Data Read From The VTI Chip, Only The Low Byte Will
* be valid
*
*/
LEAF_ENTRY(inVti)
/*
* generate super-page address of vti, base address
* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
* va<42:41> = 10 (binary) for super-page address
*/
lda t0, 0xc01c(zero) /* t0 = ffff ffff ffff c01c */
sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
/*
* Shift In The Port Number To Generate The Port Address We
* wish to access
* N.B. - Access Width For VTI Is Always 0 = Byte Access
*/
sll a0, 9, a0 /* a0 << 9 */
bis t0, a0, t0 /* T0 = Address Of VTI Port */
/*
* Do The Super-Page I/O Access And Return Data To Caller
*/
ldl v0, 0(t0) /* read data from port */
and v0, 0xff, v0
ret zero, (ra) /* return */
.end inVti

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gdb/nlm/alpha-regdef.h
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/*
* *****************************************************************
* * *
* * Copyright (c) Digital Equipment Corporation, 1991, 1992 *
* * *
* * All Rights Reserved. Unpublished rights reserved under *
* * the copyright laws of the United States. *
* * *
* * The software contained on this media is proprietary to *
* * and embodies the confidential technology of Digital *
* * Equipment Corporation. Possession, use, duplication or *
* * dissemination of the software and media is authorized only *
* * pursuant to a valid written license from Digital Equipment *
* * Corporation. *
* * *
* * RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure *
* * by the U.S. Government is subject to restrictions as set *
* * forth in Subparagraph (c)(1)(ii) of DFARS 252.227-7013, *
* * or in FAR 52.227-19, as applicable. *
* * *
* *****************************************************************
*/
/*
* HISTORY
*/
/*
* Modification History: /sys/machine/alpha/regdef.h
*
* 01-Oct-90 -- rjl
* Defined the k0 and k1 registers. They are not really used as such
* but they have to be defined in order for them to be saved during
* exception handling
*
* 06-Sep-90 -- kjl and afd
* Created this file for Alpha support.
*/
#define v0 $0
#define t0 $1
#define t1 $2
#define t2 $3
#define t3 $4
#define t4 $5
#define t5 $6
#define t6 $7
#define t7 $8
#define s0 $9
#define s1 $10
#define s2 $11
#define s3 $12
#define s4 $13
#define s5 $14
#define s6 $15
#define fp $15 /* fp & s6 are the same */
#define a0 $16
#define a1 $17
#define a2 $18
#define a3 $19
#define a4 $20
#define a5 $21
#define t8 $22
#define t9 $23
#define t10 $24
#define t11 $25
#define ra $26
#define pv $27 /* pv and t5 are the same */
#define t12 $27
#define AT $at
#define gp $29
#define sp $30
#define zero $31

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gdb/nlm/alpha.c
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#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <time.h>
#include <errno.h>
#include <nwtypes.h>
#include <nwdfs.h>
#include <nwconio.h>
#include <nwadv.h>
#include <nwdbgapi.h>
#include <nwthread.h>
#include <aio.h>
#include "alpha.h"
extern char *mem2hex (void *mem, char *buf, int count, int may_fault);
extern char *hex2mem (char *buf, void *mem, int count, int may_fault);
extern int computeSignal (int exceptionVector);
/* Get the registers out of the frame information. */
void
frame_to_registers (frame, regs)
struct StackFrame *frame;
char *regs;
{
mem2hex (&frame->ExceptionPC, &regs[PC_REGNUM * 8 * 2], 8 * 1, 0);
mem2hex (&frame->ExceptionRegs[SF_IREG_OFFSET], &regs[V0_REGNUM * 8 * 2], 8 * 64, 0);
}
/* Put the registers back into the frame information. */
void
registers_to_frame (regs, frame)
char *regs;
struct StackFrame *frame;
{
hex2mem (&regs[PC_REGNUM * 8 * 2], &frame->ExceptionPC, 8 * 1, 0);
hex2mem (&regs[V0_REGNUM * 8 * 2], &frame->ExceptionRegs[SF_IREG_OFFSET], 8 * 64, 0);
}
union inst
{
LONG l;
struct
{
union
{
struct
{
unsigned hint : 16;
unsigned rb : 5;
unsigned ra : 5;
unsigned opcode : 6;
} jump;
struct
{
signed disp : 21;
unsigned ra : 5;
unsigned opcode : 6;
} branch;
} variant;
} inst;
};
static LONG saved_inst;
static LONG *saved_inst_pc = 0;
static LONG saved_target_inst;
static LONG *saved_target_inst_pc = 0;
void
set_step_traps (frame)
struct StackFrame *frame;
{
union inst inst;
LONG *target;
int opcode;
int ra, rb;
LONG *pc = (LONG *)frame->ExceptionPC;
inst.l = *pc++;
opcode = inst.inst.variant.branch.opcode;
if ((opcode & 0x30) == 0x30) /* A branch of some sort */
target = inst.inst.variant.branch.disp + pc;
else if (opcode == 0x1a) /* jmp, ret, etc... */
target = (LONG *)(frame->ExceptionRegs[SF_IREG_OFFSET
+ inst.inst.variant.jump.rb].lo
& ~3);
else
target = pc;
saved_inst = *pc;
*pc = 0x80; /* call_pal bpt */
saved_inst_pc = pc;
if (target != pc)
{
saved_target_inst = *target;
*target = 0x80; /* call_pal bpt */
saved_target_inst_pc = target;
}
}
/* Remove step breakpoints. Returns non-zero if pc was at a step breakpoint,
zero otherwise. This routine works even if there were no step breakpoints
set. */
int
clear_step_traps (frame)
struct StackFrame *frame;
{
int retcode;
LONG *pc = (LONG *)frame->ExceptionPC;
if (saved_inst_pc == pc || saved_target_inst_pc == pc)
retcode = 1;
else
retcode = 0;
if (saved_inst_pc)
{
*saved_inst_pc = saved_inst;
saved_inst_pc = 0;
}
if (saved_target_inst_pc)
{
*saved_target_inst_pc = saved_target_inst;
saved_target_inst_pc = 0;
}
return retcode;
}
void
do_status (ptr, frame)
char *ptr;
struct StackFrame *frame;
{
int sigval;
sigval = computeSignal (frame->ExceptionNumber);
sprintf (ptr, "T%02x", sigval);
ptr += 3;
sprintf (ptr, "%02x:", PC_REGNUM);
ptr = mem2hex (&frame->ExceptionPC, ptr + 3, 8, 0);
*ptr++ = ';';
sprintf (ptr, "%02x:", SP_REGNUM);
ptr = mem2hex (&frame->ExceptionRegs[SF_IREG_OFFSET + SP_REGNUM], ptr + 3, 8, 0);
*ptr++ = ';';
sprintf (ptr, "%02x:", RA_REGNUM);
ptr = mem2hex (&frame->ExceptionRegs[SF_IREG_OFFSET + RA_REGNUM], ptr + 3, 8, 0);
*ptr++ = ';';
sprintf (ptr, "%02x:", FP_REGNUM);
ptr = mem2hex (&frame->ExceptionRegs[SF_IREG_OFFSET + FP_REGNUM], ptr + 3, 8, 0);
*ptr++ = ';';
*ptr = '\000';
}
/* This section provides stubs and equivalent interfaces for all functions that
the debugger stub needs, but aren't yet implemented (such as the AIO nlm). */
#include <nwtypes.h>
#include <errno.h>
#include <stdio.h>
#include <aio.h>
#define CONST const
#define com1Rbr 0x3f8 /* Receiver Buffer - Read */
#define com1Thr 0x3f8 /* Transmitter Holding - Write */
#define com1Ier 0x3f9 /* Interrupt Enable */
#define com1Iir 0x3fa /* Interrupt Identification */
#define com1Lcr 0x3fb /* Line Control */
#define com1Mcr 0x3fc /* Modem Control */
#define com1Lsr 0x3fd /* Line Status */
#define com1Msr 0x3fe /* Modem Status */
#define com1Scr 0x3ff /* Scratch */
#define com1Dll 0x3f8 /* Divisor Latch - lsb */
#define com1Dlm 0x3f9 /* Divisor Latch - msb */
#define com2Rbr 0x2f8 /* Receiver Buffer - Read */
#define com2Thr 0x2f8 /* Transmitter Holding - Write */
#define com2Ier 0x2f9 /* Interrupt Enable */
#define com2Iir 0x2fa /* Interrupt Identification */
#define com2Lcr 0x2fb /* Line Control */
#define com2Mcr 0x2fc /* Modem Control */
#define com2Lsr 0x2fd /* Line Status */
#define com2Msr 0x2fe /* Modem Status */
#define com2Scr 0x2ff /* Scratch */
#define com2Dll 0x2f8 /* Divisor Latch - lsb */
#define com2Dlm 0x2f9 /* Divisor Latch - msb */
#define COM1 0x8000
#define COM2 0x9000
static ULONG
uart_getchar (void)
{
while ((inVti(com1Lsr) & 1) == 0);
return inVti (com1Rbr);
}
static void
uart_putchar (char c)
{
while ((inVti(com1Lsr) & 0x20) == 0);
outVti (com1Thr,c);
}
static int
uart_init (int baud)
{
int i;
int baudconst;
baudconst = 115200 / baud;
outVti (com1Lcr, 0x87);
outVti (com1Dlm, 0);
outVti (com1Dll, baudconst);
outVti (com1Lcr, 0x07);
outVti (com1Mcr, 0x0F);
outVti (com1Ier, 0x0);
}
int
AIOReadData (int portHandle, char *buffer, LONG length, LONG *numberBytesRead)
{
ULONG c;
while (1)
{
c = uart_getchar ();
if ((c & ~0377) == COM1)
break;
}
*buffer = c;
*numberBytesRead = 1;
return AIO_SUCCESS;
}
int
AIOWriteData (int portHandle, char *buffer, LONG length,
LONG *numberBytesWritten)
{
*numberBytesWritten = length;
while (length-- > 0)
uart_putchar (*buffer++);
return AIO_SUCCESS;
}
int
AIOAcquirePort (int *hardwareType, int *boardNumber, int *portNumber,
int *portHandle)
{
return AIO_SUCCESS;
}
int
AIOConfigurePort (int portHandle, BYTE bitRate, BYTE dataBits, BYTE stopBits,
BYTE parityMode, BYTE flowCtrlMode)
{
uart_init (9600);
return AIO_SUCCESS;
}
int
AIOGetPortConfiguration (int portHandle, AIOPORTCONFIG *pPortConfig,
AIODVRCONFIG *pDvrConfig)
{
fprintf (stderr, "AIOGetPortConfiguration stubbed out\n");
exit (1);
}
int
AIOReleasePort (int portHandle)
{
return AIO_SUCCESS;
}
int
AIOSetExternalControl (int portHandle, int requestType, int requestValue)
{
return AIO_SUCCESS;
}
int
AIOGetExternalStatus (int portHandle, LONG *extStatus, LONG *chgdExtStatus)
{
fprintf (stderr, "AIOGetExternalStatus stubbed out\n");
exit (1);
}
void
StopBell ()
{
}
int
Breakpoint (int __arg)
{
fprintf (stderr, "Breakpoint() stubbed out\n");
exit (1);
}

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gdb/nlm/alpha.h
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/* Register values. All of these values *MUST* agree with tm.h */
#define RA_REGNUM 26 /* Contains return address value */
#define SP_REGNUM 30 /* Contains address of top of stack */
#define PC_REGNUM 64 /* Contains program counter */
#define FP_REGNUM 65 /* Virtual frame pointer */
#define V0_REGNUM 0 /* Function integer return value */
#define NUM_REGS 66 /* Number of machine registers */
#define REGISTER_BYTES (NUM_REGS * 8) /* Total size of registers array */
#define ExceptionPC ExceptionRegs[SF_REG_PC].lo
#define DECR_PC_AFTER_BREAK 0 /* NT's Palcode gets this right! */
#define BREAKPOINT {0x80, 0, 0, 0} /* call_pal bpt */
extern unsigned char breakpoint_insn[];
#define BREAKPOINT_SIZE 4
/*#define flush_i_cache() asm("call_pal 0x86")*/
/* Temporary defs until DEC gets their netware includes straightened out */
#include "altdebug.h" /* Get StackFrame structure */
#define isspace(C) (C == '\n' || C == '\r' || C == ' ' || C == '\t')
int Breakpoint (int __arg);
typedef unsigned long ULONG;

105
gdb/nlm/altdebug.h
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typedef short int16_t;
typedef unsigned short uint16_t;
typedef int int32_t;
typedef unsigned int uint32_t;
typedef struct int64_s {
uint32_t lo;
uint32_t hi;
} int64_t;
/* Define indexes into register array in StackFrame */
#define SF_REG_PC 0
#define SF_IREG_OFFSET 1 /* int regs start at index 1 */
#define SF_REG_V0 (0+SF_IREG_OFFSET)
#define SF_REG_T0 (1+SF_IREG_OFFSET)
#define SF_REG_T1 (2+SF_IREG_OFFSET)
#define SF_REG_T2 (3+SF_IREG_OFFSET)
#define SF_REG_T3 (4+SF_IREG_OFFSET)
#define SF_REG_T4 (5+SF_IREG_OFFSET)
#define SF_REG_T5 (6+SF_IREG_OFFSET)
#define SF_REG_T6 (7+SF_IREG_OFFSET)
#define SF_REG_T7 (8+SF_IREG_OFFSET)
#define SF_REG_S0 (9+SF_IREG_OFFSET)
#define SF_REG_S1 (10+SF_IREG_OFFSET)
#define SF_REG_S2 (11+SF_IREG_OFFSET)
#define SF_REG_S3 (12+SF_IREG_OFFSET)
#define SF_REG_S4 (13+SF_IREG_OFFSET)
#define SF_REG_S5 (14+SF_IREG_OFFSET)
#define SF_REG_S6 (15+SF_IREG_OFFSET)
#define SF_REG_FP SF_REG_S6
#define SF_REG_A0 (16+SF_IREG_OFFSET)
#define SF_REG_A1 (17+SF_IREG_OFFSET)
#define SF_REG_A2 (18+SF_IREG_OFFSET)
#define SF_REG_A3 (19+SF_IREG_OFFSET)
#define SF_REG_A4 (20+SF_IREG_OFFSET)
#define SF_REG_A5 (21+SF_IREG_OFFSET)
#define SF_REG_T8 (22+SF_IREG_OFFSET)
#define SF_REG_T9 (23+SF_IREG_OFFSET)
#define SF_REG_T10 (24+SF_IREG_OFFSET)
#define SF_REG_T11 (25+SF_IREG_OFFSET)
#define SF_REG_RA (26+SF_IREG_OFFSET)
#define SF_REG_PV (27+SF_IREG_OFFSET)
#define SF_REG_T12 SF_REG_PV
#define SF_REG_AT (28+SF_IREG_OFFSET)
#define SF_REG_GP (29+SF_IREG_OFFSET)
#define SF_REG_SP (30+SF_IREG_OFFSET)
#define SF_REG_ZERO (31+SF_IREG_OFFSET)
#define NUMBER_OF_INT_REGS 32
#define SF_FREG_OFFSET (SF_IREG_OFFSET+NUMBER_OF_INT_REGS)
#define SF_REG_F0 (0+SF_FREG_OFFSET)
#define SF_REG_F1 (1+SF_FREG_OFFSET)
#define SF_REG_F2 (2+SF_FREG_OFFSET)
#define SF_REG_F3 (3+SF_FREG_OFFSET)
#define SF_REG_F4 (4+SF_FREG_OFFSET)
#define SF_REG_F5 (5+SF_FREG_OFFSET)
#define SF_REG_F6 (6+SF_FREG_OFFSET)
#define SF_REG_F7 (7+SF_FREG_OFFSET)
#define SF_REG_F8 (8+SF_FREG_OFFSET)
#define SF_REG_F9 (9+SF_FREG_OFFSET)
#define SF_REG_F10 (10+SF_FREG_OFFSET)
#define SF_REG_F11 (11+SF_FREG_OFFSET)
#define SF_REG_F12 (12+SF_FREG_OFFSET)
#define SF_REG_F13 (13+SF_FREG_OFFSET)
#define SF_REG_F14 (14+SF_FREG_OFFSET)
#define SF_REG_F15 (15+SF_FREG_OFFSET)
#define SF_REG_F16 (16+SF_FREG_OFFSET)
#define SF_REG_F17 (17+SF_FREG_OFFSET)
#define SF_REG_F18 (18+SF_FREG_OFFSET)
#define SF_REG_F19 (19+SF_FREG_OFFSET)
#define SF_REG_F20 (20+SF_FREG_OFFSET)
#define SF_REG_F21 (21+SF_FREG_OFFSET)
#define SF_REG_F22 (22+SF_FREG_OFFSET)
#define SF_REG_F23 (23+SF_FREG_OFFSET)
#define SF_REG_F24 (24+SF_FREG_OFFSET)
#define SF_REG_F25 (25+SF_FREG_OFFSET)
#define SF_REG_F26 (26+SF_FREG_OFFSET)
#define SF_REG_F27 (27+SF_FREG_OFFSET)
#define SF_REG_F28 (28+SF_FREG_OFFSET)
#define SF_REG_F29 (29+SF_FREG_OFFSET)
#define SF_REG_F30 (30+SF_FREG_OFFSET)
#define SF_REG_FZERO (31+SF_FREG_OFFSET)
#define NUMBER_OF_FLOAT_REGS 32
struct StackFrame
{
struct DomainStructure *ExceptionDomainID;
struct ProcessorStructure *ExceptionProcessorID;
BYTE *ExceptionDescription;
LONG ExceptionFlags;
LONG ExceptionErrorCode;
LONG ExceptionNumber;
int64_t ExceptionAddress; /* Address at which exception occured */
int64_t ExceptionRegs[1+NUMBER_OF_INT_REGS+NUMBER_OF_FLOAT_REGS];
/* First entry is for PC */
int ExceptionBrkptNum; /* Set by the NSI debug exception handler
if the exception was caused by a
NID breakpoint */
int ExceptionBrkptFlags; /* Flags for the breakpoint. See nsibrkpt.c
for details */
};