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Add support for FMLA (by element) to AArch64 sim.
* simulator.c (do_FMLA_by_element): New function. (do_vec_op2): Call it.
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@ -1,3 +1,8 @@
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2016-05-06 Nick Clifton <nickc@redhat.com>
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* simulator.c (do_FMLA_by_element): New function.
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(do_vec_op2): Call it.
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2016-04-27 Nick Clifton <nickc@redhat.com>
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* simulator.c: Add TRACE_DECODE statements to all emulation
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@ -6033,6 +6033,67 @@ do_vec_MUL_by_element (sim_cpu *cpu)
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}
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}
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static void
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do_FMLA_by_element (sim_cpu *cpu)
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{
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/* instr[31] = 0
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instr[30] = half/full
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instr[29,23] = 00 1111 1
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instr[22] = size
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instr[21] = L
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instr[20,16] = m
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instr[15,12] = 0001
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instr[11] = H
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instr[10] = 0
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instr[9,5] = Vn
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instr[4,0] = Vd */
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unsigned full = INSTR (30, 30);
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unsigned size = INSTR (22, 22);
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unsigned L = INSTR (21, 21);
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unsigned vm = INSTR (20, 16);
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unsigned H = INSTR (11, 11);
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unsigned vn = INSTR (9, 5);
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unsigned vd = INSTR (4, 0);
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unsigned e;
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NYI_assert (29, 23, 0x1F);
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NYI_assert (15, 12, 0x1);
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NYI_assert (10, 10, 0);
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TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
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if (size)
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{
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double element1, element2;
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if (! full || L)
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HALT_UNALLOC;
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element2 = aarch64_get_vec_double (cpu, vm, H);
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for (e = 0; e < 2; e++)
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{
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element1 = aarch64_get_vec_double (cpu, vn, e);
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element1 *= element2;
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element1 += aarch64_get_vec_double (cpu, vd, e);
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aarch64_set_vec_double (cpu, vd, e, element1);
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}
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}
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else
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{
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float element1;
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float element2 = aarch64_get_vec_float (cpu, vm, (H << 1) | L);
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for (e = 0; e < (full ? 4 : 2); e++)
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{
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element1 = aarch64_get_vec_float (cpu, vn, e);
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element1 *= element2;
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element1 += aarch64_get_vec_float (cpu, vd, e);
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aarch64_set_vec_float (cpu, vd, e, element1);
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}
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}
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}
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static void
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do_vec_op2 (sim_cpu *cpu)
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{
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@ -6051,9 +6112,18 @@ do_vec_op2 (sim_cpu *cpu)
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{
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switch (INSTR (15, 10))
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{
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case 0x04:
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case 0x06:
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do_FMLA_by_element (cpu);
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return;
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case 0x20:
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case 0x22: do_vec_MUL_by_element (cpu); return;
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default: HALT_NYI;
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case 0x22:
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do_vec_MUL_by_element (cpu);
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return;
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default:
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HALT_NYI;
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}
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}
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else
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