XCOFF booke tests. Fix tlbre, tlbwe ppc WS field.

This commit is contained in:
Tom Rix 2002-02-21 03:57:36 +00:00
parent 385fa495bf
commit ff3a6ee3fd
11 changed files with 388 additions and 7 deletions

View File

@ -1,3 +1,10 @@
2002-02-20 Tom Rix <trix@redhat.com>
* coff-rs6000.c (xcoff_howto_table): Add 16 bit R_BA.
(_bfd_xcoff_reloc_type_lookup): Use it.
* coff64-rs6000.c (xcoff64_howto_table): Same.
(xcoff64_reloc_type_lookup): Same.
2002-02-20 Peter Schauer <pes@regent.e-technik.tu-muenchen.de> 2002-02-20 Peter Schauer <pes@regent.e-technik.tu-muenchen.de>
* osf-core.c (osf_core_vec): OSF/1 (Digital Unix) core files are * osf-core.c (osf_core_vec): OSF/1 (Digital Unix) core files are

View File

@ -857,7 +857,7 @@ reloc_howto_type xcoff_howto_table[] =
0xffff, /* dst_mask */ 0xffff, /* dst_mask */
false), /* pcrel_offset */ false), /* pcrel_offset */
HOWTO (0, /* type */ HOWTO (0x1c, /* type */
0, /* rightshift */ 0, /* rightshift */
4, /* size (0 = byte, 1 = short, 2 = long) */ 4, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */ 64, /* bitsize */
@ -869,8 +869,22 @@ reloc_howto_type xcoff_howto_table[] =
true, /* partial_inplace */ true, /* partial_inplace */
MINUS_ONE, /* src_mask */ MINUS_ONE, /* src_mask */
MINUS_ONE, /* dst_mask */ MINUS_ONE, /* dst_mask */
false) /* pcrel_offset */ false), /* pcrel_offset */
/* 16 bit Non modifiable absolute branch. */
HOWTO (0x1d, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
0, /* special_function */
"R_BA", /* name */
true, /* partial_inplace */
0xfffc, /* src_mask */
0xfffc, /* dst_mask */
false), /* pcrel_offset */
}; };
void void
@ -913,6 +927,8 @@ _bfd_xcoff_reloc_type_lookup (abfd, code)
{ {
case BFD_RELOC_PPC_B26: case BFD_RELOC_PPC_B26:
return &xcoff_howto_table[0xa]; return &xcoff_howto_table[0xa];
case BFD_RELOC_PPC_BA16:
return &xcoff_howto_table[0x1d];
case BFD_RELOC_PPC_BA26: case BFD_RELOC_PPC_BA26:
return &xcoff_howto_table[8]; return &xcoff_howto_table[8];
case BFD_RELOC_PPC_TOC16: case BFD_RELOC_PPC_TOC16:

View File

@ -1714,7 +1714,7 @@ reloc_howto_type xcoff64_howto_table[] =
0xffff, /* dst_mask */ 0xffff, /* dst_mask */
false), /* pcrel_offset */ false), /* pcrel_offset */
HOWTO (0, /* type */ HOWTO (0x1c, /* type */
0, /* rightshift */ 0, /* rightshift */
4, /* size (0 = byte, 1 = short, 2 = long) */ 4, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */ 64, /* bitsize */
@ -1726,7 +1726,22 @@ reloc_howto_type xcoff64_howto_table[] =
true, /* partial_inplace */ true, /* partial_inplace */
MINUS_ONE, /* src_mask */ MINUS_ONE, /* src_mask */
MINUS_ONE, /* dst_mask */ MINUS_ONE, /* dst_mask */
false) /* pcrel_offset */ false), /* pcrel_offset */
/* 16 bit Non modifiable absolute branch. */
HOWTO (0x1d, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
0, /* special_function */
"R_BA", /* name */
true, /* partial_inplace */
0xfffc, /* src_mask */
0xfffc, /* dst_mask */
false), /* pcrel_offset */
}; };
void void
@ -1769,6 +1784,8 @@ xcoff64_reloc_type_lookup (abfd, code)
{ {
case BFD_RELOC_PPC_B26: case BFD_RELOC_PPC_B26:
return &xcoff64_howto_table[0xa]; return &xcoff64_howto_table[0xa];
case BFD_RELOC_PPC_BA16:
return &xcoff64_howto_table[0x1d];
case BFD_RELOC_PPC_BA26: case BFD_RELOC_PPC_BA26:
return &xcoff64_howto_table[8]; return &xcoff64_howto_table[8];
case BFD_RELOC_PPC_TOC16: case BFD_RELOC_PPC_TOC16:

View File

@ -1,3 +1,11 @@
2002-02-20 Tom Rix <trix@redhat.com>
* gas/ppc/ppc.exp: Add xcoff booke tests.
* gas/ppc/booke_xcoff.s: New.
* gas/ppc/booke_xcoff.d: New.
* gas/ppc/booke_xcoff64.s: New.
* gas/ppc/booke_xcoff64.d: New.
2002-02-18 Daniel Jacobowitz <drow@mvista.com> 2002-02-18 Daniel Jacobowitz <drow@mvista.com>
* gas/sh/basic.exp: Don't run PIC tests for targets that don't * gas/sh/basic.exp: Don't run PIC tests for targets that don't

View File

@ -0,0 +1,30 @@
#as: -mppc32 -mbooke32
#objdump: -mpowerpc -Dr -Mbooke32
#name: xcoff BookE tests
.*: file format aixcoff-rs6000
Disassembly of section .text:
0000000000000000 <.text>:
0: 7c 22 3f 64 tlbre r1,r2,7
4: 7c be 1f a4 tlbwe r5,r30,3
8: 7c a8 48 2c icbt 5,r8,r9
c: 7c a6 02 26 mfapidi r5,r6
10: 7c 07 46 24 tlbivax r7,r8
14: 7c 09 56 26 tlbivaxe r9,r10
18: 7c 0b 67 24 tlbsx r11,r12
1c: 7c 0d 77 26 tlbsxe r13,r14
20: 7e 80 04 40 mcrxr64 cr5
24: 4c 00 00 66 rfci
28: 7c 60 01 06 wrtee r3
2c: 7c 00 81 46 wrteei 1
30: 7c 85 02 06 mfdcrx r4,r5
34: 7c aa 3a 86 mfdcr r5,234
38: 7c e6 03 06 mtdcrx r6,r7
3c: 7d 10 6b 86 mtdcr 432,r8
40: 7c 00 04 ac sync
44: 7c 09 55 ec dcba r9,r10
48: 7c 00 06 ac eieio
4c: 00 00 00 00 .long 0x0
Disassembly of section .data:

View File

@ -0,0 +1,28 @@
# Motorola PowerPC BookE tests
#as: -mppc32 -mbooke32
.machine "ppc32"
.csect .text[PR]
.csect main[DS]
main:
.csect .text[PR]
.main:
tlbre 1, 2, 7
tlbwe 5, 30, 3
icbt 5, 8, 9
mfapidi 5, 6
tlbivax 7, 8
tlbivaxe 9, 10
tlbsx 11, 12
tlbsxe 13, 14
mcrxr64 5
rfci
wrtee 3
wrteei 1
mfdcrx 4, 5
mfdcr 5, 234
mtdcrx 6, 7
mtdcr 432, 8
msync
dcba 9, 10
mbar 0

View File

@ -0,0 +1,126 @@
#as: -a64 -mppc64 -mbooke64
#objdump: -Dr -Mbooke64
#name: xcoff64 BookE tests
.*: file format aixcoff64-rs6000
Disassembly of section .text:
0000000000000000 <.text>:
0: 7c 22 3f 64 tlbre r1,r2,7
4: 7c be 1f a4 tlbwe r5,r30,3
8: 24 25 00 30 bce 1,4\*cr1\+gt,38 <.text\+0x38>
c: 24 46 00 3d bcel 2,4\*cr1\+eq,48 <.text\+0x48>
10: 24 67 00 5a bcea 3,4\*cr1\+so,58 <.text\+0x58>
10: R_BA .text
14: 24 88 00 7b bcela 4,4\*cr2,78 <.text\+0x78>
14: R_BA .text
18: 4c a9 00 22 bclre 5,4\*cr2\+gt
1c: 4c aa 00 23 bclrel 5,4\*cr2\+eq
20: 4d 0b 04 22 bcctre 8,4\*cr2\+so
24: 4d 0c 04 23 bcctrel 8,4\*cr3
28: 58 00 00 74 be 9c <.text\+0x9c>
2c: 58 00 00 89 bel b4 <.text\+0xb4>
30: 58 00 00 f2 bea f0 <.text\+0xf0>
30: R_BA .text
34: 58 00 01 27 bela 124 <.text\+0x124>
34: R_BA .text
38: e9 09 00 80 lbze r8,8\(r9\)
3c: e9 8f 00 41 lbzue r12,4\(r15\)
40: 7c 86 40 fe lbzuxe r4,r6,r8
44: 7c 65 38 be lbzxe r3,r5,r7
48: f8 a6 06 40 lde r5,400\(r6\)
4c: f8 c7 07 11 ldue r6,452\(r7\)
50: 7c e8 4e 3e ldxe r7,r8,r9
54: 7d 4b 66 7e lduxe r10,r11,r12
58: f9 81 02 06 lfde f12,128\(r1\)
5c: f8 25 00 47 lfdue f1,16\(r5\)
60: 7c a1 1c be lfdxe f5,r1,r3
64: 7c c2 24 fe lfduxe f6,r2,r4
68: f9 09 00 c4 lfse f8,48\(r9\)
6c: f9 2a 01 15 lfsue f9,68\(r10\)
70: 7d 44 44 7e lfsuxe f10,r4,r8
74: 7d 23 3c 3e lfsxe f9,r3,r7
78: e9 45 03 24 lhae r10,50\(r5\)
7c: e8 23 00 55 lhaue r1,5\(r3\)
80: 7c a1 1a fe lhauxe r5,r1,r3
84: 7f be fa be lhaxe r29,r30,r31
88: 7c 22 1e 3c lhbrxe r1,r2,r3
8c: e8 83 01 22 lhze r4,18\(r3\)
90: e8 c9 01 43 lhzue r6,20\(r9\)
94: 7c a7 4a 7e lhzuxe r5,r7,r9
98: 7d 27 2a 3e lhzxe r9,r7,r5
9c: 7d 4f a0 fc lwarxe r10,r15,r20
a0: 7c aa 94 3c lwbrxe r5,r10,r18
a4: eb 9d 00 46 lwze r28,4\(r29\)
a8: e9 0a 02 87 lwzue r8,40\(r10\)
ac: 7c 66 48 7e lwzuxe r3,r6,r9
b0: 7f dd e0 3e lwzxe r30,r29,r28
b4: 7c 06 3d fc dcbae r6,r7
b8: 7c 08 48 bc dcbfe r8,r9
bc: 7c 0a 5b bc dcbie r10,r11
c0: 7c 08 f0 7c dcbste r8,r30
c4: 7c c3 0a 3c dcbte 6,r3,r1
c8: 7c a4 11 fa dcbtste 5,r4,r2
cc: 7c 0f 77 fc dcbze r15,r14
d0: 7c 03 27 bc icbie r3,r4
d4: 7c a8 48 2c icbt 5,r8,r9
d8: 7c ca 78 3c icbte 6,r10,r15
dc: 7c a6 02 26 mfapidi r5,r6
e0: 7c 07 46 24 tlbivax r7,r8
e4: 7c 09 56 26 tlbivaxe r9,r10
e8: 7c 0b 67 24 tlbsx r11,r12
ec: 7c 0d 77 26 tlbsxe r13,r14
f0: 7c 22 1b 14 adde64 r1,r2,r3
f4: 7c 85 37 14 adde64o r4,r5,r6
f8: 7c e8 03 d4 addme64 r7,r8
fc: 7d 2a 07 d4 addme64o r9,r10
100: 7d 6c 03 94 addze64 r11,r12
104: 7d ae 07 94 addze64o r13,r14
108: 7e 80 04 40 mcrxr64 cr5
10c: 7d f0 8b 10 subfe64 r15,r16,r17
110: 7e 53 a7 10 subfe64o r18,r19,r20
114: 7e b6 03 d0 subfme64 r21,r22
118: 7e f8 07 d0 subfme64o r23,r24
11c: 7f 3a 03 90 subfze64 r25,r26
120: 7f 7c 07 90 subfze64o r27,r28
124: e8 22 03 28 stbe r1,50\(r2\)
128: e8 64 02 89 stbue r3,40\(r4\)
12c: 7c a6 39 fe stbuxe r5,r6,r7
130: 7d 09 51 be stbxe r8,r9,r10
134: 7d 6c 6b ff stdcxe. r11,r12,r13
138: f9 cf 00 78 stde r14,28\(r15\)
13c: fa 11 00 59 stdue r16,20\(r17\)
140: 7e 53 a7 3e stdxe r18,r19,r20
144: 7e b6 bf 7e stduxe r21,r22,r23
148: f8 38 00 3e stfde f1,12\(r24\)
14c: f8 59 00 0f stfdue f2,0\(r25\)
150: 7c 7a dd be stfdxe f3,r26,r27
154: 7c 9c ed fe stfduxe f4,r28,r29
158: 7c be ff be stfiwxe f5,r30,r31
15c: f8 de 00 6c stfse f6,24\(r30\)
160: f8 fd 00 5d stfsue f7,20\(r29\)
164: 7d 1c dd 3e stfsxe f8,r28,r27
168: 7d 3a cd 7e stfsuxe f9,r26,r25
16c: 7f 17 b7 3c sthbrxe r24,r23,r22
170: ea b4 01 ea sthe r21,30\(r20\)
174: ea 72 02 8b sthue r19,40\(r18\)
178: 7e 30 7b 7e sthuxe r17,r16,r15
17c: 7d cd 63 3e sthxe r14,r13,r12
180: 7d 6a 4d 3c stwbrxe r11,r10,r9
184: 7d 07 31 3d stwcxe. r8,r7,r6
188: e8 a4 03 2e stwe r5,50\(r4\)
18c: e8 62 02 8f stwue r3,40\(r2\)
190: 7c 22 19 7e stwuxe r1,r2,r3
194: 7c 85 31 3e stwxe r4,r5,r6
198: 4c 00 00 66 rfci
19c: 7c 60 01 06 wrtee r3
1a0: 7c 00 81 46 wrteei 1
1a4: 7c 85 02 06 mfdcrx r4,r5
1a8: 7c aa 3a 86 mfdcr r5,234
1ac: 7c e6 03 06 mtdcrx r6,r7
1b0: 7d 10 6b 86 mtdcr 432,r8
1b4: 7c 00 04 ac sync
1b8: 7c 09 55 ec dcba r9,r10
1bc: 7c 00 06 ac eieio
Disassembly of section .data:

View File

@ -0,0 +1,137 @@
# Motorola PowerPC BookE tests
#as: -a64 -mppc64 -mbooke64
.machine "ppc64"
.csect .text[PR]
.csect main[DS]
main:
.csect .text[PR]
.main:
tlbre 1, 2, 7
tlbwe 5, 30, 3
bce 1, 5, branch_target_1
bcel 2, 6, branch_target_2
bcea 3, 7, branch_target_3
bcela 4, 8, branch_target_4
bclre 5, 9
bclrel 5, 10
bcctre 8, 11
bcctrel 8, 12
be branch_target_5
bel branch_target_6
bea branch_target_7
bela branch_target_8
branch_target_1:
lbze 8, 8(9)
lbzue 12, 4(15)
lbzuxe 4, 6, 8
lbzxe 3, 5, 7
branch_target_2:
lde 5, 400(6)
ldue 6, 452(7)
ldxe 7, 8, 9
lduxe 10, 11, 12
branch_target_3:
lfde 12, 128(1)
lfdue 1, 16(5)
lfdxe 5, 1, 3
lfduxe 6, 2, 4
lfse 8, 48(9)
lfsue 9, 68(10)
lfsuxe 10, 4, 8
lfsxe 9, 3, 7
branch_target_4:
lhae 10, 50(5)
lhaue 1, 5(3)
lhauxe 5, 1, 3
lhaxe 29, 30, 31
lhbrxe 1, 2, 3
lhze 4, 18(3)
lhzue 6, 20(9)
lhzuxe 5, 7, 9
lhzxe 9, 7, 5
branch_target_5:
lwarxe 10, 15, 20
lwbrxe 5, 10, 18
lwze 28, 4(29)
lwzue 8, 40(10)
lwzuxe 3, 6, 9
lwzxe 30, 29, 28
branch_target_6:
dcbae 6, 7
dcbfe 8, 9
dcbie 10, 11
dcbste 8, 30
dcbte 6, 3, 1
dcbtste 5, 4, 2
dcbze 15, 14
icbie 3, 4
icbt 5, 8, 9
icbte 6, 10, 15
mfapidi 5, 6
tlbivax 7, 8
tlbivaxe 9, 10
tlbsx 11, 12
tlbsxe 13, 14
branch_target_7:
adde64 1, 2, 3
adde64o 4, 5, 6
addme64 7, 8
addme64o 9, 10
addze64 11, 12
addze64o 13, 14
mcrxr64 5
subfe64 15, 16, 17
subfe64o 18, 19, 20
subfme64 21, 22
subfme64o 23, 24
subfze64 25, 26
subfze64o 27, 28
branch_target_8:
stbe 1, 50(2)
stbue 3, 40(4)
stbuxe 5, 6, 7
stbxe 8, 9, 10
stdcxe. 11, 12, 13
stde 14, 28(15)
stdue 16, 20(17)
stdxe 18, 19, 20
stduxe 21, 22, 23
stfde 1, 12(24)
stfdue 2, 0(25)
stfdxe 3, 26, 27
stfduxe 4, 28, 29
stfiwxe 5, 30, 31
stfse 6, 24(30)
stfsue 7, 20(29)
stfsxe 8, 28, 27
stfsuxe 9, 26, 25
sthbrxe 24, 23, 22
sthe 21, 30(20)
sthue 19, 40(18)
sthuxe 17, 16, 15
sthxe 14, 13, 12
stwbrxe 11, 10, 9
stwcxe. 8, 7, 6
stwe 5, 50(4)
stwue 3, 40(2)
stwuxe 1, 2, 3
stwxe 4, 5, 6
rfci
wrtee 3
wrteei 1
mfdcrx 4, 5
mfdcr 5, 234
mtdcrx 6, 7
mtdcr 432, 8
msync
dcba 9, 10
mbar 0

View File

@ -26,12 +26,14 @@ if { [istarget powerpc64*-*-*] || [istarget *-*-elf64*]} then {
if { [istarget powerpc*-*-*] } then { if { [istarget powerpc*-*-*] } then {
run_dump_test "simpshft" run_dump_test "simpshft"
run_dump_test "booke"
if { [istarget powerpc-ibm-aix*] } then { if { [istarget powerpc-ibm-aix*] } then {
run_dump_test "altivec_xcoff" run_dump_test "altivec_xcoff"
run_dump_test "altivec_xcoff64" run_dump_test "altivec_xcoff64"
run_dump_test "booke_xcoff"
run_dump_test "booke_xcoff64"
} else { } else {
run_dump_test "altivec" run_dump_test "altivec"
run_dump_test "booke"
} }
} }

View File

@ -1,3 +1,7 @@
2002-02-20 Tom Rix <trix@redhat.com>
* ppc-opc.c (powerpc_operands): Add WS feild. Use for tlbre, tlbwe.
2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com> 2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390-dis.c (init_disasm): Use renamed architecture defines. * s390-dis.c (init_disasm): Use renamed architecture defines.

View File

@ -504,6 +504,12 @@ const struct powerpc_operand powerpc_operands[] =
/* The SHB field in a VA form instruction. */ /* The SHB field in a VA form instruction. */
#define SHB UIMM + 1 #define SHB UIMM + 1
{ 4, 6, 0, 0, 0 }, { 4, 6, 0, 0, 0 },
/* The WS field. */
#define WS SHB + 1
#define WS_MASK (0x7 << 11)
{ 3, 11, 0, 0, 0 },
}; };
/* The functions used to insert and extract complicated operands. */ /* The functions used to insert and extract complicated operands. */
@ -3691,7 +3697,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "stdxe", X(31,927), X_MASK, BOOKE64, { RS, RA, RB } }, { "stdxe", X(31,927), X_MASK, BOOKE64, { RS, RA, RB } },
{ "tlbre", X(31,946), X_MASK, BOOKE, { RT, RA, SH } }, { "tlbre", X(31,946), X_MASK, BOOKE, { RT, RA, WS } },
{ "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } }, { "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } },
{ "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } }, { "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } },
@ -3712,7 +3718,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, { RT, RA } }, { "tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, { RT, RA } },
{ "tlbwe", X(31,978), X_MASK, PPC403, { RS, RA, SH } }, { "tlbwe", X(31,978), X_MASK, PPC403, { RS, RA, SH } },
{ "tlbwe", X(31,978), X_MASK, BOOKE, { RT, RA, SH } }, { "tlbwe", X(31,978), X_MASK, BOOKE, { RT, RA, WS } },
{ "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } }, { "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },