mirror of
https://github.com/darlinghq/darling-gdb.git
synced 2025-02-26 04:15:28 +00:00
* xtensa-tdep.h (xtensa_reg_mask_t): New.
(xtensa_mask_t): Change mask field to be a separate array. * xtensa-tdep.c (extract_call_winsize, xtensa_pseudo_register_read) (xtensa_pseudo_register_write, xtensa_unwind_pc) (xtensa_unwind_dummy_id, xtensa_push_dummy_call) (xtensa_breakpoint_from_pc): Remove implicit type casting. * xtensa-config.c (mask0, mask1, mask2, mask3, mask4, mask5) (mask6, mask7, mask8, mask9, mask10, mask11, mask12, mask13) (mask14, mask15): Rename to (xtensa_mask0, xtensa_mask1, xtensa_mask2, xtensa_mask3) (xtensa_mask4, xtensa_mask5, xtensa_mask6, xtensa_mask7) (xtensa_mask8, xtensa_mask9, xtensa_mask10, xtensa_mask11) (xtensa_mask12, xtensa_mask13, xtensa_mask14, xtensa_mask15): this. (xtensa_submask0, xtensa_submask1, xtensa_submask2, xtensa_submask3) (xtensa_submask4, xtensa_submask5, xtensa_submask6, xtensa_submask7) (xtensa_submask8, xtensa_submask9, xtensa_submask10) (xtensa_submask11, xtensa_submask12, xtensa_submask13) (xtensa_submask14, xtensa_submask15): New. (rmap): Follow strict aliasing rules doing static initialization.
This commit is contained in:
parent
a8e24a5610
commit
ff7a4c00e0
@ -1,3 +1,25 @@
|
||||
2007-02-15 Maxim Grigoriev <maxim2405@gmail.com>
|
||||
|
||||
* xtensa-tdep.h (xtensa_reg_mask_t): New.
|
||||
(xtensa_mask_t): Change mask field to be a separate array.
|
||||
* xtensa-tdep.c (extract_call_winsize, xtensa_pseudo_register_read)
|
||||
(xtensa_pseudo_register_write, xtensa_unwind_pc)
|
||||
(xtensa_unwind_dummy_id, xtensa_push_dummy_call)
|
||||
(xtensa_breakpoint_from_pc): Remove implicit type casting.
|
||||
* xtensa-config.c (mask0, mask1, mask2, mask3, mask4, mask5)
|
||||
(mask6, mask7, mask8, mask9, mask10, mask11, mask12, mask13)
|
||||
(mask14, mask15): Rename to
|
||||
(xtensa_mask0, xtensa_mask1, xtensa_mask2, xtensa_mask3)
|
||||
(xtensa_mask4, xtensa_mask5, xtensa_mask6, xtensa_mask7)
|
||||
(xtensa_mask8, xtensa_mask9, xtensa_mask10, xtensa_mask11)
|
||||
(xtensa_mask12, xtensa_mask13, xtensa_mask14, xtensa_mask15): this.
|
||||
(xtensa_submask0, xtensa_submask1, xtensa_submask2, xtensa_submask3)
|
||||
(xtensa_submask4, xtensa_submask5, xtensa_submask6, xtensa_submask7)
|
||||
(xtensa_submask8, xtensa_submask9, xtensa_submask10)
|
||||
(xtensa_submask11, xtensa_submask12, xtensa_submask13)
|
||||
(xtensa_submask14, xtensa_submask15): New.
|
||||
(rmap): Follow strict aliasing rules doing static initialization.
|
||||
|
||||
2007-02-13 Daniel Jacobowitz <dan@codesourcery.com>
|
||||
|
||||
* target-descriptions.c (tdesc_named_type): Move code_ptr and data_ptr
|
||||
|
@ -56,22 +56,38 @@ xtensa_config_tdep (struct gdbarch_info *info)
|
||||
|
||||
|
||||
/* Masked registers. */
|
||||
const int mask0[] = { 1, 96, 0, 4 };
|
||||
const int mask1[] = { 1, 96, 5, 1 };
|
||||
const int mask2[] = { 1, 96, 18, 1 };
|
||||
const int mask3[] = { 1, 96, 6, 2 };
|
||||
const int mask4[] = { 1, 96, 4, 1 };
|
||||
const int mask5[] = { 1, 96, 16, 2 };
|
||||
const int mask6[] = { 1, 96, 8, 4 };
|
||||
const int mask7[] = { 1, 95, 12, 20 };
|
||||
const int mask8[] = { 1, 95, 0, 1 };
|
||||
const int mask9[] = { 1, 108, 8, 4 };
|
||||
const int mask10[] = { 1, 109, 24, 8 };
|
||||
const int mask11[] = { 1, 109, 16, 8 };
|
||||
const int mask12[] = { 1, 109, 8, 8 };
|
||||
const int mask13[] = { 1, 110, 16, 2 };
|
||||
const int mask14[] = { 1, 111, 16, 2 };
|
||||
const int mask15[] = { 1, 67, 22, 10 };
|
||||
xtensa_reg_mask_t xtensa_submask0[] = { { 96, 0, 4 } };
|
||||
const xtensa_mask_t xtensa_mask0 = { 1, xtensa_submask0 };
|
||||
xtensa_reg_mask_t xtensa_submask1[] = { { 96, 5, 1 } };
|
||||
const xtensa_mask_t xtensa_mask1 = { 1, xtensa_submask1 };
|
||||
xtensa_reg_mask_t xtensa_submask2[] = { { 96, 18, 1 } };
|
||||
const xtensa_mask_t xtensa_mask2 = { 1, xtensa_submask2 };
|
||||
xtensa_reg_mask_t xtensa_submask3[] = { { 96, 6, 2 } };
|
||||
const xtensa_mask_t xtensa_mask3 = { 1, xtensa_submask3 };
|
||||
xtensa_reg_mask_t xtensa_submask4[] = { { 96, 4, 1 } };
|
||||
const xtensa_mask_t xtensa_mask4 = { 1, xtensa_submask4 };
|
||||
xtensa_reg_mask_t xtensa_submask5[] = { { 96, 16, 2 } };
|
||||
const xtensa_mask_t xtensa_mask5 = { 1, xtensa_submask5 };
|
||||
xtensa_reg_mask_t xtensa_submask6[] = { { 96, 8, 4 } };
|
||||
const xtensa_mask_t xtensa_mask6 = { 1, xtensa_submask6 };
|
||||
xtensa_reg_mask_t xtensa_submask7[] = { { 95, 12, 20 } };
|
||||
const xtensa_mask_t xtensa_mask7 = { 1, xtensa_submask7 };
|
||||
xtensa_reg_mask_t xtensa_submask8[] = { { 95, 0, 1 } };
|
||||
const xtensa_mask_t xtensa_mask8 = { 1, xtensa_submask8 };
|
||||
xtensa_reg_mask_t xtensa_submask9[] = { { 108, 8, 4 } };
|
||||
const xtensa_mask_t xtensa_mask9 = { 1, xtensa_submask9 };
|
||||
xtensa_reg_mask_t xtensa_submask10[] = { { 109, 24, 8 } };
|
||||
const xtensa_mask_t xtensa_mask10 = { 1, xtensa_submask10 };
|
||||
xtensa_reg_mask_t xtensa_submask11[] = { { 109, 16, 8 } };
|
||||
const xtensa_mask_t xtensa_mask11 = { 1, xtensa_submask11 };
|
||||
xtensa_reg_mask_t xtensa_submask12[] = { { 109, 8, 8 } };
|
||||
const xtensa_mask_t xtensa_mask12 = { 1, xtensa_submask12 };
|
||||
xtensa_reg_mask_t xtensa_submask13[] = { { 110, 16, 2 } };
|
||||
const xtensa_mask_t xtensa_mask13 = { 1, xtensa_submask13 };
|
||||
xtensa_reg_mask_t xtensa_submask14[] = { { 111, 16, 2 } };
|
||||
const xtensa_mask_t xtensa_mask14 = { 1, xtensa_submask14 };
|
||||
xtensa_reg_mask_t xtensa_submask15[] = { { 67, 22, 10 } };
|
||||
const xtensa_mask_t xtensa_mask15 = { 1, xtensa_submask15 };
|
||||
|
||||
|
||||
/* Register map. */
|
||||
@ -468,52 +484,52 @@ xtensa_register_t rmap[] =
|
||||
32, 4, 4, 0x0000000f, 0x0006, 0,
|
||||
0, 0 },
|
||||
{ /* 0130 */ "psintlevel", 520, xtRegisterTypeMapped, 0x1010, 0,
|
||||
4, 4, 4, 0x00002004, 0x0006, (xtensa_mask_t *) mask0,
|
||||
4, 4, 4, 0x00002004, 0x0006, &xtensa_mask0,
|
||||
0, 0 },
|
||||
{ /* 0131 */ "psum", 524, xtRegisterTypeMapped, 0x1010, 0,
|
||||
1, 4, 4, 0x00002005, 0x0006, (xtensa_mask_t *) mask1,
|
||||
1, 4, 4, 0x00002005, 0x0006, &xtensa_mask1,
|
||||
0, 0 },
|
||||
{ /* 0132 */ "pswoe", 528, xtRegisterTypeMapped, 0x1010, 0,
|
||||
1, 4, 4, 0x00002006, 0x0006, (xtensa_mask_t *) mask2,
|
||||
1, 4, 4, 0x00002006, 0x0006, &xtensa_mask2,
|
||||
0, 0 },
|
||||
{ /* 0133 */ "psring", 532, xtRegisterTypeMapped, 0x1010, 0,
|
||||
2, 4, 4, 0x00002007, 0x0006, (xtensa_mask_t *) mask3,
|
||||
2, 4, 4, 0x00002007, 0x0006, &xtensa_mask3,
|
||||
0, 0 },
|
||||
{ /* 0134 */ "psexcm", 536, xtRegisterTypeMapped, 0x1010, 0,
|
||||
1, 4, 4, 0x00002008, 0x0006, (xtensa_mask_t *) mask4,
|
||||
1, 4, 4, 0x00002008, 0x0006, &xtensa_mask4,
|
||||
0, 0 },
|
||||
{ /* 0135 */ "pscallinc", 540, xtRegisterTypeMapped, 0x1010, 0,
|
||||
2, 4, 4, 0x00002009, 0x0006, (xtensa_mask_t *) mask5,
|
||||
2, 4, 4, 0x00002009, 0x0006, &xtensa_mask5,
|
||||
0, 0 },
|
||||
{ /* 0136 */ "psowb", 544, xtRegisterTypeMapped, 0x1010, 0,
|
||||
4, 4, 4, 0x0000200a, 0x0006, (xtensa_mask_t *) mask6,
|
||||
4, 4, 4, 0x0000200a, 0x0006, &xtensa_mask6,
|
||||
0, 0 },
|
||||
{ /* 0137 */ "litbaddr", 548, xtRegisterTypeMapped, 0x1010, 0,
|
||||
20, 4, 4, 0x0000200b, 0x0006, (xtensa_mask_t *) mask7,
|
||||
20, 4, 4, 0x0000200b, 0x0006, &xtensa_mask7,
|
||||
0, 0 },
|
||||
{ /* 0138 */ "litben", 552, xtRegisterTypeMapped, 0x1010, 0,
|
||||
1, 4, 4, 0x0000200c, 0x0006, (xtensa_mask_t *) mask8,
|
||||
1, 4, 4, 0x0000200c, 0x0006, &xtensa_mask8,
|
||||
0, 0 },
|
||||
{ /* 0139 */ "dbnum", 556, xtRegisterTypeMapped, 0x1010, 0,
|
||||
4, 4, 4, 0x00002011, 0x0006, (xtensa_mask_t *) mask9,
|
||||
4, 4, 4, 0x00002011, 0x0006, &xtensa_mask9,
|
||||
0, 0 },
|
||||
{ /* 0140 */ "asid3", 560, xtRegisterTypeMapped, 0x1010, 0,
|
||||
8, 4, 4, 0x00002012, 0x0006, (xtensa_mask_t *) mask10,
|
||||
8, 4, 4, 0x00002012, 0x0006, &xtensa_mask10,
|
||||
0, 0 },
|
||||
{ /* 0141 */ "asid2", 564, xtRegisterTypeMapped, 0x1010, 0,
|
||||
8, 4, 4, 0x00002013, 0x0006, (xtensa_mask_t *) mask11,
|
||||
8, 4, 4, 0x00002013, 0x0006, &xtensa_mask11,
|
||||
0, 0 },
|
||||
{ /* 0142 */ "asid1", 568, xtRegisterTypeMapped, 0x1010, 0,
|
||||
8, 4, 4, 0x00002014, 0x0006, (xtensa_mask_t *) mask12,
|
||||
8, 4, 4, 0x00002014, 0x0006, &xtensa_mask12,
|
||||
0, 0 },
|
||||
{ /* 0143 */ "instpgszid4", 572, xtRegisterTypeMapped, 0x1010, 0,
|
||||
2, 4, 4, 0x00002015, 0x0006, (xtensa_mask_t *) mask13,
|
||||
2, 4, 4, 0x00002015, 0x0006, &xtensa_mask13,
|
||||
0, 0 },
|
||||
{ /* 0144 */ "datapgszid4", 576, xtRegisterTypeMapped, 0x1010, 0,
|
||||
2, 4, 4, 0x00002016, 0x0006, (xtensa_mask_t *) mask14,
|
||||
2, 4, 4, 0x00002016, 0x0006, &xtensa_mask14,
|
||||
0, 0 },
|
||||
{ /* 0145 */ "ptbase", 580, xtRegisterTypeMapped, 0x1010, 0,
|
||||
10, 4, 4, 0x00002017, 0x0006, (xtensa_mask_t *) mask15,
|
||||
10, 4, 4, 0x00002017, 0x0006, &xtensa_mask15,
|
||||
0, 0 },
|
||||
};
|
||||
|
||||
|
@ -140,7 +140,7 @@ extract_call_winsize (CORE_ADDR pc)
|
||||
{
|
||||
int winsize = 4; /* Default: No call, e.g. dummy frame. */
|
||||
int insn;
|
||||
char buf[4];
|
||||
gdb_byte buf[4];
|
||||
|
||||
DEBUGTRACE ("extract_call_winsize (pc = 0x%08x)\n", (int) pc);
|
||||
|
||||
@ -484,7 +484,7 @@ xtensa_pseudo_register_read (struct gdbarch *gdbarch,
|
||||
/* Read aliases a0..a15. */
|
||||
if (regnum >= A0_REGNUM && regnum <= A15_REGNUM)
|
||||
{
|
||||
char *buf = (char *) alloca (MAX_REGISTER_SIZE);
|
||||
gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
|
||||
|
||||
regcache_raw_read (regcache, WB_REGNUM, buf);
|
||||
regnum = AREG_NUMBER (regnum, extract_unsigned_integer (buf, 4));
|
||||
@ -565,7 +565,7 @@ xtensa_pseudo_register_write (struct gdbarch *gdbarch,
|
||||
/* Renumber register, if aliase a0..a15. */
|
||||
if (regnum >= A0_REGNUM && regnum <= A15_REGNUM)
|
||||
{
|
||||
char *buf = (char *) alloca (MAX_REGISTER_SIZE);
|
||||
gdb_byte *buf = (gdb_byte *) alloca (MAX_REGISTER_SIZE);
|
||||
unsigned int wb;
|
||||
|
||||
regcache_raw_read (regcache, WB_REGNUM, buf);
|
||||
@ -842,7 +842,7 @@ xtensa_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
|
||||
static CORE_ADDR
|
||||
xtensa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
||||
{
|
||||
char buf[8];
|
||||
gdb_byte buf[8];
|
||||
|
||||
DEBUGTRACE ("xtensa_unwind_pc (next_frame = %p)\n", next_frame);
|
||||
|
||||
@ -859,7 +859,7 @@ static struct frame_id
|
||||
xtensa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
||||
{
|
||||
CORE_ADDR pc, fp;
|
||||
char buf[4];
|
||||
gdb_byte buf[4];
|
||||
|
||||
/* next_frame->prev is a dummy frame. Return a frame ID of that frame. */
|
||||
|
||||
@ -1265,7 +1265,7 @@ xtensa_push_dummy_call (struct gdbarch *gdbarch,
|
||||
{
|
||||
int i;
|
||||
int size, onstack_size;
|
||||
char *buf = (char *) alloca (16);
|
||||
gdb_byte *buf = (gdb_byte *) alloca (16);
|
||||
CORE_ADDR ra, ps;
|
||||
struct argument_info
|
||||
{
|
||||
@ -1493,10 +1493,10 @@ xtensa_push_dummy_call (struct gdbarch *gdbarch,
|
||||
const unsigned char *
|
||||
xtensa_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
|
||||
{
|
||||
static char big_breakpoint[] = BIG_BREAKPOINT;
|
||||
static char little_breakpoint[] = LITTLE_BREAKPOINT;
|
||||
static char density_big_breakpoint[] = DENSITY_BIG_BREAKPOINT;
|
||||
static char density_little_breakpoint[] = DENSITY_LITTLE_BREAKPOINT;
|
||||
static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
|
||||
static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
|
||||
static unsigned char density_big_breakpoint[] = DENSITY_BIG_BREAKPOINT;
|
||||
static unsigned char density_little_breakpoint[] = DENSITY_LITTLE_BREAKPOINT;
|
||||
|
||||
DEBUGTRACE ("xtensa_breakpoint_from_pc (pc = 0x%08x)\n", (int) *pcptr);
|
||||
|
||||
|
@ -101,15 +101,17 @@ typedef struct
|
||||
|
||||
/* Mask. */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int reg_num;
|
||||
int bit_start;
|
||||
int bit_size;
|
||||
} xtensa_reg_mask_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int count;
|
||||
struct
|
||||
{
|
||||
int reg_num;
|
||||
int bit_start;
|
||||
int bit_size;
|
||||
} mask[0];
|
||||
xtensa_reg_mask_t *mask;
|
||||
} xtensa_mask_t;
|
||||
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user