* gdb.base/break.exp (bp on small function, optimized file):
Add a second pass pattern. The behavior differs here between stabs
and dwarf for one-line functions. Stabs preserves two line symbols
(one before the prologue and one after) with the same line number,
but dwarf regards these as duplicates and discards one of them.
Therefore the address after the prologue (where the breakpoint is)
has no exactly matching line symbol, and GDB reports the breakpoint
as if it were in the middle of a line rather than at the beginning.
sim:
* Makefile.in (interp.o): Depends on ppi.c .
(ppi.c): New rule.
* gencode.c (printonmatch, think, genopc): Deleted.
(MAX_NR_STUFF): Now 42.
(tab): Add SH-DSP CPU instructions.
Amalgamate ldc / stc / lds / sts instructions with similar
bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>.
Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
(movsxy_tab): New array.
For movs, change MMMM field to GGGG, and mmmm field to MMMM.
Added entries for movx, movy and parallel processing insns.
(ppi_tab): New array.
(qfunc): Stabilize sort.
(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
(dumptable): Now takes three arguments. Changed all callers.
Emit just one contigous jump table.
(filltable): Now takes an argument. Changed all callers.
Make index static.
(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
(gensim_caselist): New function, broken out of gensim.
Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
Handle ref '9'.
(gensim): Handle 'N' in code field and '8' in refs field.
Call gensim_caselist - twice.
(ppi_index): New static variable.
(main): Unsupport default action.
Add dsp support for -x / -s option. Add -p option.
* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
(saved_state_type): Rearrange to allow amalgamated ldc / stc /
lds / sts to work efficiently.
(target_dsp): New static variable.
(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
(set_fpscr1): Likewise. Use target_dsp to check for dsp.
(MOD_MSi, SIG_BUS_FETCH): Deleted.
(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
(SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead
of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
(set_sr): Reflect saved_state_type change. Fix SR_RB handling.
Use SET_MOD.
(MA, L, TL, TB): Now controlled by ACE_FAST.
(SEXT32): Just cast to int.
(SIGN32): Fixed to only shift by 31.
(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
(ppi_insn): Declare.
(ppi.c): Include.
(init_dsp): Set target_dsp. When it changes, switch end of
sh_jump_table with sh_dsp_table.
(sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead.
Don't Declare PR if it's #defined.
Fix single-stepping (Was broken in Mar 6 16:59:10 patch).
(sim_store_register, sim_read_register): Translate accesses to
reflect saved_state_type change.
* interp.c (set_sr): Set sr.
(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
(DSP_R): Fix definition.
(sim_resume): Remove outdated SET_SR use.
* interp.c (saved_state): New members for struct member asregs:
rs, re, insn_end, xram_start, yram_start.
(struct loop_bounds): New struct.
(SKIP_INSN): New macro.
(get_loop_bounds): New function.
(endianw): Renamed to global_endianw.
(maskw): negated bits.
(PC): Now insn_ptr.
(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
(SIG_BUS_FETCH): Likewise
(raise_exception, riat_fast): New functions.
(raise_buserror, sim_stop): Use raise_exception.
(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
Reverse sense of mask argument.
(FP_OP, set_dr): Use RAISE_EXCEPTION.
(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
Declare. Remove redundant masking.
(wwat_fast, rwat_fast): Add argument endianw. Changed callers.
(MA): Updated for change pc -> PC.
(Delay_Slot): Use RIAT.
(empty): Deleted.
(trap): Remove argument little_endian. Add argument endianw.
Changed all callers. Use raise_exception.
(macw): Add argument endainw. Changed all callers.
(init_dsp): New function, extended after broken out of init_pointers.
(sim_resume): Replace pc with insn_ptr. Replace little_endian with
endianw. Replace nia with nip. Reverse sense of maskb / maskw /
maskl. Implement logic for zero-overhead loops. Don't try to
interpret garbage when getting a SIGBUS at insn fetch.
(sim_open): Call init_dsp.
* gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H /
RAISE_EXCEPTION where appropriate.
Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.
* interp.c (sim_store_register, sim_fetch_register):
Do proper endianness switch.
* interp.c (saved_state_type): New members for struct member asregs:
xymem_select, xmem, ymem, xmem_offset, ymem_offset.
(special_address): Delete.
(BUSERROR): Now a two-argument predicate.
(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
(process_wlat_addr, process_wwat_addr): New functions.
(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
(process_rbat_addr): Likewise.
(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
(do_rdat, trap): Delete SLOW code.
(SEXT32, SIGN32): New macros.
(swap, swap16): Now integer in - integer out. Changed all callers.
(strswaplen, strnswap): Delete SLOW versions.
(init_pointers): Initialize dsp memory selection (preliminary).
(sim_store_register, sim_fetch_register): Use swap instead of
big / little endian read / write functions.
* interp.c (maskl): Deleted.
(endianw, endianb): New variables.
(special_address): Now inline.
(bp_holder): Put raising of buserror there, rename to:
(raise_buserror).
(BUSERROR): Now yields a value. Changed all users.
(wbat_big): Delete.
(wlat_fast, wwat_fast, wbat_fast): New functions.
(rlat_fast, rwat_fast, rbat_fast): Likewise.
(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
(do_rdat, do_wdat): Likewise. Take maskl argument instead of
little_endian one. Changed caller macros.
(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
(strswaplen, strnswap): New functions.
(trap): Use them to fix up endian mismatches;
disable SYS_execve and SYS_execv; fix double address translation for
SYS_pipe and SYS_stat.
(sym_write, sym_read): Add endianness translation.
(sym_store_register, sym_fetch_register): Add maskl local variable.
(sim_open): Set endianw and endianb.
gdb:
* sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays.
(sh_processor_type_table): Add entries for bfd_mach_sh_dsp and
bfd_mach_sh3_dsp.
(sh_show_regs): Floating point registers are called fr0-fr15.
For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate.
Handle sh-dsp and sh3-dsp.
config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp
don't have floating point registers.
(DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define.
(M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise.
(Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
* coffread.c (coff_symtab_read): In the case of C_THUMBEXT |
C_THUMBEXTFUNC | C_EXT, sec will never ever be the index for
.rodata, because cs_to_section doesn't deal with .rodata. Fix test
accordingly.
* solib.c (symbol_add_stub): Remember the index and the name of
the section with the lowest address. Use this data (instead of
data from .text) to pass info into symbol_file_add.
* elfread.c (record_minimal_symbol_and_info): Use the section
where the symbol lives to get the index, instead of guessing.
Make Sparc a Multi-Arch target. Discard PARAMS macro (require ANSI).
* sparc-tdep.c: include arch-utils.h.
(SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE,
DUMMY_REG_SAVE_OFFSET): provide multi-arch-compatible definitions.
(GDB_TARGET_IS_SPARC64): make into a runtime test.
(struct frame_extra_info): Define, use instead of the macro.
(Many places): Use alloca instead of statically allocated buffers
that depend on a multi-arch variable such as MAX_REGISTER_RAW_SIZE.
(sparc_extract_struct_value_address): Accept a pointer arg instead
of an array sized by REGISTER_BYTES.
(examine_prologue): Accept a pointer to an array of CORE_ADDR,
instead of the defunct struct frame_saved_regs. Recognize new
Sparc64 store instructions as part of the prologue. Ignore the
destination of a frame store when parsing the prologue (so long
as it's on the stack).
(sparc_push_dummy_frame): Fix incorrect buffer offset for PSTATE.
(sparc_frame_find_saved_regs): Accept a ptr to an array of CORE_ADDR
instead of the defunct struct frame_saved_regs.
(supply_gregset): Discard unnecessary 'zerobuf': just send NULL to
supply_register. Provide 4-byte offset to compensate for diff
between size of the prgreg_t elements on a 64-bit host and size
of the registers for a 32-bit target. Fill all inaccessible regs
with zero so they won't keep being requested again and again.
(fill_gregset): Handle 32/64 size difference between registers
and prgreg_t. Handle as many new 64-bit regs as possible.
(supply_fpregset, fill_fpregset): Attempt to handle 64-bit world.
(sparc_push_arguments): Rename to sparc32_push_arguments.
Copy arguments into registers as well as onto stack, so that the
CALL_DUMMY (code pushed onto the target stack) is not required.
(sparc_extract_return_value): Rename to sparc32_extract_return_value.
(sparc_store_return_value): Use memset instead of bzero.
Use write_register_gen instead of write_register_bytes.
(sparclet_store_return_value): New function.
(_initialize_sparc_tdep): Call register_gdbarch_init to activate
the gdbarch multi-architecture system.
(sp64_push_arguments): Rename to sparc64_push_arguments.
Extend to store arguments in general registers as well as on stack.
(sparc64_extract_return_value): Rename to sp64_extract_return_value.
Use as a private function, to be called by the new external function
sparc64_extract_return_value.
(sparclet_extract_return_value): New function.
(sparc32_stack_align, sparc64_stack_align, sparc32_register_name,
sparc64_register_name, sparc_print_extra_frame_info,
sparclite_register_name, sparclet_register_name,
sparc_push_return_address, sparc64_use_struct_convention,
sparc32_store_struct_return, sparc64_store_struct_return,
sparc32_register_virtual_type, sparc64_register_virtual_type,
sparc32_register_size, sparc64_register_size,
sparc32_register_byte, sparc64_register_byte,
sparc_gdbarch_skip_prologue, sparc_convert_to_virtual,
sparc_convert_to_raw, sparc_frame_init_saved_regs,
sparc_frame_address, sparc_gdbarch_fix_call_dummy,
sparc_coerce_float_to_double, sparc_call_dummy_address,
sparc_y_regnum, sparc_reg_struct_has_addr, sparc_intreg_size,
sparc_return_value_on_stack): New functions supporting multi-arch.
(sparc_gdbarch_init): New function; initialize multi-arch.
(struct gdbarch_tdep): Define, use for private multi-arch data.
* config/sparc/tm-sparc.h: Move definitions around, enclose with
#ifdef GDB_MULTI_ARCH tests, provide some multi-arch alternate
definitions. Add enums for register names, to help debugging gdb.
This header file must work for non-multi-arch and for multi-arch.
* config/sparc/tm-sp64.h: Add GDB_MULTI_ARCH configuration. Also add
AT_ENTRY_POINT definitions for CALL_DUMMY, for non-multi-arch case.
Define GDB_MULTI_ARCH.
* config/sparc/tm-sparclet.h: Add GDB_MULTI_ARCH configuration.
Do not define GDB_MULTI_ARCH (bfd does not correctly identify target).
* config/sparc/tm-sparclite.h: Ditto.
* config/sparc/tm-sun4sol2.h: Define GDB_MULTI_ARCH.
* sparclet-rom.c (sparclet_regnames): Initialize explicitly, to
avoid using deprecated REGISTER_NAMES macro.
* Makefile.in: Let sparc-tdep.c depend on arch-utils.h.
