(sparc64_fprs_type): New variables.
(sparc64_init_types): New function.:
(sparc64_register_info): Use appropriate flag types for %fsr and
%fprs.
(sparc64_pseudo_register_info): Use appropriate type for %pstate.
(_initialize_sparc64_tdep): New function.
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite:
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector. Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.
binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.
gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust.
ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
(pe_detail_list): Add PE_ARCH_arm_wince case.
(make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
(gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* elf.c (get_program_header_size): Add a PT_GNU_RELRO segment
only if there is a PT_DYNAMIC segment.
(_bfd_elf_map_sections_to_segments): Likewise.
(assign_file_positions_for_load_sections): Set PT_GNU_RELRO
segment alignment to 1.
ld/testsuite/
2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* ld-elf/binutils.exp: Add tests for "-z relro".
to use ARM instructions on non-ARM-supporting cores.
(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
mode automatically based on cpu variant.
(md_begin): Call above function.
PR 3052
* ldlang.h (lang_output_section_statement_type): Replace
"processed" field with "processed_vma" and "processed_lma".
* ldlang.c (lang_do_assignments_1): Move lma setting code..
(lang_size_sections_1): ..to here.
(lang_reset_memory_regions): Adjust for
lang_output_section_statement_type change.
* ldexp.c (fold_name): Likewise.
And this is something I forgot the check in from the previous patch.
ld/testsuite/
* ld-scripts/overlay-size-map.d: Adjust.
