Commit Graph

164 Commits

Author SHA1 Message Date
Scott Bambrough
7c03c75e90 2000-06-26 Scott Bambrough <scottb@netwinder.org>
* arm-dis.c (regnames): Add an additional register set to match
	the set used by GCC.  Make it the default.
2000-06-26 16:50:29 +00:00
Alan Modra
1581f8c9fe Ensure /usr/include and the like stay out of dependencies. 2000-06-22 13:01:43 +00:00
H.J. Lu
bbeb2e037c 2000-06-20 H.J. Lu <hjl@gnu.org>
* Makefile.am: Rebuild dependency.
	* Makefile.in: Rebuild.
2000-06-20 20:41:02 +00:00
Nick Clifton
60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Nicholas Duffek
39c20e8f1e * disassemble.c (disassembler): Refer to the PowerPC 620 using
bfd_mach_ppc_620 instead of 620.
2000-06-16 20:46:47 +00:00
Alan Modra
79540e2676 Fix typo. 2000-06-16 07:42:12 +00:00
Jeff Law
53d388d148 * h8300-dis.c: Fix formatting.
(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
        correctly.
2000-06-12 22:23:25 +00:00
Denis Chertykov
8776c5fece * avr-dis.c (avr_operand): Bugfix for jmp/call address. 2000-06-09 17:58:33 +00:00
Denis Chertykov
bab84c47ec * avr-dis.c: completely rewritten. 2000-06-07 17:45:44 +00:00
Nick Clifton
5fec0fc5d1 Fix formatting 2000-06-02 18:09:28 +00:00
Nick Clifton
3903e627f3 Applied patch from Kazu Hirata <kazu@hxi.com> to fix disassembly of inc.l
and dec.l instructions
2000-06-01 18:19:59 +00:00
Nick Clifton
c0ae4cccdd Add comment describoing why dgettext() is used in _() macro. 2000-05-31 18:32:07 +00:00
Nick Clifton
bb08852125 Undo part of previous delta, so that _() calls dgettext() not gettext(). 2000-05-30 21:04:24 +00:00
Nick Clifton
c1485d85e0 Replace defines with those from intl/libgettext.h to quieten gcc warnings. 2000-05-30 18:35:35 +00:00
Alan Modra
2114f57b93 Update dependencies. 2000-05-26 14:14:21 +00:00
Alexandre Oliva
d60622826d * m10300-dis.c (disassemble): Don't assume 32-bit longs when
sign-extending operands.
2000-05-26 01:54:33 +00:00
Donald Lindsay
344fc69a7b Add ALONE flag to most of the short branch instructions. 2000-05-25 22:21:38 +00:00
Diego Novillo
fb48caede3 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
(STD_REGISTER_NAMES): New name for REGISTER_NAMES.
	(reg_names): Rename to std_reg_names. Change it to a char **
	static variable.
	(std_reg_names): New name for reg_names.
	(set_mips_isa_type): Set reg_names to point to std_reg_names by
	default.
2000-05-24 15:24:56 +00:00
Nick Clifton
0ab71ce35a Regerbated after change to Makefile.am 2000-05-22 18:04:17 +00:00
Nick Clifton
6c298591a3 Define LIBIBERTY 2000-05-21 17:01:02 +00:00
Frank Ch. Eigler
f660ee8b2e * cgen/opcodes fix
* approved by nickc

[opcodes/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* fr30-desc.h: Partially regenerated to account for changed
	CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
	* m32r-desc.h: Ditto.

[include/opcode/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
	it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
	(CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
	CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-16 19:28:07 +00:00
Nick Clifton
322f2c4579 Add support for _x and _s flags to MSR instruction 2000-05-15 19:25:22 +00:00
Nick Clifton
60fc8cba61 Fix disassembly of DLRS{H|B} instruction 2000-05-12 17:15:21 +00:00
Alan Modra
73da6b6b40 Don't mask top 32 bits of 64-bit address. 2000-05-11 07:10:19 +00:00
Geoffrey Keating
d2f75a6f40 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
also available in common mode when powerpc syntax is being used.
2000-05-10 19:42:25 +00:00
Alan Modra
821011cc5b Kill compiler warnings with ATTRIBUTE_UNUSED. 2000-05-08 07:22:54 +00:00
Timothy Wall
5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
J.T. Conklin
786e2c0f62 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.

* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-03 22:25:08 +00:00
Denis Chertykov
3c504221d4 * avr-dis.c (reg_fmul_d): New. Extract destination register from
FMUL instruction.
	(reg_fmul_r): New. Extract source register from FMUL instruction.
	(reg_muls_d): New. Extract destination register from MULS instruction.
	(reg_muls_r): New. Extract source register from MULS instruction.
	(reg_movw_d): New. Extract destination register from MOVW instruction.
	(reg_movw_r): New. Extract source register from MOVW instruction.
	(print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
	EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
2000-05-01 08:45:11 +00:00
Clinton Popetz
7f6d05e83e Add XCOFF64 support.
bfd:
	* Makefile.am (coff64-rs6000.lo): New rule.
	* Makefile.in: Regenerate.
	* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
	xcoff_is_local_label_name, xcoff_rtype2howto,
	xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
	xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
	xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
	(NO_COFF_SYMBOLS): Define.
	(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
	xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
	internally.
	(MINUS_ONE): New macro.
	(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
	relocation.
	(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
	coff_SWAP_aux_out): Map to the new functions.
	* coff64-rs6000.c: New file.
	* libcoff.h (bfd_coff_backend_data): Add new fields
	_bfd_coff_force_symnames_in_strings and
	_bfd_coff_debug_string_prefix_length.
	(bfd_coff_force_symnames_in_strings,
	bfd_coff_debug_string_prefix_length): New macros for above fields.
	* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
	Set machine to 620 for XCOFF64.  Use bfd_coff_swap_sym_in instead
	of using coff_swap_sym_in directly.
	(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
	(coff_set_flags) Set magic for XCOFF64.
	(coff_compute_section_file_positions): Add symbol name length to
	string section length if bfd_coff_debug_string_prefix_length is
	true.
	(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
	(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
	using coff_swap_lineno_in directly.
	(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
	and _bfd_coff_debug_string_prefix_length fields.
	* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
	symbol names into strings table when
	bfd_coff_force_symnames_in_strings is true.
	* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
	SET_RELOC_VADDR): New macros.
	(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
	(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
	code.
	(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
	changes within RS6000COFF_C specific code.
	(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
	MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
	* reloc.c (bfd_perform_relocation, bfd_install_relocation):
	Extend existing hack on target name.
	* xcofflink.c (XCOFF_XVECP): Extend existing hack on
	target name.
	* coff-tic54x.c (ticof): Keep up to date with new fields
	in bfd_coff_backend_data.
	* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
	targ_selvecs to include rs6000coff64_vec for rs6000.
	* configure.in: Add rs6000coff64_vec case.
 	* cpu-powerpc.c: New bfd_arch_info_type.

	gas:
	* as.c (parse_args): Allow md_parse_option to override -a listing
	option.
	* config/obj-coff.c (add_lineno): Change type of offset parameter
	from "int" to "bfd_vma."
	* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
	(ppc_mach, ppc_subseg_align, ppc_target_format): New.
	(ppc_change_csect): Align correctly for XCOFF64.
	(ppc_machine): New function, which discards "ppc_machine" line.
	(ppc_tc): Cons for 8 when code is 64 bit.
	(md_apply_fix3): Don't check operand->insert.  Handle 64 bit
	relocations.
	(md_parse_option): Handle -a64 and -a32.
	(ppc_xcoff64): New.
	* config/tc-ppc.h (TARGET_MACH): Define.
	(TARGET_FORMAT): Move to function.
	(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.

	include:
	* include/coff/rs6k64.h: New file.

	opcodes:
	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.
2000-04-26 15:09:44 +00:00
Nick Clifton
447b43fa50 Initialise signed_overflow field 2000-04-24 17:32:36 +00:00
Timothy Wall
aa170a07eb Misc assembly/disassembly fixes. 2000-04-23 02:39:13 +00:00
Jeff Law
91b1cc5d0b * hppa-dis.c (extract_16): New function.
(print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
        new operand types l,y,&,fe,fE,fx.
2000-04-21 22:04:29 +00:00
Jim Wilson
800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Alexandre Oliva
4d85706b80 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
(disassemble): Use them.
2000-04-20 22:15:32 +00:00
Alan Modra
0d8dfecfe9 More portability patches. Include sysdep.h everywhere. 2000-04-14 04:16:58 +00:00
Andrew Cagney
a2d91340f3 Remove ``-W -Wall'' from top-level Makefile/configure.
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it.  Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
2000-04-09 12:17:43 +00:00
Joern Rennecke
52ccafd035 opcodes:
* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
	stc GBR,@-<REG_N> is available for arch_sh1_up.
	Group parallel processing insn with identical mnemonics together.
	Make three-operand psha / pshl come first.
gas:
	* config/tc-sh.c (get_operands): There's no third operand if the
	first operand is an immediate.
2000-04-05 21:43:26 +00:00
Joern Rennecke
015551fcfb sh-dsp REPEAT support:
opcodes:

        * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (sh_arg_type): Add A_PC.
        (sh_table): Update entries using immediates.  Add repeat.
        * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.

gas:

        * config/tc-sh.c (immediate): Delete.
        (sh_operand_info): Add immediate member.
        (parse_reg): Use A_PC for pc.
        (parse_exp): Add second argument 'op'.  All callers changed.
        (parse_at): Expect pc to be coded as A_PC.
        Use immediate field in *op.
        (insert): Add fourth argument 'op'.  All callers changed.
        (build_relax): Add second argument 'op'.  All callers changed.
        (insert_loop_bounds): New function.
        (build_Mytes): Remove DISP_4.
        Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}.  Add REPEAT.
        (assemble_ppi): Use immediate field in *operand.
        (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
        (md_apply_fix): Likewise.
        (tc_gen_reloc): Likewise.  Check for a pcrel BFD_RELOC_SH_LABEL.

include/coff:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.

include/elf:

        * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.

bfd:

        * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
        BFD_RELOC_SH_LOOP_END.
        * elf32-sh.c (sh_elf_howto_tab): Change special_func to
        sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
        Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
        (sh_elf_reloc_loop): New function.
        (sh_elf_reloc): No need to test for always-to-be-ignored relocs
        any more.
        (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
        (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
        * bfd-in2.h, libbfd.h: Regenerate.
2000-04-05 21:23:05 +00:00
Alan Modra
8ad3436c79 Move translated part of bug report string back into .c files so
xgettext can find it.  Regnerate .pot files.
2000-04-04 14:32:35 +00:00
Alan Modra
41b49281c1 Use "gcc -MM" for dependencies, and update them. 2000-04-04 10:53:56 +00:00
Alan Modra
b77a133c96 Tidy some code. Print pc rel addresses as signed. 2000-04-03 14:17:43 +00:00
Ian Lance Taylor
9aaaa29133 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
the parameter ATTRIBUTE_UNUSED.
	* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-02 06:26:09 +00:00
Alexandre Oliva
5728a7d74f * m10300-opc.c: SP-based offsets are always unsigned. 2000-04-01 22:03:31 +00:00
Alexandre Oliva
907f179095 Reverted the comment about inc/inc4, that was already implied by RN02. 2000-03-31 20:31:05 +00:00
Alexandre Oliva
fa5e0d8d33 Fix typos. Add FIXME for 2-reg inc and inc4. 2000-03-31 19:28:52 +00:00
Nick Clifton
67b60d924f Disassemble 0xde.. to "bal" [branch always] instead of "undefined". 2000-03-29 18:23:57 +00:00
Nick Clifton
ba23e138c9 Fix value of SHORT_A1.
Move SHORT_AR to end of list of short instructions.
2000-03-27 20:17:02 +00:00
Ian Lance Taylor
832ddf6235 * Makefile.am (CFILES): Add avr-dis.c.
(ALL_MACHINES): Add avr-dis.lo.
2000-03-27 16:34:34 +00:00
Alan Modra
adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00