* config/tc-m32r.c (assemble_parallel_insn): No need to try
non-relaxable variant any more. Simplify test for nop insn.
(md_assemble): Only scan operands if m32rx. Set orig_insn in case
scan of operands yields an insn different from original (e.g. a macro).
Fix call to can_make_parallel.
* read.c (s_set): Cast xmalloc return value to fragS *.
* config/tc-m68k.c (m68k_ip): Function made static to match
previous forward declaration.
(insert_reg, init_regtable, md_convert_frag_1): Likewise.
* config/tc-i386.c (check_prefix): New static function, split out
from md_assemble.
(struct _i386_insn): Add wait_prefix field.
(md_assemble): Remove wait_prefix local variable. Use
check_prefix when adding a prefix.
* config/tc-i386.c (current_templates): New static variable.
(md_assemble): Remove current_templates local variable.
(md_assemble, i386_operand): Improve error and warning messages in
many places. Add RESTORE_END_STRING in many places before error
return. Clarify some comments.
* config/tc-i386.c (struct _i386_insn): Change seg field to a two
element array.
(md_assemble): Parse string instruction operands, looking for
segment override prefixes. Check for invalid segment prefixes on
string instruction.
(i386_operand): i.seg[] and max mem_operand changes for string
insns.
* config/tc-i386.h (EsSeg): Define.
* config/tc-i386.h (regKludge): Define.
(iclrKludge, imulKludge): Don't define.
* config/tc-i386.c (md_assemble): Merge imulKludge and iclrKludge
code. Move ReverseRegRegmem fudges into Modrm case. Reorder
opcode_modifier checks to look for more common cases first. Add
default_seg for IsString case.
(compute_mpgloc): New function.
(eval_expr): New arg `cpu'. All callers updated.
(non_vu_insn_seen_p): New static global.
(RELAX_{MPG,DIRECT,VU,ENCODE,GROWTH,DONE_}): New macros.
(struct dvp_fixup): New member `cpu'.
(assemble_one_insn): New args init_fixup_count, fixup_offset.
All callers updated.
(md_assemble): Set non_vu_insn_seen_p as appropriate.
(assemble_vif): Set `cpu' field of fixup.
Clean up calls to frag_var. Recorded mpgloc is now in bytes.
(assemble_vu_insn): Delete, contents moved into ...
(assemble_vu): ... here. Don't record fixups until after parsing
both upper and lower insns. If branch insn inside mpg, properly
compute target address.
(dvp_frob_label): Create copies of vu labels inside mpg's.
(dvp_relax_frag): Clean up.
(md_convert_frag): Ditto.
(md_apply_fix3): Signal error if mpg embedded vu code has branch
to undefined label (not currently supported).
(eval_expr): New arg `cpu'. All callers updated.
(insert_operand_final): Convert mpgloc from bytes to dwords.
(s_endmpg): Use compute_mpgloc to update $.mpgloc.
(s_state): If switching to vu state, initialize $.mpgloc.
* config/tc-i386.c (md_assemble): Swap template arguments to
CONSISTENT_REGISTER_MATCH macro in reverse direction test.
This macro is currently symmetric, so passing them the wrong
way didn't cause any problem, but may if the macro is changed
in the future.
After copying template to i.tm, use i.tm. rather than t-> to
access fields, and make t a const*
Move i.tm.operand_types[] swap to immediately after the copy.
(md_convert_frag): Delete.
(TC_FIX_TYPE): New fields wl,cl,user_value;
* config/tc-dvp.c (insert_mpg_marker): New argument ignore.
All callers updated.
(insert_unpack_marker): New function.
(insert_file): New argument insert_marker_arg. All callers updated.
(gif_user_value): New static local.
(vif_data_start,vif_data_end): New static locals.
(mpgloc_sym,unpackloc_sym): New static locals.
(cur_varlen_frag,cur_varlen_insn,cur_varlen_value): Delete.
(cur_opcode,cur_operand): New static locals.
(endmpg_caller): New enum.
(md_pseudo_table): Pass ENDMPG_USER to s_endmpg.
(md_begin): Initialize mpgloc_sym, unpackloc_sym.
(dvp_fixup): New members user_value,wl,cl;
(assemble_vif): Rewrite.
(assemble_gif): Tweak name of data start label.
(assemble_one_insn): Allow special parser to punt and call the
normal expression parser. Set cur_opcode,cur_operand for md_operand.
(md_operand): Handle '*' value for mpgloc,unpackloc.
(md_estimate_size_before_relax): New function.
(dvp_relax_frag,md_convert_frag): New functions.
(md_pcrel_from_section): Handle end data label for variable length
vif insns.
(md_apply_fix3): Handle count field for variable length vif insns.
Handle address field for mpg,unpack.
(eval_expr): Initialize user_value,wl,cl fields of the fixup.
(cur_vif_insn_length): Delete.
(vif_length_value): New function.
(install_vif_length): Don't perform logical->physical conversion here.
(s_enddirect,s_endmpg,s_endunpack): Rewrite.
* config/tc-i386.h (LinearAddress): Define.
* config/tc-i386.c (md_assemble): If LinearAddress is set for the
instruction, don't use a default segment.
"name.completer" where only the name is actually in the opcode
table. Allow various operands for base register in load/store
instructions. Handle various new argument characters for the
cop2/vu0 co-processor.
(insert_file): New args insert_marker, size. All callers updated.
(assemble_vif): Rewrite varlen insn handling.
(assemble_vu): Call insert_mpg_marker when 256th insn reached.
(s_enddirect,s_endunpack): Rename arg to internal_p.
(setup_dma_autocount): Renamed from setup_autocount. New argument
inline_p. All callers changed. Fix word address of count.
(parse_dma_addr_autocount): Fix word address of address.
