11 Commits

Author	SHA1	Message	Date
Richard Earnshaw	a2fc1b1f19	* arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h. ... * arm-dis.c (print_insn_arm): Don't handle 'h' case.	2002-01-19 12:27:24 +00:00
Richard Earnshaw	395213c846	2002-01-18 Keith Walker <keith.walker@arm.com> ... * arm-opc.h (arm_opcodes): Add bxj instruction.	2002-01-18 17:33:49 +00:00
Richard Earnshaw	a660f11eb1	* arm-opc.h (arm_opcodes): Add patterns for VFP instructions. ... * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for VFP bitfields.	2002-01-15 15:41:23 +00:00
Aldy Hernandez	b1ee46c5af	* opcodess/arm-opc.h (arm_opcodes): Add cirrus insns. ... * opcodes/arm-dis.c (print_insn_arm): Add 'I' case.	2001-10-08 18:50:37 +00:00
Nick Clifton	060d22b0d0	Fix typos in ChangeLogs; fix dates in copyright notices	2001-03-13 22:58:38 +00:00
Nick Clifton	077b8428ab	Add ARM v5t, v5te and XScale support	2000-11-25 00:21:40 +00:00
Nick Clifton	322f2c4579	Add support for _x and _s flags to MSR instruction	2000-05-15 19:25:22 +00:00
Nick Clifton	60fc8cba61	Fix disassembly of DLRS{H|B} instruction	2000-05-12 17:15:21 +00:00
Nick Clifton	67b60d924f	Disassemble 0xde.. to "bal" [branch always] instead of "undefined".	2000-03-29 18:23:57 +00:00
Donald Lindsay	cfbd315cb2	Added 'X' format to ARM code.	1999-11-16 03:37:02 +00:00
Richard Henderson	252b5132c7	19990502 sourceware import	1999-05-03 07:29:11 +00:00