Commit Graph

2570 Commits

Author SHA1 Message Date
Stephane Carrez
099d1b506b * dv-m68hc11eepr.c (struct m68hc11eepr ): Use const char* for filename. 2002-08-13 09:01:16 +00:00
Stephane Carrez
31c7c532ab * interp.c (sim_prepare_for_program): Look up the image for the
reset vector and set cpu_use_elf_start to 1 if not found.
	(sim_open): Do not set cpu_use_elf_start.
2002-08-13 08:52:02 +00:00
Stephane Carrez
3976210097 * interp.c (sim_hw_configure): Return 1 for success.
(sim_prepare_for_program): Use the sim_hw_configure exit code to
	return SIM_RC_FAIL.
2002-08-13 08:47:18 +00:00
Stephane Carrez
ca156d780d Fix english and ChangeLog entry 2002-08-13 08:40:32 +00:00
Stephane Carrez
7230d80931 * dv-m68hc11.c (m68hc11cpu_io_read_buffer): Translate memory
bank window to some virtual address to read from extended memory.
	(m68hc11cpu_io_write_buffer): Likewise for writing.
	(attach_m68hc11_regs): When use_bank property is defined, attached
	to the 68HC12 16K memory bank window.
	* interp.c (sim_hw_configure): Create memory region for banked
	memory.
2002-08-13 08:38:09 +00:00
Stephane Carrez
dcceded28a * interp.c (sim_hw_configure): Connect port-X to cpu-write-port.
* dv-m68hc11.c (m68hc11cpu_ports): Add cpu-write-port input.
	(m68hc11cpu_port_event): Handle CPU_WRITE_PORT event.
2002-08-13 08:10:45 +00:00
Stephane Carrez
abea9e28ea * dv-m68hc11.c (m68hc11cpu_io_write): Fix to update IO mapping
when IO mapping changed, not when internal RAM mapping is changed.
2002-08-13 07:57:18 +00:00
Stephane Carrez
63f36def60 * m68hc11_sim.c (cpu_special): Handle call and rtc instructions.
* sim-main.h (M6812_CALL_INDIRECT): Add to enum.
	(m6811_regs): Add page register.
	(cpu_set_page, cpu_get_page): New macros.
	(phys_to_virt): New function.
	(cpu_get_indexed_operand_addr, cpu_return): Declare.
	* gencode.c: Identify indirect addressing mode for call and fix daa.
	(gen_function_entry): New param to tell if src8/dst8 locals are
	necessary.
	(gen_interpreter): Use it to avoid generation of unused variables.
	* interp.c (sim_fetch_register): Allow to read page register; page
	register, A, B and CCR are only 1 byte wide.
	(sim_store_register): Likewise for writing.
2002-08-13 07:46:09 +00:00
Chris Demetriou
06e7837e0f 2002-07-30 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_load_double, do_store_double): New functions.
        (LDC1, SDC1): Rename to...
        (LDC1b, SDC1b): respectively.
        (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
2002-07-31 05:44:54 +00:00
Michael Snyder
2265c243fc 2002-07-29 Michael Snyder <msnyder@redhat.com>
* cp1.c (fp_recip2): Modify initialization expression so that
	GCC will recognize it as constant.
2002-07-29 23:17:10 +00:00
Andrey Volkov
a64bfde32f Add dependences to Makefile.in and include sim-h8300 in compile.c 2002-07-29 17:01:57 +00:00
Andrew Cagney
de0a1e42d0 Delete w65 directory. 2002-07-18 00:05:41 +00:00
Andrew Cagney
75c4388adb Index: sim/common/ChangeLog
2002-07-17  Andrew Cagney  <cagney@redhat.com>

* run-sim.h: Add #ifdef RUN_SIM_H wrapper.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Declare.  Moved
to here from "gdb/remote-sim.h".

Index: include/gdb/ChangeLog
2002-07-17  Andrew Cagney  <cagney@redhat.com>

* remote-sim.h: Update copyright.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Delete.  Moved to
"sim/common/run-sim.h".
2002-07-17 21:20:09 +00:00
Joern Rennecke
2f14585c74 include/gdb:
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
	renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
	* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
	* interp.c: Include "gdb/sim-sh.h".
	(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
	* sh-tdep.c (sh_dsp_register_sim_regno): New function.
	(sh_gdbarch_init): Use it for sh-dsp.
2002-07-17 18:43:28 +00:00
Andrew Cagney
7a3085c168 Obsolete fr30. 2002-07-16 14:30:14 +00:00
Andrew Cagney
39248af88f * sim-resume.c (sim_resume): Add local variable sig_to_deliver to
avoid possible longjmp problems with automatic variable siggnal.
2002-07-15 16:13:12 +00:00
Andrew Cagney
076043f24e From 2002-07-11 Momchil Velikov <velco@fadata.bg>:
* Make-common.in (installdirs): Make $(libdir) too, needed when
installing libsim.a.
2002-07-14 17:03:39 +00:00
Andrew Cagney
3fbeef0be8 Obsolete the d30v. 2002-07-14 00:15:20 +00:00
Nick Clifton
630ace253a Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions. 2002-07-05 14:12:01 +00:00
Elena Zannoni
6504452655 2002-06-24 Richard Sandiford <rsandifo@redhat.com>
* sh64.c: Update path of "callback.h".

2002-06-20  Elena Zannoni  <ezannoni@redhat.com>

        * sh64.c: Include correct file for register numbers.
2002-06-24 13:26:07 +00:00
Andrew Cagney
bf1024d698 * Makefile.in (INTL_SRC): Define.
(INTL_CFLAGS): Define.
(INTL_DIR): Define.
(STD_CFLAGS): Add INTL_CFLAGS.
2002-06-22 19:10:34 +00:00
Nick Clifton
7b77dec665 Set correct value for ADP_Stopped_RunTimeError 2002-06-21 06:58:36 +00:00
Chris Demetriou
a2f8b4f350 2002-06-18 Chris Demetriou <cgd@broadcom.com>
* mdmx.c (SD_): Delete.
        (Unpredictable): Re-define, for now, to directly invoke
        unpredictable_action().
        (mdmx_acc_op): Fix error in .ob immediate handling.
2002-06-18 22:15:03 +00:00
Andrew Cagney
b4b6c9398a * interp.c (sim_firmware_command): Initialize `address'. 2002-06-18 21:32:15 +00:00
Joern Rennecke
dc9feb5c97 * interp.c (sim_resume): Fix setting of bus error for
instruction fetch.
2002-06-18 15:54:44 +00:00
Andrew Cagney
2796179517 * hw-events.c (hw_event_queue_schedule): Initialize `dummy'. 2002-06-17 23:53:45 +00:00
Andrew Cagney
57af9c8bc0 * d10v_sim.h (SET_PSW_BIT): Add cast to avoid inverting an enum. 2002-06-17 23:37:43 +00:00
Andrew Cagney
d62274a397 * simops.c (trace_result): Fix printf formatting. 2002-06-17 21:49:05 +00:00
Andrew Cagney
bf96209254 * sim-memopt.c: Include <unistd.h>.
(do_memopt_add): Fix printf format.
* sim-events.c (sim_events_schedule): Initialize ``dummy''.
2002-06-17 21:45:55 +00:00
Andrew Cagney
78e731cd36 * gen.c (gen_entry_expand_opcode): Initialize ``value'' to -1 and
``t'' to NULL.
* igen.c (main): Add default case to switch.
* gen-icache.c (print_icache_extraction): Ditto.
2002-06-17 21:44:06 +00:00
Andrew Cagney
b74317ff8e * Makefile.in (BUILD_CFLAGS): Remove -O0. 2002-06-17 21:03:40 +00:00
Elena Zannoni
47243d69f7 2002-06-17 Elena Zannoni <ezannoni@redhat.com>
* psim.c (psim_options): Don't choke when gdb invokes us with
	the --architecture option, just ignore it.
2002-06-17 19:58:39 +00:00
Andrew Cagney
c8cca39f98 Import current --enable-gdb-build-warnings. 2002-06-16 16:33:35 +00:00
Andrew Cagney
3832c25c18 * Makefile.in (autoconf-changelog autoheader-changelog): Let name,
id, date and host to be overriden by NAME, ID, DATE and HOST
respectfully.  Use ISO dates.
2002-06-16 15:59:34 +00:00
Tom Rix
3d2957e64e Fix for transfers across segments. 2002-06-15 11:01:34 +00:00
Chris Demetriou
e7e8118132 2002-06-14 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* mips3d.igen: New file which contains MIPS-3D ASE instructions.
	* Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
	* mips.igen: Include mips3d.igen.
	(mips3d): New model name for MIPS-3D ASE instructions.
	(CVT.W.fmt): Don't use this instruction for word (source) format
	instructions.
	* cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
	(fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
	(fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
	(NR_FRAC_GUARD, IMPLICIT_1): New macros.
	* sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
	(RSquareRoot1, RSquareRoot2): New macros.
	(fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
	(fp_rsqrt2): New functions.
	* configure.in: Add MIPS-3D support to mipsisa64 simulator.
	* configure: Regenerate.
2002-06-14 18:49:09 +00:00
Chris Demetriou
eab549520a fix attribution in previous changelog entry 2002-06-14 04:49:15 +00:00
Chris Demetriou
3a2b820ef3 2002-06-13 Chris Demetriou <cgd@broadcom.com>
* cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
	(value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
	(fp_inv_sqrt, fpu_format_name): Add paired-single support.
	(convert): Note that this function is not used for paired-single
	format conversions.
	(ps_lower, ps_upper, pack_ps, convert_ps): New functions.
	* mips.igen (FMT, MOVtf.fmt): Add paired-single support.
	(check_fmt_p): Enable paired-single support.
	(ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
	(PUU.PS): New instructions.
	(CVT.S.fmt): Don't use this instruction for paired-single format
	destinations.
	* sim-main.h (FP_formats): New value 'fmt_ps.'
	(ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
	(PSLower, PSUpper, PackPS, ConvertPS): New macros.
2002-06-14 04:44:11 +00:00
Chris Demetriou
d18ea9c2b8 2002-06-12 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of function calls in
        many FP operations.
2002-06-12 23:32:05 +00:00
Chris Demetriou
95fd5cee7d 2002-06-12 Chris Demetriou <cgd@broadcom.com>
* mips.igen (MOVN, MOVZ): Trace result.
        (TNEI): Print "tnei" as the opcode name in traces.
        (CEIL.W): Add disassembly string for traces.
        (RSQRT.fmt): Make location of disassembly string consistent
        with other instructions.
2002-06-12 23:20:56 +00:00
Chris Demetriou
4f0d55aeaa 2002-06-12 Chris Demetriou <cgd@broadcom.com>
* mips.igen (X): Delete unused function.
2002-06-12 22:22:41 +00:00
Andrew Cagney
26216b9822 Add the file include/gdb/sim-arm.h defining an enum that specifies the
register numbering used by the GDB<->SIM interface.
2002-06-12 21:19:43 +00:00
Aldy Hernandez
307041b752 missed 2 in 2002. oops. 2002-06-12 00:46:41 +00:00
Aldy Hernandez
7d7d930f7a 002-06-09 Aldy Hernandez <aldyh@redhat.com>
* sim-fpu.c (unpack_fpu): Initialize exponent for
        sim_fpu_class_zero.
        (i2fpu): Same.
        (sim_fpu_sqrt): Same.
2002-06-12 00:46:11 +00:00
Andrew Cagney
3c25f8c7b0 Move include/callback.h and include/remote-sim.h to include/gdb/.
Update accordingly.
2002-06-09 15:45:54 +00:00
Andrew Cagney
983b727e70 Fix name of enum used in cast (sim_fetch_register, sim_store_register). 2002-06-08 22:19:56 +00:00
Chris Demetriou
f3c08b7e16 2002-06-07 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
	(fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
	* sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
	(fp_nmsub): New prototypes.
	(RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
	(NegMultiplySub): New defines.
	* mips.igen (RSQRT.fmt): Use RSquareRoot().
	(MADD.D, MADD.S): Replace with...
	(MADD.fmt): New instruction.
	(MSUB.D, MSUB.S): Replace with...
	(MSUB.fmt): New instruction.
	(NMADD.D, NMADD.S): Replace with...
	(NMADD.fmt): New instruction.
	(NMSUB.D, MSUB.S): Replace with...
	(NMSUB.fmt): New instruction.
2002-06-08 03:05:23 +00:00
Chris Demetriou
52714ff9ee 2002-06-07 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

        * cp1.c: Fix more comment spelling and formatting.
        (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
        (denorm_mode): New function.
        (fpu_unary, fpu_binary): Round results after operation, collect
        status from rounding operations, and update the FCSR.
        (convert): Collect status from integer conversions and rounding
        operations, and update the FCSR.  Adjust NaN values that result
        from conversions.  Convert to use sim_io_eprintf rather than
        fprintf, and remove some debugging code.
        * cp1.h (fenr_FS): New define.
2002-06-07 22:55:49 +00:00
Chris Demetriou
577d8c4b5a 2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c (convert): Remove unusable debugging code, and move MIPS
	rounding mode to sim FP rounding mode flag conversion code into...
	(rounding_mode): New function.
2002-06-07 16:50:42 +00:00
Chris Demetriou
196496eda0 2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up formatting of a few comments.
	(value_fpr): Reformat switch statement.
2002-06-07 16:43:19 +00:00
Chris Demetriou
cfe9ea23c7 2002-06-06 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* cp1.h: New file.
	* sim-main.h: Include cp1.h.
	(SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
	(FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
	(FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
	(FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
	(value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
	(ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
	* cp1.c: Don't include sim-fpu.h; already included by
	sim-main.h.  Clean up formatting of some comments.
	(NaN, Equal, Less): Remove.
	(test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
	(fp_cmp): New functions.
	* mips.igen (do_c_cond_fmt): Remove.
	(C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
	Compare.  Add result tracing.
	(CxC1): Remove, replace with...
	(CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
	(DMxC1): Remove, replace with...
	(DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
	(MxC1): Remove, replace with...
	(MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
2002-06-07 00:13:24 +00:00
Andrew Cagney
c93abbccf2 * Makefile.in (ChangeLog): New makefile variable.
* README-HACKING: Mention the ChangeLog makefile variable.
2002-06-06 16:33:45 +00:00
Andrew Cagney
73fa0d3fb2 * writecode.c (lookup_inst): Generate inverse table on-the-fly.
(z8k_inv_list): Delete global.
(DIRTY_HACK): Delete macro.
(makelist): Delete global.
(main): Delete code making a list.  Delete dirty hack code.  Use
lookup_inst instead of z8k_inv_list.
* list.c: Delete file.
* Makefile.in (writecode): Do not link in list.o.
(list.o): Delete target.
2002-06-06 15:50:50 +00:00
Chris Demetriou
ee7254b0cc 2002-06-04 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (FGRIDX): Remove, replace all uses with...
        (FGR_BASE): New macro.
        (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
        (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
        (NR_FGR, FGR): Likewise.
        * interp.c: Replace all uses of FGRIDX with FGR_BASE.
        * mips.igen: Likewise.
2002-06-04 22:38:41 +00:00
Chris Demetriou
d3eb724f81 2002-06-04 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Add an FSF Copyright notice to this file.
2002-06-04 16:35:24 +00:00
Chris Demetriou
ba46ddd0cf 2002-06-04 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

        * cp1.c (Infinity): Remove.
        * sim-main.h (Infinity): Likewise.

        * cp1.c (fp_unary, fp_binary): New functions.
        (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
        (fp_sqrt): New functions, implemented in terms of the above.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Remove (replaced by functions above).
        * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
        (fp_recip, fp_sqrt): New prototypes.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Replace prototypes with #defines which
        invoke the functions above.
2002-06-04 16:17:20 +00:00
Chris Demetriou
18d8a52d00 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
        (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
        file, remove PARAMS from prototypes.
        (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
        simulator state arguments.
        (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
        pass simulator state arguments.
        * cp1.c (SD): Redefine as CPU_STATE(cpu).
        (store_fpr, convert): Remove 'sd' argument.
        (value_fpr): Likewise.  Convert to use 'SD' instead.
2002-06-04 01:35:23 +00:00
Chris Demetriou
0f154cbd1c 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c (Min, Max): Remove #if 0'd functions.
        * sim-main.h (Min, Max): Remove.
2002-06-04 00:18:46 +00:00
Chris Demetriou
e80fc1523d 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: fix formatting of switch case and default labels.
        * interp.c: Likewise.
        * sim-main.c: Likewise.
2002-06-03 22:30:52 +00:00
Chris Demetriou
bad673a9cb 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up comments which describe FP formats.
	 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
2002-06-03 22:05:15 +00:00
Chris Demetriou
7cbea0890e 2002-06-03 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* configure.in (mipsisa64sb1*-*-*): New target for supporting
	Broadcom SiByte SB-1 processor configurations.
	* configure: Regenerate.
	* sb1.igen: New file.
	* mips.igen: Include sb1.igen.
	(sb1): New model.
	* Makefile.in (IGEN_INCLUDE): Add sb1.igen.
	* mdmx.igen: Add "sb1" model to all appropriate functions and
	instructions.
	* mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
	(ob_func, ob_acc): Reference the above.
	(qh_acc): Adjust to keep the same size as ob_acc.
	* sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
	(MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
2002-06-03 21:00:29 +00:00
Chris Demetriou
909daa8222 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
2002-06-03 18:35:19 +00:00
Richard Henderson
4e62efb8f8 * gen-engine.c (print_run_body): Avoid multi-line strings.
* lf.c (lf_print__gnu_copyleft): Likewise.
2002-06-03 16:04:31 +00:00
Elena Zannoni
676ab6a01e Use current date in ChangeLog entry. 2002-06-03 00:47:14 +00:00
Elena Zannoni
c7675842d8 2002-05-28 Elena Zannoni <ezannoni@redhat.com>
From Jason Eckhardt <jle@redhat.com>
        * d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
        less than MOD_S (post-decrement).
2002-06-03 00:36:02 +00:00
Chris Demetriou
f4f1b9f102 2002-06-02 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* mips.igen (mdmx): New (pseudo-)model.
	* mdmx.c, mdmx.igen: New files.
	* Makefile.in (SIM_OBJS): Add mdmx.o.
	* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
	New typedefs.
	(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
	(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
	(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
	(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
	(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
	(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
	(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
	(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
	(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
	(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
	(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
	(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
	(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
	(qh_fmtsel): New macros.
	(_sim_cpu): New member "acc".
	(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
	(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
Andrew Cagney
e4045cdb95 Delete TiC80, no longer supported by GDB. 2002-06-01 23:23:28 +00:00
Andrew Cagney
18c0df9e1b Fill-out d10v enum so that there are no ``=''. 2002-06-01 18:15:43 +00:00
Kazu Hirata
dbec3bef45 * run.c: Fix formatting. 2002-05-31 02:17:26 +00:00
DJ Delorie
d7a97a9b1c * lf.c (lf_print__gnu_copyleft): Convert multiline strings to
compatible format.
* gen-idecode.c (print_run_until_stop_body): Likewise.
* gen-model.c (gen_model_c): Likewise.
2002-05-30 15:07:06 +00:00
Nick Clifton
5aa682b2e0 Set the FSR and FAR registers if a Data Abort is detected. 2002-05-29 19:01:36 +00:00
Elena Zannoni
1aa5e64f43 2002-05-28 Elena Zannoni <ezannoni@redhat.com>
* interp.c (sim_create_inferior): Add comment.

	From Alan Matsuoka <alanm@redhat.com>:
	From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
	* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
	(OP_4401): Output "mvf0t" instead of "mf0t".
	(OP_460B): Do not output a flag register.
	(OP_4609): Do not output a flag register.
2002-05-28 15:49:52 +00:00
Nick Clifton
10b57fcbd7 Only perform access checks if 'check' is set.
Report unknown machine numbers.
Formatting tidy ups.
2002-05-27 14:12:00 +00:00
Nick Clifton
7378e198a5 Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced. 2002-05-27 13:30:36 +00:00
Andrew Cagney
b91b96f4f6 * sim-d10v.h: Delete file. Moved to include/gdb/.
* sim-d10v.h: New file.  Moved from include/sim-d10v.h.

* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
* interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".

* d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* Makefile.in (sim_d10v_h): Update definition.
2002-05-24 00:12:18 +00:00
Nick Clifton
2984e11475 When decoding a BLX(1) instruction do not add in the second bit of the base
address - this has already been accounted for.
2002-05-23 12:38:31 +00:00
Nick Clifton
8b2440b731 Simulate XScale BCUMOD register 2002-05-21 20:28:26 +00:00
Nick Clifton
de4112fa38 Add support for target specific command line switches to old-style simualtors.
Make use of this support in the ARM simulator to add a --swi-support= switch
to select whcih SWI protocols to emulate.
2002-05-20 14:32:50 +00:00
Kazu Hirata
d13351445b * compile.c: Fix formatting. 2002-05-19 12:52:54 +00:00
Kazu Hirata
c3f4437ee1 * compile.c: Fix formatting. 2002-05-18 11:40:19 +00:00
Andrey Volkov
6147b1f62b * compile.c: Add absented opcodes: LDC, STC, EEPMOV, TAS. 2002-05-17 19:22:14 +00:00
Andrey Volkov
fc97460264 h8300: Add support of EXR register 2002-05-17 19:19:24 +00:00
Andrey Volkov
a8cdafbd4e * h8300s now new target, not alias of h8300h 2002-05-17 19:09:13 +00:00
Andrey Volkov
f6225c9615 *compile.c: Add additional CCR flags (I,UI,H,U) 2002-05-17 18:55:13 +00:00
Andrey Volkov
3b02cf9281 * compile.c: Change literal regnumbers to REGNUMS. 2002-05-17 18:47:14 +00:00
Joern Rennecke
1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Stephane Carrez
2be99286c5 * MAINTAINERS: Update my email address. 2002-05-16 13:38:55 +00:00
Nick Clifton
ace4f296f5 Uses sim callback interface for system calls in RedBoot SWI support. 2002-05-09 10:29:08 +00:00
Nick Clifton
d8512e6afd Support the RedBoot SWI in ARM mode and some of its system calls. 2002-05-09 10:14:12 +00:00
Chris Demetriou
5accf1ff56 [ common/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * callback.c: Use 'deprecated' rather than 'depreciated.'

[ igen/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * igen.c: Use 'deprecated' rather than 'depreciated.'

[ mips/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * interp.c: Use 'deprecated' rather than 'depreciated.'
        * sim-main.h: Likewise.
2002-05-01 23:26:32 +00:00
Chris Demetriou
402586aa26 2002-05-01 Chris Demetriou <cgd@broadcom.com>
* cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
        which wouldn't compile anyway.
        * sim-main.h (unpredictable_action): New function prototype.
        (Unpredictable): Define to call igen function unpredictable().
        (NotWordValue): New macro to call igen function not_word_value().
        (UndefinedResult): Remove.
        * interp.c (undefined_result): Remove.
        (unpredictable_action): New function.
        * mips.igen (not_word_value, unpredictable): New functions.
        (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
        (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
        NotWordValue() to check for unpredictable inputs, then
        Unpredictable() to handle them.
2002-05-01 17:26:14 +00:00
Nick Clifton
d1b0a5b4a9 Handle CLASS_IGNORE and ARG_NIM4. 2002-04-29 16:50:29 +00:00
Chris Demetriou
c9b9995a38 2002-02-24 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of calls to Unpredictable().
2002-04-25 05:37:03 +00:00
Andrew Cagney
e101598283 Revert previous change. 2002-04-20 16:39:46 +00:00
Alexandre Oliva
b882a66bfc * interp.c (sim_open): Disable chunk of code that wrote code in
vector table entries.
2002-04-18 19:47:14 +00:00
Elena Zannoni
d395ade3db 2002-04-15 Elena Zannoni <ezannoni@redhat.com>
* sim_calls.c (sim_fetch_register, sim_store_register): Return -1 for
        AltiVec registers as a temporary stopgap.
2002-04-15 16:32:55 +00:00
David O'Brien
23c7880c01 2002-03-24 David O'Brien <obrien@FreeBSD.org>
* ppc/hw_disk.c: Export a disk device property.

This is needed by the FreeBSD/powerpc porting effort.
2002-03-25 04:39:20 +00:00
Andrew Cagney
e7b564aa85 * gen.c (format_name_cmp): New function.
(insn_list_insert): Use the instruction field name as an
additional key.  Different field names indicate different
semantics.
2002-03-24 00:43:28 +00:00
Andrew Cagney
ec80ed8088 From 2001-12-09 Julien Ducourthial <jducourt@noos.fr>:
* ppc-instructions (lswx): Do the register control with the
register count.  Initialize the right register in the loop.
(mtfsfi) : Correct prefix for the instruction.
2002-03-23 21:18:31 +00:00
Chris Demetriou
c429b7ddd8 2002-03-19 Chris Demetriou <cgd@broadcom.com>
* cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
        (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
        unused definitions.
2002-03-20 07:24:20 +00:00
Chris Demetriou
37d146fa1d 2002-03-19 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Fix many formatting issues.
2002-03-20 07:10:37 +00:00
Chris Demetriou
07892c0b5a 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
* cp1.c (fpu_format_name): New function to replace...
        (DOFMT): This.  Delete, and update all callers.
        (fpu_rounding_mode_name): New function to replace...
        (RMMODE): This.  Delete, and update all callers.
2002-03-20 06:42:05 +00:00
Chris Demetriou
487f79b73c 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
* interp.c: Move FPU support routines from here to...
        * cp1.c: Here.  New file.
        * Makefile.in (SIM_OBJS): Add cp1.o to object list.
        (cp1.o): New target.
2002-03-20 01:35:13 +00:00
Anthony Green
ae60d3ddec Increase default memory size to 8MB. 2002-03-18 21:43:15 +00:00
Chris Demetriou
1e799e28c1 2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
        * mips.igen (mips32, mips64): New models, add to all instructions
        and functions as appropriate.
        (loadstore_ea, check_u64): New variant for model mips64.
        (check_fmt_p): New variant for models mipsV and mips64, remove
        mipsV model marking fro other variant.
        (SLL) Rename to...
        (SLLa) this.
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
        for mips32 and mips64.
        (DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
Chris Demetriou
82f728dbb8 2002-03-07 Chris Demetriou <cgd@broadcom.com>
* mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
        immediate or code as a hex value with the "%#lx" format.
        (ANDI): Likewise, and fix printed instruction name.
2002-03-08 00:37:14 +00:00
Chris Demetriou
6225b4b7fc 2002-03-07 Chris Demetriou <cgd@broadcom.com>
* igen.c (print_itrace_format): Add support for a new "%#lx" format.
2002-03-08 00:36:32 +00:00
Stephane Carrez
86596dc8e0 * m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case.
(cpu_move16): Likewise.
	(sim_memory_error): Use sim_io_printf.
	(cpu_option_handler): Fix compilation warning.
	* interp.c (sim_hw_configure): Fix compilation warning;
	remove m68hc12sio@2 device.
	(sim_open): Likewise.
	* dv-m68hc11tim.c (m68hc11tim_port_event): Fix clear of TFLG2
	flags when reset.
	(cycle_to_string): Improve convertion of cpu cycle number.
	(m68hc11tim_info): Print info about PACNT.
	(m68hc11tim_io_write_buffer): Fix clearing of TFLG2; handle
	TCTL1 and TCTL2 registers.
	* dv-m68hc11.c (m68hc11_info): Print 6811 current running mode.
2002-03-07 19:17:04 +00:00
Stephane Carrez
827ec39a5a * interp.c (sim_hw_configure): Save the HW cpu pointer in the
cpu struct.
	(sim_hw_configure): Connect the capture input/output events.
	* sim-main.h (_sim_cpu): New member hw_cpu.
	(m68hc11cpu_set_oscillator): Declare.
	(m68hc11cpu_clear_oscillator): Declare.
	(m68hc11cpu_set_port): Declare.
	* dv-m68hc11.c (m68hc11_options): New for oscillator commands.
	(m68hc11cpu_ports): New input ports and output ports to reflect
	the HC11 IOs.
	(m68hc11_delete): Cleanup any running oscillator.
	(attach_m68hc11_regs): Create the input oscillators.
	(make_oscillator): New function.
	(find_oscillator): New function.
	(oscillator_handler): New function.
	(reset_oscillators): New function.
	(m68hc11cpu_port_event): Handle the new input ports.
	(m68hc11cpu_set_oscillator): New function.
	(m68hc11cpu_clear_oscillator): New function.
	(get_frequency): New function.
	(m68hc11_option_handler): New function.
	(m68hc11cpu_set_port): New function.
	(m68hc11cpu_io_write): Post the port output events.
	* dv-m68hc11spi.c (set_bit_port): Use m68hc11cpu_set_port to set
	the output port value.
	* dv-m68hc11tim.c (m68hc11tim_port_event): Handle CAPTURE event
	by latching the TCNT value in the register.
2002-03-07 19:12:44 +00:00
Stephane Carrez
5abb9efa08 * sim-main.h (cpu_frame, cpu_frame_list): Remove.
(cpu_frame_reg, cpu_print_frame): Remove.
	(cpu_m68hc11_push_uint8, cpu_m68hc11_pop_uint8): Cleanup.
	(cpu_m68hc11_push_uint16, cpu_m68hc11_pop_uint16): Likewise.
	(cpu_m68hc12_push_uint8, cpu_m68hc12_push_uint16): Likewise.
	(cpu_m68hc12_pop_uint8, cpu_m68hc12_pop_uint16): Likewise.
	* m68hc11_sim.c (cpu_find_frame): Remove.
	(cpu_create_frame_list): Remove.
	(cpu_remove_frame_list, cpu_create_frame, cpu_free_frame): Remove.
	(cpu_frame_reg, cpu_print_frame, cpu_update_frame): Remove.
	(cpu_call): Cleanup to remove #if HAVE_FRAME and calls to the above.
	(cpu_update_frame): Likewise.
	(cpu_return): Likewise.
	(cpu_reset): Likewise.
	(cpu_initialize): Likewise.
	* interp.c (sim_do_command): Remove call to cpu_print_frame.
2002-03-07 19:06:34 +00:00
Stephane Carrez
261289656f * interrupts.c (interrupts_reset): New function, setup interrupt
vector address according to cpu mode.
	(interrupts_initialize): Move reset portion to the above.
	(interrupt_names): New table to give a name to interrupts.
	(idefs): Handle pulse accumulator interrupts.
	(interrupts_info): Print the interrupt history.
	(interrupt_option_handler): New function.
	(interrupt_options): New table of options.
	(interrupts_update_pending): Keep track of when interrupts are
	raised and implement breakpoint-on-raise-interrupt.
	(interrupts_process): Keep track of when interrupts are taken
	and implement breakpoint-on-interrupt.
	* interrupts.h (struct interrupt_history): Define.
	(struct interrupt): Keep track of the interrupt history.
	(interrupts_reset): Declare.
	(interrupts_initialize): Update prototype.
	* m68hc11_sim.c (cpu_reset): Reset interrupts.
	(cpu_initialize): Cleanup.
2002-03-07 18:59:38 +00:00
Stephane Carrez
44befb9ff7 * MAINTAINERS: Record self as maintainer of m68hc11 simulator. 2002-03-06 20:15:53 +00:00
Chris Demetriou
b96e7ef1a0 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (UndefinedResult, Unpredictable): New macros
        which currently do nothing.
2002-03-06 06:46:29 +00:00
Chris Demetriou
d35d4f709f 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (status_UX, status_SX, status_KX, status_TS)
        (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
        (status_CU3): New definitions.

        * sim-main.h (ExceptionCause): Add new values for MIPS32
        and MIPS64: MDMX, MCheck, CacheErr.  Update comments
        for DebugBreakPoint and NMIReset to note their status in
        MIPS32 and MIPS64.
        (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
        (SignalExceptionCacheErr): New exception macros.
2002-03-06 06:21:17 +00:00
Chris Demetriou
3ad6f714f2 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fpu): Enable check for coprocessor 1 usability.
        * sim-main.h (COP_Usable): Define, but for now coprocessor 1
        is always enabled.
        (SignalExceptionCoProcessorUnusable): Take as argument the
        unusable coprocessor number.
2002-03-06 05:41:40 +00:00
Chris Demetriou
97a88e93be fix month on 4 of my recent entries (*sigh*) 2002-03-05 22:25:06 +00:00
Chris Demetriou
86b77b471b 2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of all SignalException calls.
2002-03-05 22:24:24 +00:00
Chris Demetriou
3dea6720b3 2002-02-05 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (SIGNEXTEND): Remove.
2002-03-05 19:22:13 +00:00
Chris Demetriou
b5040d49af 2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Remove gencode comment from top of file, fix
        spelling in another comment.
2002-03-05 07:34:01 +00:00
Chris Demetriou
8612006bd7 2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fmt, check_fmt_p): New functions to check
        whether specific floating point formats are usable.
        (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
        (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
        (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
        Use the new functions.
        (do_c_cond_fmt): Remove format checks...
        (C.cond.fmta, C.cond.fmtb): And move them into all callers.
2002-03-05 03:14:56 +00:00
Chris Demetriou
9b17d183bf 2002-02-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of check_fpu calls.
2002-03-04 04:14:51 +00:00
Chris Demetriou
41774c9d7b 2002-03-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen (FLOOR.L.fmt): Store correct destination register.
2002-03-04 04:06:47 +00:00
Chris Demetriou
4a0bd8769a 2002-03-03 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Remove whitespace at end of lines.
2002-03-04 03:19:49 +00:00
Chris Demetriou
09297648e2 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* mips.igen (loadstore_ea): New function to do effective
	address calculations.
	(do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
	do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
	CACHE): Use loadstore_ea to do effective address computations.
2002-03-03 07:36:42 +00:00
Chris Demetriou
043b7057fd 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
	* mips.igen (LL, CxC1, MxC1): Likewise.
2002-03-03 06:49:43 +00:00
Chris Demetriou
c1e8ada406 2002-03-02 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
        CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
        FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
        MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
        NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
        SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
        Don't split opcode fields by hand, use the opcode field values
        provided by igen.
2002-03-03 02:11:23 +00:00
Chris Demetriou
3e1dca16f2 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_divu): Fix spacing.

        * mips.igen (do_dsllv): Move to be right before DSLLV,
        to match the rest of the do_<shift> functions.
2002-03-01 23:51:18 +00:00
Chris Demetriou
fff8d27d23 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
        DSRL32, do_dsrlv): Trace inputs and results.
2002-03-01 23:40:51 +00:00
Frank Ch. Eigler
ce93e51a12 * vaporous abdication 2002-03-01 21:51:21 +00:00
Chris Demetriou
0d3e762b2f 2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (CACHE): Provide instruction-printing string.

        * interp.c (signal_exception): Comment tokens after #endif.
2002-03-01 19:55:42 +00:00
Chris Demetriou
eb5fcf9324 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
        (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
        NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
        ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
        CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
        C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
        SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
        LWC1, SWC1): Add "f" to filter, since these are FP instructions.
2002-03-01 07:53:46 +00:00
Chris Demetriou
bb22bd7d9e 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (DSRA32, DSRAV): Fix order of arguments in
        instruction-printing string.
        (LWU): Use '64' as the filter flag.
2002-03-01 07:34:57 +00:00
Chris Demetriou
91a177cf81 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (SDXC1): Fix instruction-printing string.
2002-03-01 06:40:28 +00:00
Chris Demetriou
387f484ade 2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
        filter flags "32,f".
2002-03-01 06:34:21 +00:00
Chris Demetriou
3d81f39116 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): This is a 64-bit instruction, use '64'
        as the filter flag.
2002-02-28 07:07:56 +00:00
Chris Demetriou
af5107af97 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
        add a comma) so that it more closely match the MIPS ISA
        documentation opcode partitioning.
        (PREF): Put useful names on opcode fields, and include
        instruction-printing string.
2002-02-28 07:01:14 +00:00
Chris Demetriou
ca97154034 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_u64): New function which in the future will
        check whether 64-bit instructions are usable and signal an
        exception if not.  Currently a no-op.
        (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
        DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
        DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
        LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.

        * mips.igen (check_fpu): New function which in the future will
        check whether FPU instructions are usable and signal an exception
        if not.  Currently a no-op.
        (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
        CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
        CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
        LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
        MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
        NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
        ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
        SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
2002-02-28 02:57:34 +00:00
Chris Demetriou
1c47a468ec 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_load_left, do_load_right): Move to be immediately
        following do_load.
        (do_store_left, do_store_right): Move to be immediately following
        do_store.
2002-02-27 22:46:35 +00:00
Chris Demetriou
603a98e7a1 2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (mipsV): New model name.  Also, add it to
        all instructions and functions where it is appropriate.
2002-02-27 21:52:52 +00:00
Andrew Cagney
080fe24b58 Fix PR gdb/287. From wiz at danbala. Then->than and typos. 2002-02-25 02:13:10 +00:00
Keith Seitz
b3ba81f8ee * armos.c (SWIWrite0): Use generic host_callback mechanism
for supported OS functions "open", "close", "write", etc.
	(SWIopen): Likewise.
	(SWIread): Likewise.
	(SWIwrite): Likewise.
	(SWIflen): Likewise.
	(ARMul_OSHandleSWI): Likewise.
2002-02-21 20:22:49 +00:00
Chris Demetriou
c5d00cc701 2002-02-18 Chris Demetriou <cgd@broadcom.com>
* mips.igen: For all functions and instructions, list model
        names that support that instruction one per line.
2002-02-19 08:10:44 +00:00
Chris Demetriou
074e9cb865 2002-02-11 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Add some additional comments about supported
        models, and about which instructions go where.
        (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
        order as is used in the rest of the file.
2002-02-11 23:35:07 +00:00
Chris Demetriou
9805e2294e 2002-02-11 Chris Demetriou <cgd@broadcom.com>
* mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
        indicating that ALU32_END or ALU64_END are there to check
        for overflow.
        (DADD): Likewise, but also remove previous comment about
        overflow checking.
2002-02-11 22:49:45 +00:00
Chris Demetriou
f701dad2ba 2002-02-10 Chris Demetriou <cgd@broadcom.com>
* mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
        DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
        JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
        SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
        ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
        fields (i.e., add and move commas) so that they more closely
        match the MIPS ISA documentation opcode partitioning.
2002-02-11 06:13:49 +00:00
Chris Demetriou
20ae00985d 2002-02-10 Chris Demetriou cgd@sibyte.com
* mips.igen (ADDI): Print immediate value.
        (BREAK): Print code.
        (DADDIU, DSRAV, DSRLV): Print correct instruction name.
        (SLL): Print "nop" specially, and don't run the code
        that does the shift for the "nop" case.
2002-02-11 02:19:38 +00:00
Chris Demetriou
6439295f61 2002-02-10 Chris Demetriou <cgd@broadcom.com>
* callback.c: Fix some spelling errors.
        * hw-device.h: Likewise.
        * hw-tree.c: Likewise.
        * sim-abort.c: Likewise.
        * sim-alu.h: Likewise.
        * sim-core.h: Likewise.
        * sim-events.c: Likewise.
        * sim-events.h: Likewise.
        * sim-fpu.h: Likewise.
        * sim-profile.h: Likewise.
        * sim-utils.c: Likewise.
2002-02-10 23:11:37 +00:00
Nick Clifton
72ca629fe1 Document check-in procedures 2002-02-07 09:09:13 +00:00
Nick Clifton
c17aa31873 Modify previous patch so that it is only triggered for COFF format executables. 2002-02-05 11:22:26 +00:00
Nick Clifton
25180f8aef If a v5 architecture is detected, assume it might be an XScale binary, since
there is no way to distinguish between    the two in the COFF file format.
2002-02-04 16:27:22 +00:00
Andrew Cagney
b78bd0bd68 Revert sh64 changes. Accidently committed. 2002-02-02 04:48:32 +00:00
Ben Elliston
cbb38b47b3 * Contribute Hitachi SH5 simulator. 2002-02-01 11:44:32 +00:00
Hans-Peter Nilsson
dea03d4e10 * cgen-ops.h (ADDCQI, ADDCFQI, ADDOFQI, SUBCQI, SUBCFQI, SUBOFQI):
New functions.
2002-01-31 17:55:16 +00:00
Ben Elliston
1636f0bbeb 2002-01-20 Ben Elliston <bje@redhat.com>
* sim-fpu.h (SIM_FPU_IS_QNAN): Replace "Quite" with "Quiet" in
	the comment for this enumerator.
2002-01-20 04:09:23 +00:00
Ben Elliston
b59d44decf 2002-01-14 Ben Elliston <bje@redhat.com>
* sim-fpu.h: Fix comment about sim_fpu_* constants.
2002-01-14 02:47:59 +00:00
Matthew Green
43c4bab055 * Makefile.in (tmp-igen): Pass -I $(srcdir) to igen.
* igen.c (main): Change -I to add include paths for :include:
files.
Implement -G as per sim/igen, with just gen-icache=N support.
Call load_insn_table() with the built include path.

* ld-insn.c (parse_include_entry): New. Load an :include: file.
(load_insn_table): New `includes' argument.  Look for :include:
entries and call parse_include_entry() for them.
(main): Adjust load_insn_table() call.
* ld-insn.h (model_include_fields): New enum.
(load_insn_table): Update prototype.
* table.c (struct _open_table, struct _table): Rework
structures to handle included files.
(table_push): Move the guts of table_open() here.

* table.c (struct _open table, struct table): Make table object an
indirect ptr to the current table file.
(current_line, new_table_entry, next_line): Make file arg type
open_table.
(table_open): Use table_push.
(table_entry_read): Point variable file at current table, at eof, pop
last open table.

* misc.h (NZALLOC): New macro. From sim/igen.

* table.h, table.c (table_push): New function.
2002-01-12 10:21:12 +00:00
Nick Clifton
00125dd034 Add myself as ARM sim maintainer 2002-01-10 11:15:35 +00:00
Nick Clifton
57165fb4bb Fix parameters passed to CPRead[13] and CPRead[14]. 2002-01-10 11:14:57 +00:00
Nick Clifton
86c735a526 General format tidy ups 2002-01-09 15:08:21 +00:00
Nick Clifton
272fcdcd59 Fix bug detected by GDB testsuite - when fetching registers more than 4
bytes wide return 0 for the other bytes.
2002-01-09 14:59:22 +00:00
Matthew Green
5c8844646d * bits.c (LSMASKED64): New inline function.
(LSEXTRACTED64): Likewise.
* bits.h (_LSB_POS, _LSMASKn, LSMASK64): New macros from
sim/common/sim-bits.h
(LSMASKED64, LSEXTRACTED64): New functions definitions.
* Makefile.in (sim-bits.o): Remove target.

* main.c (zalloc): Fix typo in error message.
2002-01-04 00:00:54 +00:00
Kazu Hirata
280b26c033 * run.c (usage): Fix a typo. 2001-12-21 00:47:18 +00:00
Kazu Hirata
de9b1892f5 * compile.c: Fix formatting. 2001-12-20 17:36:23 +00:00
Kazu Hirata
2ea716f649 * compile.c: Fix comment typos. 2001-12-20 16:47:52 +00:00
Andrew Cagney
3a11ea24fc Don't try to link in sim-bits.o. 2001-12-16 21:00:08 +00:00
Matthew Green
de46f45f87 * main.c: Include "defs.h", "bfd.h", "callback.h" and "remote-sim.h".
(sim_io_error): New function.
	* sim_calls.c: (sim_io_error): New function.
2001-12-15 05:08:44 +00:00
Ben Elliston
c9b2b0e016 s/cygnus.com/redhat.com/ 2001-12-15 04:51:01 +00:00
Matthew Green
d29d5195ca * support sim-fpu.c for correct FP emulation.
* Makefile.in (LIB_OBJ): Add @sim_fpu@.
	(ICACHE_CFLAGS, SEMANTICS_CFLAGS): New variables.
	(icache.o, semantics.o): Add new ICACHE_FLAGS & SEMANTICS_FLAGS.
	(sim-fpu.o, sim-bits.o, tconfig.h): New targets.
	* configure.in: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.  Add a
	check for sim/common/sim-fpu.c.  Output sim_fpu and sim_fpu_cflags.
	* configure: Regenerate.
	* device.h (device_find_integer_array_property): Match function definition.
	* gen-icache.c (print_icache_internal_function_declaration): Rename
	INLINE_ICACHE to PSIM_INLINE_ICACHE.
	* gen-idecode.c (print_idecode_run_function_header): Rename INLINE_IDECODE
	to PSIM_INLINE_IDECODE.
	* gen-semantics.c (print_semantic_function_header): Rename
	EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	* gen-support.c (print_support_function_name): Rename INLINE_SUPPORT to
	PSIM_INLINE_SUPPORT.
	* igen.c (print_function_name): Also escape `(' and `)'.
	(gen_semantics_h): Rename EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	(gen_semantics_c): Likewise.  Also output includes for "sim-fpu.h"
	* inline.h (INLINE_SIM_ENDIAN): Renamed INLINE_PSIM_ENDIAN.
	(EXTERN_SIM_ENDIAN): Renamed EXTERN_PSIM_ENDIAN.
	(STATIC_INLINE_SIM_ENDIAN): Renamed STATIC_INLINE_PSIM_ENDIAN.
	(INLINE_LOCALS): Renamed PSIM_INLINE_LOCALS.
	(EXTERN_SUPPORT): Renamed PSIM_EXTERN_SUPPORT.
	(INLINE_SUPPORT): Renamed PSIM_INLINE_SUPPORT.
	(EXTERN_SEMANTICS): Renamed PSIM_EXTERN_SEMANTICS.
	(INLINE_SEMANTICS): Renamed PSIM_INLINE_SEMANTICS.
	(EXTERN_IDECODE): Renamed PSIM_EXTERN_IDECODE.
	(INLINE_IDECODE): Renamed PSIM_INLINE_IDECODE.
	(EXTERN_ICACHE): Renamed PSIM_EXTERN_ICACHE.
	(INLINE_ICACHE): Renamed PSIM_INLINE_ICACHE.
	* options.c (options_inline): Fix names.
	* sim-endian-n.h: Change INLINE_SIM_ENDIAN to INLINE_PSIM_ENDIAN.
	* sim-endian.h: Likewise.
	* sim-main.h: New file.
	* std-config.h: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.
2001-12-14 00:22:13 +00:00
Andrew Cagney
7ef2d4e783 * Makefile.in (simops.h, table.c): Delete targets.
(tmp-gencode, gencode.o, gencode): Delete targets.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
2001-12-02 19:27:29 +00:00
Andrew Cagney
6654b4ae11 From Mark Peek.
* ppc-spr-table: Add SDA and PIR.
2001-12-01 18:56:36 +00:00
Fred Fish
9e52972e45 2001-11-17 Fred Fish <fnf@redhat.com>
* sim-main.h (float_operation): Move enum declaration outside
	of _sim_cpu struct declaration.
2001-11-18 06:00:29 +00:00
Ben Harris
6746a76a70 2001-11-16 Ben Harris <bjh21@netbsd.org>
* Makefile.in (armemu32.o): Replace $< with autoconf recommended
	$(srcdir)/....
	(armemu26.o): Ditto.
2001-11-16 18:56:01 +00:00
Andrew Cagney
bebd2b3536 when #size-cells is zero, don't expect a size. 2001-11-14 19:54:59 +00:00
Dave Brolley
378af1d671 2001-11-14 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* cpux.c: Regenerate.
	* cpux.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* decodex.c: Regenerate.
	* decodex.h: Regenerate.
	* model.c: Regenerate.
	* modelx.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
	* semx-switch.c: Regenerate.
2001-11-14 19:51:40 +00:00
Dave Brolley
3e43c635d5 2001-11-14 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* model.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
2001-11-14 19:50:01 +00:00
Andrew Cagney
560ba567a0 Chirp fixes:
* hw_htab.c (htab_map_binary): Don't try to map the text section
when it is empty.
* emul_chirp.c (map_over_chirp_note): Default load-base to -1 not
CHIRP_LOAD_BASE.
(emul_chirp_create): Map in the interrupt table.
2001-10-26 04:37:54 +00:00
Andrew Cagney
457174f645 Enable PowerPC simulator on native linux and netbsd. 2001-10-20 00:16:44 +00:00
Nick Clifton
ff44f8e352 Add support for XScale's coprocessor access check register.
Fix formatting.
2001-10-18 12:20:49 +00:00
John R. Moore
962b3eada2 Removed a section of code that didn't do anything, but left values in
memory. This was labeled as a hack to set r0/r1 with argc/argv.
2001-08-02 00:50:38 +00:00
Ben Elliston
f18ee7ef71 2001-07-31 Ben Elliston <bje@redhat.com>
* lib/sim-defs.exp (run_sim_test): Include a description such as
	"assembling" or "linking" that identifies the phase a test fails
	in, for easier analysis of failures.
2001-07-31 04:59:59 +00:00
Stephane Carrez
eefde3513e * dv-m68hc11eepr.c (m68hc11eepr_info): Fix print of current write
address.
	(m68hc11eepr_port_event): Fix detach/attach logic.
2001-07-28 19:19:05 +00:00
Stephane Carrez
00d0c012ef * Makefile.in (SIM_OBJS): Remove sim-resume.o
* interp.c (sim_resume): New function from sim-resume.c, install
	the stepping event after having processed the pending ticks.
	(has_stepped): Likewise.
	(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
2001-07-22 12:33:58 +00:00
Andrew Cagney
bf1bef8f1c Regenerate using autoconf 2.13. 2001-07-18 06:20:29 +00:00
Daniel Jacobowitz
54cfd411af Makefile.in: Add dependencies on $(CPU_H). 2001-07-16 18:36:37 +00:00
Andrew Cagney
b51c76031a * Makefile.in (gencode): Provide explicit path to gencode.c. 2001-07-10 22:46:59 +00:00
Ben Elliston
e3e473dacc 2001-07-05 Ben Elliston <bje@redhat.com>
* Make-common.in (srccgen): Remove.
	(CGEN_CPU_DIR): Define.
	(CGEN_READ_SCM): Redefine without $(srccgen).
	(CGEN_ARCH_SCM): Ditto.
	(CGEN_CPU_SCM): Ditto.
	(CGEN_DECODE_SCM): Ditto.
	(CGEN_DESC_SCM): Ditto.

	* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2001-07-05 13:51:26 +00:00
Stephane Carrez
81e09ed832 Improve HC11 simulator to support HC12 2001-05-20 15:40:27 +00:00
Stephane Carrez
11115521f6 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for
pending interrupts.
	* interrupts.c (interrupts_process): Keep track of the last number
	of masked insn cycles.
	(interrupts_initialize): Clear last number of masked insn cycles.
	(interrupts_info): Report them.
	(interrupts_update_pending): Compute clear and set masks of
	interrupts and clear the interrupt bits before setting them
	(due to SCI interrupt sharing).
	* interrupts.h (struct interrupts): New members last_mask_cycles
	and xirq_last_mask_cycles.
2001-05-20 15:36:29 +00:00
Nick Clifton
fb7a8ef0df Fix handling of XScale LDRD and STRD instructions with post indexed addressing modes. 2001-05-11 21:51:07 +00:00
Andrew Cagney
d448180670 Don't loose last block during a dma. 2001-05-10 17:48:10 +00:00
Nick Clifton
dac07255f9 Check Mode not Bank in order to determine rocesor mode. 2001-05-08 08:28:28 +00:00
Jim Blandy
ff88f59d5a *** empty log message *** 2001-05-07 06:10:25 +00:00
Jim Blandy
be5fcb106b * mn10300.igen: Doc fixes. 2001-05-07 04:52:00 +00:00
Alexandre Oliva
cc274e7c27 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
Depend on targ-vals.h.
2001-04-26 19:23:16 +00:00
Frank Ch. Eigler
2836ee25d9 * thanks, nickc
2001-04-25  Frank Ch. Eigler  <fche@redhat.com>

	* sim-load.c (sim_load_file): Put it back [...]
2001-04-25 21:14:28 +00:00
Andrew Cagney
5b77812558 Revert call to bfd_cache_close(). 2001-04-21 22:50:55 +00:00
Frank Ch. Eigler
6ec9f4a9be * bug fix
2001-04-19  Frank Ch. Eigler  <fche@redhat.com>

	* sim-utils.c (sim_analyze_program): Call bfd_cache_close after
	we're finished with its immediate use.
	* sim-load.c (sim_load_file): Ditto.
2001-04-19 20:59:30 +00:00
Matthew Green
c3ae2f98d0 * XScale coprocessor support.
2001-04-18  matthew green  <mrg@redhat.com>

	* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
	(read_cp15_reg): Make non-static.
	(XScale_cp15_LDC): Update for write_cp15_reg() change.
	(XScale_cp15_MCR): Likewise.
	(XScale_cp15_write_reg): Likewise.
	(XScale_check_memacc): New function. Check for breakpoints being
	activated by memory accesses.  Does not support the Branch Target
	Buffer.
	(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
	(XScale_debug_moe): New function. Set the debug Method Of Entry,
	if configured.
	(write_cp14_reg): Reset count counter if requested.
	* armdefs.h (struct ARMul_State): New members `LastTime' and
	`CP14R0_CCD' used for the timer/counters.
	(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
	ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
	ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
	ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
	ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
	ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
	ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
	ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
	defines for XScale registers.
	(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
	(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
	(ARMul_Emulate32): Handle the clock counter and hardware instruction
	breakpoints.  Call XScale_set_fsr_far() for software breakpoints and
	software interrupts.
	(LoadMult): Call XScale_set_fsr_far() for data aborts.
	(LoadSMult): Likewise.
	(StoreMult): Likewise.
	(StoreSMult): Likewise.
	* armemu.h (write_cp15_reg): Update prototype.
	* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
	(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
	register 0.
	* armvirt.c (GetWord): Call XScale_check_memacc().
	(PutWord): Likewise.
2001-04-18 16:39:37 +00:00
J.T. Conklin
d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Jim Blandy
c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
Nick Clifton
3cf84db9ef Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
Frank Ch. Eigler
764f1408a3 * mmap support for common simulators
2001-03-16  Frank Ch. Eigler  <fche@redhat.com>

	Add support for mmap-based memory regions.
	* sim-memopt.c (mmap_next_fd): New global.
	(sim_memory_init): Reinitialize it.
	(OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
	"--memory-mapfile FILE" option.  Check for some errors.
	(do_memopt_add): Conditionally do mmap instead of malloc for
	backing store of simulated memory.  Check for more errors.
	(do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
	* sim-memopt.h (munmap_length): New member of _sim_memopt.
	* configure.in: Look for mmap/fstat related functions and headers.
	* config.in, configure: Regenerated.
2001-03-20 17:13:39 +00:00
Frank Ch. Eigler
35c209920b * tweak
2001-03-15  Frank Ch. Eigler  <fche@redhat.com>

	* sim-core.c (sim_core_map_attach): Correct overlap-related
	error messages.
2001-03-16 03:20:26 +00:00
Andrew Cagney
1e6cd1593b Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
Michael Meissner
f6bb7a3bb0 Remove reference to alloca-conf.h 2001-03-07 20:19:41 +00:00
Nick Clifton
4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Andrew Cagney
c663138840 Fixes for NetBSD 1.5. NetBSD has been renumbering/renaming its
SYS_* interfaces.
2001-03-05 16:22:45 +00:00
Dave Brolley
55552082e8 2001-03-05 Dave Brolley <brolley
arch.c: Regenerate.
        arch.h: Regenerate.
        cpu.c: Regenerate.
        cpu.h: Regenerate.
        cpuall.h: Regenerate.
        cpux.c: Regenerate.
        cpux.h: Regenerate.
        decode.c: Regenerate.
        decode.h: Regenerate.
        decodex.c: Regenerate.
        decodex.h: Regenerate.
        model.c: Regenerate.
        modelx.c: Regenerate.
        sem-switch.c: Regenerate.
        sem.c: Regenerate.
        semx-switch.c: Regenerate.
2001-03-05 16:05:38 +00:00
Dave Brolley
52fa932eab 2001-03-05 Dave Brolley <brolley@
* arch.c: Regenerate.
        * arch.h: Regenerate.
        * cpu.c: Regenerate.
        * cpu.h: Regenerate.
        * cpuall.h: Regenerate.
        * decode.c: Regenerate.
        * decode.h: Regenerate.
        * model.c: Regenerate.
        * sem-switch.c: Regenerate.
        * sem.c: Regenerate.
2001-03-05 16:00:17 +00:00
Nick Clifton
917bca4f21 Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines.  (Alignment checking code has not yet been
contributed).
2001-02-28 01:04:24 +00:00
Ben Elliston
fb891446b7 2001-02-23 Ben Elliston <bje@redhat.com>
* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
	already defined elsewhere.
2001-02-24 02:43:11 +00:00
Ben Elliston
01816cd804 2001-02-22 Ben Elliston <bje@redhat.com>
* sim-trace.h (TRACE_VPU_IDX): Add.
	(TRACE_vpu): Define.
	(WITH_TRACE_VPU_P): Likewise.
	(TRACE_VPU_P): Likewise.
	* sim-trace.c (OPTION_TRACE_VPU): Define.
	(trace_options): Add --trace-vpu.
	(trace_option_handler): Handle OPTION_TRACE_VPU.
	(trace_option_handler): Include VPU tracing in --trace-semantics.
	(trace_idx_to_str): Handle TRACE_VPU_IDX.
2001-02-22 20:47:49 +00:00
Ben Elliston
44a9331cdf 2001-02-21 Ben Elliston <bje@redhat.com>
* sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
	(TRACE_BRANCH_INPUT2): Likewise.
2001-02-21 21:35:41 +00:00
Ben Elliston
8030f85769 2001-02-19 Ben Elliston <bje@redhat.com>
* sim-main.h (sim_monitor): Return an int.
	* interp.c (sim_monitor): Add return values.
	(signal_exception): Handle error conditions from sim_monitor.
2001-02-19 21:57:03 +00:00
Nick Clifton
2ef048fc9f Remove Prefetch abort for breakpoints. Instead set the state to RESUME. 2001-02-16 22:04:22 +00:00
Ben Elliston
9afc4bbfbb 2001-02-16 Ben Elliston <bje@redhat.com>
* MAINTAINERS: Add myself for common portions.
2001-02-15 23:03:41 +00:00
Ben Elliston
c43ad8eb1e * profiling bug fixes.
2001-02-09  Ben Elliston  <bje@redhat.com>

	* (profile_print_pc): Write header out in target byte order.

2001-02-09  Ben Elliston  <bje@redhat.com>

	* sim-profile.c (profile_pc_init): Correct bug in loop logic when
	adjusting the pc shift value.
2001-02-15 21:14:40 +00:00
Nick Clifton
44e23e575b Add code to preserve processor mode when a prefetch
abort is signalled after processing a breakpoint.
2001-02-15 02:38:15 +00:00
Nick Clifton
5f7d0a33db Reset processor into ARM mode for any machine type except the early ARMs. 2001-02-14 22:21:20 +00:00
Nick Clifton
94ab9d7b9e remove spurious whitespace 2001-02-14 03:55:57 +00:00
Nick Clifton
1e5d4e465c Prevent Aborts from happening whilst emulating a SWI 2001-02-14 03:50:46 +00:00
Nick Clifton
179ae6ea64 Fix definition of NEGBRANCH 2001-02-12 23:29:49 +00:00
Chris Demetriou
56b48a7a9b 2001-02-08 Ben Elliston <bje@redhat.com>
* sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        (store_memory): Likewise, pass cia to sim_core_write*.
2001-02-08 05:22:04 +00:00
DJ Delorie
ddcd33c11d * i960-desc.c: Update all the A macro definitions to the new
stdc-sensitive versions that cgen would have used.
2001-02-07 01:16:05 +00:00
Nick Clifton
fae0bf59e6 Add parentheses ready for future conbtribution 2001-02-01 20:56:35 +00:00
Nick Clifton
dda308f5fd Update base address register after restoring register bank. 2001-02-01 20:39:51 +00:00
Jonathan Larmour
42acc51e30 * Makefile.in (gencode): Link with libopcodes in build tree rather
than building source files from there.
2001-02-01 06:56:29 +00:00
Nick Clifton
88694af3f9 Detect installation of SWI vector by running program as well as loading program. 2001-02-01 00:14:40 +00:00
Alexandre Oliva
de0492b6fb * interp.c (sim_create_inferior): Record program arguments for
later inspection by the trap handler.
(count_argc): New function.
(prog_argv): Declare static.
(sim_write): Declare.
(trap): Implement argc, argnlen and argn system calls. Do not
abort on unknown system calls--simply return -1.
* syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
2001-01-30 23:03:56 +00:00
Alexandre Oliva
554064594b * interp.c (trap): Implement time. 2001-01-24 13:17:01 +00:00
Geoffrey Keating
428e1889bc * emul_netbsd.c (do_open): Translate the flag parameter to the
open syscall to the numbers supported by the host.
2001-01-15 23:24:30 +00:00
Chris Demetriou
0b8c7076b5 * MAINTAINERS: Added self and Andrew for the mips sim. 2001-01-15 19:16:57 +00:00
Ben Elliston
badd2b1e70 * Tidy. 2001-01-15 00:23:00 +00:00
Frank Ch. Eigler
9397fcbf1c * configury fix
[common/ChangeLog]
2001-01-12  Chris Demetriou  <cgd@sibyte.com>

	* aclocal.m4 (SIM_AC_OPTION_SCACHE): Properly
	handle the case where a numeric value is supplied.

[eg. m32r/ChangeLog]
2001-01-12  Frank Ch. Eigler  <fche@redhat.com>

	* configure: Regenerated with sim_scache fix.
2001-01-12 18:51:28 +00:00
Ben Elliston
63fe103861 2001-01-06 Ben Elliston <bje@redhat.com>
* cgen.sh: Allow extrafiles to include the semantics files when
	generating an ISA-specific decoder.
2001-01-05 04:36:09 +00:00
Alexandre Oliva
b6f6b44d62 * Make-common.in (sim-io.o): Depend on targ-vals.h. 2000-12-27 17:47:20 +00:00
Ben Elliston
ad8707b58d 2000-12-23 Ben Elliston <bje@redhat.com>
* cgen-trace.c (trace_result): Handle 'f' type operands; output
	them to the trace stream using sim_fpu_printn_fpu. Include
	"sim-fpu.h".
2000-12-23 21:52:14 +00:00
Ben Elliston
b94c096644 2000-12-15 Ben Elliston <bje@redhat.com>
* sim-fpu.h (sim_fpu_printn_fpu): Declare.
	* sim-fpu.c (print_bits): Add digits parameter. Print only as many
	trailing digits as specified (-1 to print all digits).
	(sim_fpu_print_fpu): New wrapper around sim_fpu_printn_fpu.
	(sim_fpu_printn_fpu): Rename from sim_fpu_print_fpu; update calls
	to print_bits ().
2000-12-23 11:51:04 +00:00
Nick Clifton
ac1c9d3aad Fix test for StoreDouble Instruction. 2000-12-19 00:58:04 +00:00
Ben Elliston
fd5d712edf 2000-12-13 Ben Elliston <bje@redhat.com>
* cgen.sh: Set prefix/PREFIX (append ISA if applicable). Factor
	sed expressions into $sedscript, substituting @prefix@/@PREFIX@.
	(defs): New action.
2000-12-13 22:55:54 +00:00
Geoffrey Keating
4c15ccf7af In sim/common:
* sim-endian.h: Don't have parameters on macro definitions which
	are simply renaming functions, to permit use of XCONCAT2 in both
	the macro name and the arguments in a use of such a definition.
In sim/ppc:
	* sim-endian.h: Don't have parameters on macro definitions which
	are simply renaming functions, to permit use of XCONCAT2 in both
	the macro name and the arguments in a use of such a definition.
2000-12-12 20:54:13 +00:00
Ben Elliston
0d277f51d0 2000-12-11 Ben Elliston <bje@redhat.com>
* cgen-ops.h (SUBWORDDFDI): New function.
2000-12-11 07:14:34 +00:00
Nick Clifton
9a6b6a66b7 Add 0x91 as an FPE SWI. 2000-12-11 03:08:17 +00:00
Michael Chastain
7c721b2a2a 2000-11-15 Jim Blandy <jimb@redhat.com>
* sim_calls.c: Doc fix.
	(sim_fetch_register, sim_store_register): Call
	gdbarch_register_name directly, instead of going through
	REGISTER_NAME macro.
2000-12-08 01:52:41 +00:00
Nick Clifton
df38a86eec oops - remove redundant prototype introduced in previous delta 2000-12-08 01:39:48 +00:00
Nick Clifton
760a7bbec5 Add emulation of double word load and store instructions. 2000-12-08 01:38:47 +00:00
Ben Elliston
c79688eb6e 2000-12-05 Ben Elliston <bje@redhat.com>
* Make-common.in (cgen-defs): New target.
	(cgen-decode): Pass $(EXTRAFILES).
2000-12-05 00:56:44 +00:00
Ben Elliston
bb4e03e555 2000-12-05 Ben Elliston <bje@redhat.com>
* genmloop.sh: Use @prefix@, not @cpu@ throughout. Add -prefix and
	-outfile-suffix options.
2000-12-05 00:46:04 +00:00
Ben Elliston
6227bc851d 2000-12-04 Ben Elliston <bje@redhat.com>
* cgen-ops.h (SUBWORDSIQI): Mask off top bits.
	(SUBWORDSIUQI): Likewise.
	(SUBWORDDIHI): Likewise.
	(SUBWORDDIQI): New function.
2000-12-04 04:05:45 +00:00
Ben Elliston
76440e4ba0 2000-12-04 Ben Elliston <bje@redhat.com>
* cgen-trace.c (disassemble_insn): Remove unused declaration.
	* cgen-scache.c (scache_option_handler): Remove unused local var.
2000-12-04 00:57:57 +00:00