Jeff Law
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c9f649022e
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* mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
branchs relaxable.
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1997-01-29 16:40:15 +00:00 |
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Jeff Law
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e098bae8e7
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* mn10200-opc.c (mn10200_operands): Add SIMM16N.
(mn10200_opcodes): Use it for some logicals and btst insns.
Add "break" and "trap" instructions.
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1996-12-18 17:12:16 +00:00 |
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Jeff Law
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d21f1eae7d
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* mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
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1996-12-16 20:05:07 +00:00 |
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Jeff Law
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c6b62ad1d7
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* mn10200-dis.c: Finish writing disassembler.
* mn10200-opc.c (mn10200_opcodes): Fix mask for "mov imm8,dn".
Fix mask for "jmp (an)".
mn10200 disassembler works!
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1996-12-12 08:09:27 +00:00 |
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Jeff Law
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532700fc31
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* mn10200-opc.c (mn10200_opcodes): Fix operands for "movb dm,(an)".
Yoshihiro Adachi sez the manual was wrong for this insn.
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1996-12-11 16:29:02 +00:00 |
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Jeff Law
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7bfc95d917
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* mn10200-opc.c (mn10200_opcodes): "mov imm8,d0" is a format 2
instruction. Fix opcode field for "movb (imm24),dn".
Stuff found by the testsuite.
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1996-12-10 20:34:14 +00:00 |
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Jeff Law
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0888b4a38a
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* mn10200-opc.c (mn10200_operands): Fix insertion position
for DI operand.
Found by gas testsuite.
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1996-12-10 19:13:07 +00:00 |
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Jeff Law
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781766e7e1
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* mn10200-opc.c: Create mn10200 opcode table.
* mn10200-dis.c: Flesh out mn10200 disassembler. Not ready,
but moving along nicely.
Checkpointing today's mn10200 work.
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1996-12-09 23:48:15 +00:00 |
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Jeff Law
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ae1b99e42d
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Grrr. The mn10200 and mn10300 are _not_ similar enough to easily support
with a single generic configuration. So break them up into two different
configurations. See the individual ChangeLogs for additional detail.
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1996-10-03 16:42:22 +00:00 |
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