darling-gdb/sim/mips
1997-12-29 16:03:23 +00:00
..
.Sanitize Move MDMX instructions which are public knowledge from vr5400.igen 1997-11-26 11:47:36 +00:00
ChangeLog * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c). 1997-12-29 16:03:23 +00:00
config.in Get configure to define RETSIGTYPE 1997-04-07 05:58:59 +00:00
configure * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or 1997-12-12 19:24:34 +00:00
configure.in * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or 1997-12-12 19:24:34 +00:00
gencode.c * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
interp.c * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c). 1997-12-29 16:03:23 +00:00
m16.igen Separate r5900 specifoc and mips16 instructions. 1997-10-27 07:55:24 +00:00
Makefile.in IGEN likes to cache the current instruction address (CIA). Change the 1997-11-06 09:16:16 +00:00
mdmx.igen Fix typo in format argument to sim_io_eprintf. 1997-11-26 12:07:27 +00:00
mips.dc MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
mips.igen * mips.igen (MSUB): Fix to work like MADD. 1997-12-11 00:11:04 +00:00
README.Cygnus Initial check-in of the MIPS simulator. Work still needs to be done on 1995-11-08 15:44:38 +00:00
sim-main.h o Add SIM_SIGFPE to sim-signals 1997-11-20 09:50:36 +00:00
tconfig.in * Makefile.in: Delete stuff moved to ../common/Make-common.in. 1996-11-20 10:00:42 +00:00
vr5400.igen For MADD et.al. instructions sign extend 32 bit result assigned to a 1997-12-13 04:23:31 +00:00

> README.Cygnus
-------------------------------------------------------------------------------

The following are the main reasons for constructing the simulator as a
generator:

1) Avoid large fixed decode source file, with lots of #ifs controlling
   the compilation. i.e. keep the source cleaner, smaller and easier
   to parse.

2) Allow optimum code to be created, without run-time checks on
   instruction types. Ensure that the simulator engine only includes
   code for the architecture being targetted. e.g. This avoids
   run-time checks on ISA conformance, aswell as increasing
   throughput.

3) Allow updates to the instruction sets to be added quickly. Having a
   table means that the information is together, and is easier to
   manipulate. Having the table generate the engine, rather than the
   run-time parse the table gives higher performance at simulation
   time.

4) Keep all the similar simulation code together. i.e. have a single
   place where, for example, the addition code is held. This ensures that
   updates to the simulation are not spread over a large flat source
   file maintained by the developer.

-------------------------------------------------------------------------------

To keep the simulator simple (and to avoid the slight chance of
mis-matched files) the manifests describing an engine, and the
simulator engine itself, are held in the same source file.

This means that the engine must be included twice, with the first pass
controlled by the SIM_MANIFESTS definition.

-------------------------------------------------------------------------------
> EOF README.Cygnus