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3d171c85e7
* i386-nto-tdep.c (i386_nto_target): Move variable. Add comment. (i386nto_gregset_reg_offset): Rename frame regmap. (nto_reg_offset): Tweak comment. Use ARRAY_SIZE. (i386nto_supply_gregset): Implement using register set support. (i386nto_supply_regset): Remove redundant comment. (i386nto_init_abi): Initialize TDEP->gregset_reg_offset, TDEP->gregset_num_regs and TDEP->sizeof_gregset. * nto-tdep.c (fetch_core_registers): Remove function. (regset_core_fns): Remove structure. (_initialize_nto_tdep): Don't call deprecated_add_core_fns.
304 lines
7.8 KiB
C
304 lines
7.8 KiB
C
/* Target-dependent code for QNX Neutrino x86.
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Copyright 2003, 2004 Free Software Foundation, Inc.
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Contributed by QNX Software Systems Ltd.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "osabi.h"
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#include "regcache.h"
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#include "target.h"
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#include "gdb_assert.h"
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#include "gdb_string.h"
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#include "i386-tdep.h"
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#include "i387-tdep.h"
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#include "nto-tdep.h"
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#include "solib-svr4.h"
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/* Target vector for QNX NTO x86. */
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static struct nto_target_ops i386_nto_target;
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#ifndef X86_CPU_FXSR
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#define X86_CPU_FXSR (1L << 12)
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#endif
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/* Why 13? Look in our /usr/include/x86/context.h header at the
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x86_cpu_registers structure and you'll see an 'exx' junk register
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that is just filler. Don't ask me, ask the kernel guys. */
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#define NUM_GPREGS 13
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/* Mapping between the general-purpose registers in `struct xxx'
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format and GDB's register cache layout. */
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/* From <x86/context.h>. */
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static int i386nto_gregset_reg_offset[] =
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{
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7 * 4, /* %eax */
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6 * 4, /* %ecx */
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5 * 4, /* %edx */
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4 * 4, /* %ebx */
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11 * 4, /* %esp */
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2 * 4, /* %epb */
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1 * 4, /* %esi */
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0 * 4, /* %edi */
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8 * 4, /* %eip */
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10 * 4, /* %eflags */
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9 * 4, /* %cs */
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12 * 4, /* %ss */
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-1 /* filler */
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};
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/* Given a GDB register number REGNUM, return the offset into
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Neutrino's register structure or -1 if the register is unknown. */
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static int
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nto_reg_offset (int regnum)
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{
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if (regnum >= 0 && regnum < ARRAY_SIZE (i386nto_gregset_reg_offset))
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return i386nto_gregset_reg_offset[regnum];
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return -1;
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}
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static void
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i386nto_supply_gregset (char *gpregs)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
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if(tdep->gregset == NULL)
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tdep->gregset = regset_alloc (current_gdbarch, i386_supply_gregset,
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i386_collect_gregset);
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gdb_assert (tdep->gregset_reg_offset == i386nto_gregset_reg_offset);
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tdep->gregset->supply_regset (tdep->gregset, current_regcache, -1,
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gpregs, NUM_GPREGS * 4);
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}
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static void
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i386nto_supply_fpregset (char *fpregs)
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{
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if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
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i387_supply_fxsave (current_regcache, -1, fpregs);
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else
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i387_supply_fsave (current_regcache, -1, fpregs);
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}
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static void
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i386nto_supply_regset (int regset, char *data)
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{
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switch (regset)
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{
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case NTO_REG_GENERAL:
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i386nto_supply_gregset (data);
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break;
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case NTO_REG_FLOAT:
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i386nto_supply_fpregset (data);
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break;
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}
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}
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static int
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i386nto_regset_id (int regno)
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{
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if (regno == -1)
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return NTO_REG_END;
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else if (regno < I386_NUM_GREGS)
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return NTO_REG_GENERAL;
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else if (regno < I386_NUM_GREGS + I386_NUM_FREGS)
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return NTO_REG_FLOAT;
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return -1; /* Error. */
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}
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static int
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i386nto_register_area (int regno, int regset, unsigned *off)
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{
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int len;
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*off = 0;
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if (regset == NTO_REG_GENERAL)
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{
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if (regno == -1)
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return NUM_GPREGS * 4;
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*off = nto_reg_offset (regno);
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if (*off == -1)
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return 0;
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return 4;
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}
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else if (regset == NTO_REG_FLOAT)
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{
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unsigned off_adjust, regsize, regset_size;
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if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
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{
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off_adjust = 32;
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regsize = 16;
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regset_size = 512;
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}
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else
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{
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off_adjust = 28;
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regsize = 10;
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regset_size = 128;
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}
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if (regno == -1)
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return regset_size;
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*off = (regno - FP0_REGNUM) * regsize + off_adjust;
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return 10;
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/* Why 10 instead of regsize? GDB only stores 10 bytes per FP
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register so if we're sending a register back to the target,
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we only want pdebug to write 10 bytes so as not to clobber
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the reserved 6 bytes in the fxsave structure. */
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}
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return -1;
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}
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static int
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i386nto_regset_fill (int regset, char *data)
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{
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if (regset == NTO_REG_GENERAL)
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{
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int regno;
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for (regno = 0; regno < NUM_GPREGS; regno++)
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{
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int offset = nto_reg_offset (regno);
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if (offset != -1)
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regcache_raw_collect (current_regcache, regno, data + offset);
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}
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}
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else if (regset == NTO_REG_FLOAT)
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{
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if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
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i387_fill_fxsave (data, -1);
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else
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i387_fill_fsave (data, -1);
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}
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else
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return -1;
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return 0;
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}
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/* Return whether the frame preceding NEXT_FRAME corresponds to a QNX
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Neutrino sigtramp routine. */
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static int
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i386nto_sigtramp_p (struct frame_info *next_frame)
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{
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CORE_ADDR pc = frame_pc_unwind (next_frame);
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char *name;
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find_pc_partial_function (pc, &name, NULL, NULL);
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return name && strcmp ("__signalstub", name) == 0;
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}
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#define I386_NTO_SIGCONTEXT_OFFSET 136
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/* Assuming NEXT_FRAME is a frame following a QNX Neutrino sigtramp
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routine, return the address of the associated sigcontext structure. */
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static CORE_ADDR
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i386nto_sigcontext_addr (struct frame_info *next_frame)
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{
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char buf[4];
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CORE_ADDR sp;
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frame_unwind_register (next_frame, I386_ESP_REGNUM, buf);
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sp = extract_unsigned_integer (buf, 4);
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return sp + I386_NTO_SIGCONTEXT_OFFSET;
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}
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static void
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init_i386nto_ops (void)
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{
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i386_nto_target.regset_id = i386nto_regset_id;
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i386_nto_target.supply_gregset = i386nto_supply_gregset;
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i386_nto_target.supply_fpregset = i386nto_supply_fpregset;
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i386_nto_target.supply_altregset = nto_dummy_supply_regset;
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i386_nto_target.supply_regset = i386nto_supply_regset;
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i386_nto_target.register_area = i386nto_register_area;
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i386_nto_target.regset_fill = i386nto_regset_fill;
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i386_nto_target.fetch_link_map_offsets =
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svr4_ilp32_fetch_link_map_offsets;
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}
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static void
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i386nto_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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/* Deal with our strange signals. */
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nto_initialize_signals ();
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/* NTO uses ELF. */
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i386_elf_init_abi (info, gdbarch);
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/* Neutrino rewinds to look more normal. Need to override the i386
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default which is [unfortunately] to decrement the PC. */
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set_gdbarch_decr_pc_after_break (gdbarch, 0);
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/* NTO has shared libraries. */
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set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
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tdep->gregset_reg_offset = i386nto_gregset_reg_offset;
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tdep->gregset_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
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tdep->sizeof_gregset = NUM_GPREGS * 4;
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tdep->sigtramp_p = i386nto_sigtramp_p;
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tdep->sigcontext_addr = i386nto_sigcontext_addr;
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tdep->sc_pc_offset = 56;
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tdep->sc_sp_offset = 68;
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/* Setjmp()'s return PC saved in EDX (5). */
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tdep->jb_pc_offset = 20; /* 5x32 bit ints in. */
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_ilp32_fetch_link_map_offsets);
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/* Our loader handles solib relocations slightly differently than svr4. */
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TARGET_SO_RELOCATE_SECTION_ADDRESSES = nto_relocate_section_addresses;
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/* Supply a nice function to find our solibs. */
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TARGET_SO_FIND_AND_OPEN_SOLIB = nto_find_and_open_solib;
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/* Our linker code is in libc. */
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TARGET_SO_IN_DYNSYM_RESOLVE_CODE = nto_in_dynsym_resolve_code;
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nto_set_target (&i386_nto_target);
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}
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void
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_initialize_i386nto_tdep (void)
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{
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init_i386nto_ops ();
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gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_QNXNTO,
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i386nto_init_abi);
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gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
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nto_elf_osabi_sniffer);
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}
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