mirror of
https://github.com/darlinghq/darling-gdb.git
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63807e1d0d
PR build/9877:
* alpha-linux-tdep.c (alpha_linux_regset_from_core_section): Make
it static.
* alpha-osf1-tdep.c (_initialize_alpha_osf1_tdep): Declare.
* amd64fbsd-tdep.c (amd64fbsd_init_abi): Make it static.
* amd64nbsd-tdep.c (_initialize_amd64nbsd_ndep): Rename to ...
(_initialize_amd64nbsd_tdep): ... this.
* arm-linux-tdep.c (arm_linux_software_single_step): Make it static.
(_initialize_arm_linux_tdep): Declare.
* armbsd-tdep.c (armbsd_fpreg_offset): Make it static.
* armnbsd-tdep.c (_initialize_arm_netbsd_tdep): Declare.
* armobsd-tdep.c (_initialize_armobsd_tdep): Declare.
* avr-tdep.c (avr_return_value): Make it static.
(avr_frame_unwind_cache): Ditto.
* bsd-uthread.c (bsd_uthread_inferior_created): Ditto.
(bsd_uthread_solib_loaded): Ditto.
(bsd_uthread_solib_unloaded): Ditto.
(bsd_uthread_target): Ditto.
(_initialize_bsd_uthread): Declare.
* cris-tdep.c (crisv32_single_step_through_delay): Make it static.
(cris_frame_unwind_cache): Ditto.
* frv-tdep.c (frv_return_value): Ditto.
* h8300-tdep.c (h8300_use_struct_convention): Ditto.
(h8300h_use_struct_convention): Ditto.
* hppa-tdep.c (hppa_sign_extend, hppa_low_hppa_sign_extend):
Ditto.
* hppa-tdep.h (hppa_low_sign_extend, hppa_sign_extend): Delete
declarations.
* hppabsd-tdep.c: Include hppabsd-tdep.h.
(hppabsd_find_global_pointer): Make it static.
* hppabsd-tdep.h: New.
* hppanbsd-tdep.c: Include hppabsd-tdep.h.
(hppabsd_init_abi): Remove declaration.
(_initialize_hppabsd_tdep): Remove declaration.
(_initialize_hppanbsd_tdep): Declare.
* hppaobsd-tdep.c: Include hppabsd-tdep.h.
(hppabsd_init_abi): Delete declaration.
(hppaobsd_init_abi): Make it static.
* i386-nto-tdep.c (_initialize_i386nto_tdep): Declare.
* i386nbsd-tdep.c (_initialize_i386nbsd_tdep): Declare.
* ia64-linux-tdep.c (_initialize_ia64_linux_tdep): Declare.
* ia64-tdep.c (ia64_register_reggroup_p): Make it static.
* iq2000-tdep.c (_initialize_iq2000_tdep): Declare.
* m32c-tdep.c (m32c_register_reggroup_p): Make it static.
(m32c_analyze_prologue, m32c_virtual_frame_pointer): Ditto.
(_initialize_m32c_tdep): Declare.
* m32r-rom.c (_initialize_m32r_rom): Declare.
* m32r-tdep.c (m32r_skip_prologue): Make it static.
(m32r_return_value): Ditto.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache): Make it static.
(m68hc11_return_value): Ditto.
* m68klinux-tdep.c (_initialize_m68k_linux_tdep): Declare.
* m88k-tdep.c (m88k_frame_cache): Make it static.
* mep-tdep.c (mep_gdb_print_insn): Ditto.
(mep_return_value): Ditto.
(_initialize_mep_tdep): Declare.
* mips-irix-tdep.c (_initialize_mips_irix_tdep): Declare.
* mips-linux-tdep.c (supply_64bit_reg): Make it static.
(mips_linux_syscall_next_pc): Ditto.
(_initialize_mips_linux_tdep): Declare.
* mips-tdep.c (mips_single_step_through_delay): Make it static.
* mipsnbsd-tdep.c (_initialize_mipsnbsd_tdep): Declare.
* mn10300-linux-tdep.c (_initialize_mn10300_linux_tdep): Declare.
* mn10300-tdep.c (_initialize_mn10300_tdep): Declare.
* mt-tdep.c (_initialize_mt_tdep): Declare.
* nbsd-tdep.c: Include nbsd-tdep.h.
* nto-tdep.c (find_load_phdr): Make it static.
(_initialize_nto_tdep): Declare.
* ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Make it
static.
(_initialize_ppc_linux_tdep): Declare.
* remote-m32r-sdi.c (m32r_can_use_hw_watchpoint)
(m32r_insert_watchpoint, m32r_remove_watchpoint)
(m32r_stopped_data_address, m32r_stopped_by_watchpoint): Make
static.
* rs6000-aix-tdep.c (_initialize_rs6000_aix_tdep): Declare.
* rs6000-nat.c: Include xcoffread.h.
(find_toc_address): Don't extern declare get_toc_offset. Adjust
to call xcoff_get_to_offset.
* rs6000-tdep.c (ppc_vsx_support_p, ppc_displaced_step_fixup)
(rs6000_skip_main_prologue, rs6000_in_solib_return_trampoline)
(rs6000_skip_trampoline_code): Make static.
* s390-tdep.c (s390_regset_from_core_section): Ditto.
* sh-tdep.c (sh_register_reggroup_p): Ditto.
* shnbsd-tdep.c (shnbsd_regset_from_core_section): Ditto.
(_initialize_shnbsd_tdep): Declare.
* solib-frv.c (displacement_from_map): Make static.
(_initialize_frv_solib): Declare.
* solib-irix.c (fetch_lm_info): Make static.
(_initialize_irix_solib): Declare.
* solib-som.c: Include solib-som.h.
(som_solib_select): Line break.
* sparc-tdep.c (sparc_regset_from_core_section): Make static.
* sparcnbsd-tdep.c (_initialize_sparnbsd_tdep): Rename to ...
(_initialize_sparcnbsd_tdep): ... this.
* spu-tdep.c (spu_software_single_step): Make it static.
(_initialize_spu_tdep): Declare.
* vax-tdep.c (vax_frame_cache): Make it static.
* xcoffread.c: Include xcoffread.h.
(get_toc_offset): Rename to ...
(xcoff_get_toc_offset): ... this.
(_initialize_xcoffread): Declare.
* xcoffread.h: New.
* xtensa-linux-tdep.c (_initialize_xtensa_linux_tdep): Declare.
* xtensa-tdep.c (xtensa_skip_prologue, xtensa_derive_tdep): Make
static.
(_initialize_xtensa_tdep): Declare.
1554 lines
46 KiB
C
1554 lines
46 KiB
C
/* Target-dependent code for Motorola 68HC11 & 68HC12
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
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Free Software Foundation, Inc.
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Contributed by Stephane Carrez, stcarrez@nerim.fr
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "dwarf2-frame.h"
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#include "trad-frame.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include "value.h"
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#include "inferior.h"
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#include "dis-asm.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "arch-utils.h"
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#include "regcache.h"
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#include "reggroups.h"
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#include "target.h"
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#include "opcode/m68hc11.h"
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#include "elf/m68hc11.h"
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#include "elf-bfd.h"
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/* Macros for setting and testing a bit in a minimal symbol.
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For 68HC11/68HC12 we have two flags that tell which return
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type the function is using. This is used for prologue and frame
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analysis to compute correct stack frame layout.
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The MSB of the minimal symbol's "info" field is used for this purpose.
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MSYMBOL_SET_RTC Actually sets the "RTC" bit.
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MSYMBOL_SET_RTI Actually sets the "RTI" bit.
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MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
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MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */
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#define MSYMBOL_SET_RTC(msym) \
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MSYMBOL_TARGET_FLAG_1 (msym) = 1
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#define MSYMBOL_SET_RTI(msym) \
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MSYMBOL_TARGET_FLAG_2 (msym) = 1
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#define MSYMBOL_IS_RTC(msym) \
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MSYMBOL_TARGET_FLAG_1 (msym)
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#define MSYMBOL_IS_RTI(msym) \
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MSYMBOL_TARGET_FLAG_2 (msym)
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enum insn_return_kind {
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RETURN_RTS,
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RETURN_RTC,
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RETURN_RTI
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};
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/* Register numbers of various important registers. */
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#define HARD_X_REGNUM 0
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#define HARD_D_REGNUM 1
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#define HARD_Y_REGNUM 2
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#define HARD_SP_REGNUM 3
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#define HARD_PC_REGNUM 4
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#define HARD_A_REGNUM 5
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#define HARD_B_REGNUM 6
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#define HARD_CCR_REGNUM 7
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/* 68HC12 page number register.
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Note: to keep a compatibility with gcc register naming, we must
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not have to rename FP and other soft registers. The page register
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is a real hard register and must therefore be counted by gdbarch_num_regs.
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For this it has the same number as Z register (which is not used). */
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#define HARD_PAGE_REGNUM 8
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#define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
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/* Z is replaced by X or Y by gcc during machine reorg.
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??? There is no way to get it and even know whether
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it's in X or Y or in ZS. */
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#define SOFT_Z_REGNUM 8
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/* Soft registers. These registers are special. There are treated
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like normal hard registers by gcc and gdb (ie, within dwarf2 info).
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They are physically located in memory. */
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#define SOFT_FP_REGNUM 9
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#define SOFT_TMP_REGNUM 10
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#define SOFT_ZS_REGNUM 11
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#define SOFT_XY_REGNUM 12
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#define SOFT_UNUSED_REGNUM 13
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#define SOFT_D1_REGNUM 14
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#define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
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#define M68HC11_MAX_SOFT_REGS 32
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#define M68HC11_NUM_REGS (8)
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#define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
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#define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
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#define M68HC11_REG_SIZE (2)
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#define M68HC12_NUM_REGS (9)
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#define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
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#define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
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struct insn_sequence;
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struct gdbarch_tdep
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{
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/* Stack pointer correction value. For 68hc11, the stack pointer points
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to the next push location. An offset of 1 must be applied to obtain
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the address where the last value is saved. For 68hc12, the stack
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pointer points to the last value pushed. No offset is necessary. */
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int stack_correction;
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/* Description of instructions in the prologue. */
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struct insn_sequence *prologue;
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/* True if the page memory bank register is available
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and must be used. */
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int use_page_register;
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/* ELF flags for ABI. */
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int elf_flags;
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};
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#define STACK_CORRECTION(gdbarch) (gdbarch_tdep (gdbarch)->stack_correction)
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#define USE_PAGE_REGISTER(gdbarch) (gdbarch_tdep (gdbarch)->use_page_register)
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struct m68hc11_unwind_cache
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{
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/* The previous frame's inner most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR prev_sp;
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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CORE_ADDR pc;
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int size;
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int prologue_type;
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CORE_ADDR return_pc;
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CORE_ADDR sp_offset;
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int frameless;
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enum insn_return_kind return_kind;
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/* Table indicating the location of each and every register. */
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struct trad_frame_saved_reg *saved_regs;
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};
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/* Table of registers for 68HC11. This includes the hard registers
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and the soft registers used by GCC. */
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static char *
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m68hc11_register_names[] =
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{
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"x", "d", "y", "sp", "pc", "a", "b",
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"ccr", "page", "frame","tmp", "zs", "xy", 0,
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"d1", "d2", "d3", "d4", "d5", "d6", "d7",
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"d8", "d9", "d10", "d11", "d12", "d13", "d14",
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"d15", "d16", "d17", "d18", "d19", "d20", "d21",
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"d22", "d23", "d24", "d25", "d26", "d27", "d28",
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"d29", "d30", "d31", "d32"
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};
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struct m68hc11_soft_reg
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{
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const char *name;
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CORE_ADDR addr;
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};
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static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
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#define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
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static int soft_min_addr;
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static int soft_max_addr;
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static int soft_reg_initialized = 0;
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/* Look in the symbol table for the address of a pseudo register
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in memory. If we don't find it, pretend the register is not used
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and not available. */
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static void
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m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
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{
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struct minimal_symbol *msymbol;
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msymbol = lookup_minimal_symbol (name, NULL, NULL);
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if (msymbol)
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{
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reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
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reg->name = xstrdup (name);
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/* Keep track of the address range for soft registers. */
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if (reg->addr < (CORE_ADDR) soft_min_addr)
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soft_min_addr = reg->addr;
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if (reg->addr > (CORE_ADDR) soft_max_addr)
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soft_max_addr = reg->addr;
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}
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else
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{
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reg->name = 0;
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reg->addr = 0;
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}
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}
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/* Initialize the table of soft register addresses according
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to the symbol table. */
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static void
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m68hc11_initialize_register_info (void)
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{
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int i;
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if (soft_reg_initialized)
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return;
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soft_min_addr = INT_MAX;
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soft_max_addr = 0;
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for (i = 0; i < M68HC11_ALL_REGS; i++)
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{
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soft_regs[i].name = 0;
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}
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m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
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m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
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m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
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soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
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m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
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for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
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{
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char buf[10];
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sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
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m68hc11_get_register_info (&soft_regs[i], buf);
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}
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if (soft_regs[SOFT_FP_REGNUM].name == 0)
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warning (_("No frame soft register found in the symbol table.\n"
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"Stack backtrace will not work."));
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soft_reg_initialized = 1;
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}
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/* Given an address in memory, return the soft register number if
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that address corresponds to a soft register. Returns -1 if not. */
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static int
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m68hc11_which_soft_register (CORE_ADDR addr)
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{
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int i;
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if (addr < soft_min_addr || addr > soft_max_addr)
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return -1;
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for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
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{
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if (soft_regs[i].name && soft_regs[i].addr == addr)
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return i;
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}
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return -1;
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}
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/* Fetch a pseudo register. The 68hc11 soft registers are treated like
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pseudo registers. They are located in memory. Translate the register
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fetch into a memory read. */
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static void
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m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
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struct regcache *regcache,
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int regno, gdb_byte *buf)
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{
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/* The PC is a pseudo reg only for 68HC12 with the memory bank
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addressing mode. */
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if (regno == M68HC12_HARD_PC_REGNUM)
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{
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ULONGEST pc;
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const int regsize = TYPE_LENGTH (builtin_type_uint32);
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regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
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if (pc >= 0x8000 && pc < 0xc000)
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{
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ULONGEST page;
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regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
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pc -= 0x8000;
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pc += (page << 14);
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pc += 0x1000000;
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}
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store_unsigned_integer (buf, regsize, pc);
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return;
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}
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m68hc11_initialize_register_info ();
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/* Fetch a soft register: translate into a memory read. */
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if (soft_regs[regno].name)
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{
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target_read_memory (soft_regs[regno].addr, buf, 2);
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}
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else
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{
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memset (buf, 0, 2);
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}
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}
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/* Store a pseudo register. Translate the register store
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into a memory write. */
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static void
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m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
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struct regcache *regcache,
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int regno, const gdb_byte *buf)
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{
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/* The PC is a pseudo reg only for 68HC12 with the memory bank
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addressing mode. */
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if (regno == M68HC12_HARD_PC_REGNUM)
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{
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const int regsize = TYPE_LENGTH (builtin_type_uint32);
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char *tmp = alloca (regsize);
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CORE_ADDR pc;
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memcpy (tmp, buf, regsize);
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pc = extract_unsigned_integer (tmp, regsize);
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if (pc >= 0x1000000)
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{
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pc -= 0x1000000;
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regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
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(pc >> 14) & 0x0ff);
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pc &= 0x03fff;
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regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
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pc + 0x8000);
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}
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else
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regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
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return;
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}
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m68hc11_initialize_register_info ();
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/* Store a soft register: translate into a memory write. */
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if (soft_regs[regno].name)
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{
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const int regsize = 2;
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char *tmp = alloca (regsize);
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memcpy (tmp, buf, regsize);
|
||
target_write_memory (soft_regs[regno].addr, tmp, regsize);
|
||
}
|
||
}
|
||
|
||
static const char *
|
||
m68hc11_register_name (struct gdbarch *gdbarch, int reg_nr)
|
||
{
|
||
if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch))
|
||
return "pc";
|
||
if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch))
|
||
return "ppc";
|
||
|
||
if (reg_nr < 0)
|
||
return NULL;
|
||
if (reg_nr >= M68HC11_ALL_REGS)
|
||
return NULL;
|
||
|
||
m68hc11_initialize_register_info ();
|
||
|
||
/* If we don't know the address of a soft register, pretend it
|
||
does not exist. */
|
||
if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
|
||
return NULL;
|
||
return m68hc11_register_names[reg_nr];
|
||
}
|
||
|
||
static const unsigned char *
|
||
m68hc11_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
|
||
int *lenptr)
|
||
{
|
||
static unsigned char breakpoint[] = {0x0};
|
||
|
||
*lenptr = sizeof (breakpoint);
|
||
return breakpoint;
|
||
}
|
||
|
||
|
||
/* 68HC11 & 68HC12 prologue analysis.
|
||
|
||
*/
|
||
#define MAX_CODES 12
|
||
|
||
/* 68HC11 opcodes. */
|
||
#undef M6811_OP_PAGE2
|
||
#define M6811_OP_PAGE2 (0x18)
|
||
#define M6811_OP_LDX (0xde)
|
||
#define M6811_OP_LDX_EXT (0xfe)
|
||
#define M6811_OP_PSHX (0x3c)
|
||
#define M6811_OP_STS (0x9f)
|
||
#define M6811_OP_STS_EXT (0xbf)
|
||
#define M6811_OP_TSX (0x30)
|
||
#define M6811_OP_XGDX (0x8f)
|
||
#define M6811_OP_ADDD (0xc3)
|
||
#define M6811_OP_TXS (0x35)
|
||
#define M6811_OP_DES (0x34)
|
||
|
||
/* 68HC12 opcodes. */
|
||
#define M6812_OP_PAGE2 (0x18)
|
||
#define M6812_OP_MOVW (0x01)
|
||
#define M6812_PB_PSHW (0xae)
|
||
#define M6812_OP_STS (0x5f)
|
||
#define M6812_OP_STS_EXT (0x7f)
|
||
#define M6812_OP_LEAS (0x1b)
|
||
#define M6812_OP_PSHX (0x34)
|
||
#define M6812_OP_PSHY (0x35)
|
||
|
||
/* Operand extraction. */
|
||
#define OP_DIRECT (0x100) /* 8-byte direct addressing. */
|
||
#define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
|
||
#define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
|
||
#define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
|
||
|
||
/* Identification of the sequence. */
|
||
enum m6811_seq_type
|
||
{
|
||
P_LAST = 0,
|
||
P_SAVE_REG, /* Save a register on the stack. */
|
||
P_SET_FRAME, /* Setup the frame pointer. */
|
||
P_LOCAL_1, /* Allocate 1 byte for locals. */
|
||
P_LOCAL_2, /* Allocate 2 bytes for locals. */
|
||
P_LOCAL_N /* Allocate N bytes for locals. */
|
||
};
|
||
|
||
struct insn_sequence {
|
||
enum m6811_seq_type type;
|
||
unsigned length;
|
||
unsigned short code[MAX_CODES];
|
||
};
|
||
|
||
/* Sequence of instructions in the 68HC11 function prologue. */
|
||
static struct insn_sequence m6811_prologue[] = {
|
||
/* Sequences to save a soft-register. */
|
||
{ P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
|
||
M6811_OP_PSHX } },
|
||
{ P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
|
||
M6811_OP_PAGE2, M6811_OP_PSHX } },
|
||
{ P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
|
||
M6811_OP_PSHX } },
|
||
{ P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
|
||
M6811_OP_PAGE2, M6811_OP_PSHX } },
|
||
|
||
/* Sequences to allocate local variables. */
|
||
{ P_LOCAL_N, 7, { M6811_OP_TSX,
|
||
M6811_OP_XGDX,
|
||
M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
|
||
M6811_OP_XGDX,
|
||
M6811_OP_TXS } },
|
||
{ P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
|
||
M6811_OP_PAGE2, M6811_OP_XGDX,
|
||
M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
|
||
M6811_OP_PAGE2, M6811_OP_XGDX,
|
||
M6811_OP_PAGE2, M6811_OP_TXS } },
|
||
{ P_LOCAL_1, 1, { M6811_OP_DES } },
|
||
{ P_LOCAL_2, 1, { M6811_OP_PSHX } },
|
||
{ P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
|
||
|
||
/* Initialize the frame pointer. */
|
||
{ P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
|
||
{ P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
|
||
{ P_LAST, 0, { 0 } }
|
||
};
|
||
|
||
|
||
/* Sequence of instructions in the 68HC12 function prologue. */
|
||
static struct insn_sequence m6812_prologue[] = {
|
||
{ P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
|
||
OP_IMM_HIGH, OP_IMM_LOW } },
|
||
{ P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
|
||
{ P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
|
||
{ P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
|
||
{ P_LOCAL_2, 1, { M6812_OP_PSHX } },
|
||
{ P_LOCAL_2, 1, { M6812_OP_PSHY } },
|
||
{ P_LAST, 0 }
|
||
};
|
||
|
||
|
||
/* Analyze the sequence of instructions starting at the given address.
|
||
Returns a pointer to the sequence when it is recognized and
|
||
the optional value (constant/address) associated with it. */
|
||
static struct insn_sequence *
|
||
m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
|
||
CORE_ADDR *val)
|
||
{
|
||
unsigned char buffer[MAX_CODES];
|
||
unsigned bufsize;
|
||
unsigned j;
|
||
CORE_ADDR cur_val;
|
||
short v = 0;
|
||
|
||
bufsize = 0;
|
||
for (; seq->type != P_LAST; seq++)
|
||
{
|
||
cur_val = 0;
|
||
for (j = 0; j < seq->length; j++)
|
||
{
|
||
if (bufsize < j + 1)
|
||
{
|
||
buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
|
||
1);
|
||
bufsize++;
|
||
}
|
||
/* Continue while we match the opcode. */
|
||
if (seq->code[j] == buffer[j])
|
||
continue;
|
||
|
||
if ((seq->code[j] & 0xf00) == 0)
|
||
break;
|
||
|
||
/* Extract a sequence parameter (address or constant). */
|
||
switch (seq->code[j])
|
||
{
|
||
case OP_DIRECT:
|
||
cur_val = (CORE_ADDR) buffer[j];
|
||
break;
|
||
|
||
case OP_IMM_HIGH:
|
||
cur_val = cur_val & 0x0ff;
|
||
cur_val |= (buffer[j] << 8);
|
||
break;
|
||
|
||
case OP_IMM_LOW:
|
||
cur_val &= 0x0ff00;
|
||
cur_val |= buffer[j];
|
||
break;
|
||
|
||
case OP_PBYTE:
|
||
if ((buffer[j] & 0xE0) == 0x80)
|
||
{
|
||
v = buffer[j] & 0x1f;
|
||
if (v & 0x10)
|
||
v |= 0xfff0;
|
||
}
|
||
else if ((buffer[j] & 0xfe) == 0xf0)
|
||
{
|
||
v = read_memory_unsigned_integer (pc + j + 1, 1);
|
||
if (buffer[j] & 1)
|
||
v |= 0xff00;
|
||
}
|
||
else if (buffer[j] == 0xf2)
|
||
{
|
||
v = read_memory_unsigned_integer (pc + j + 1, 2);
|
||
}
|
||
cur_val = v;
|
||
break;
|
||
}
|
||
}
|
||
|
||
/* We have a full match. */
|
||
if (j == seq->length)
|
||
{
|
||
*val = cur_val;
|
||
return seq;
|
||
}
|
||
}
|
||
return 0;
|
||
}
|
||
|
||
/* Return the instruction that the function at the PC is using. */
|
||
static enum insn_return_kind
|
||
m68hc11_get_return_insn (CORE_ADDR pc)
|
||
{
|
||
struct minimal_symbol *sym;
|
||
|
||
/* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
|
||
function is stored by elfread.c in the high bit of the info field.
|
||
Use this to decide which instruction the function uses to return. */
|
||
sym = lookup_minimal_symbol_by_pc (pc);
|
||
if (sym == 0)
|
||
return RETURN_RTS;
|
||
|
||
if (MSYMBOL_IS_RTC (sym))
|
||
return RETURN_RTC;
|
||
else if (MSYMBOL_IS_RTI (sym))
|
||
return RETURN_RTI;
|
||
else
|
||
return RETURN_RTS;
|
||
}
|
||
|
||
/* Analyze the function prologue to find some information
|
||
about the function:
|
||
- the PC of the first line (for m68hc11_skip_prologue)
|
||
- the offset of the previous frame saved address (from current frame)
|
||
- the soft registers which are pushed. */
|
||
static CORE_ADDR
|
||
m68hc11_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
|
||
CORE_ADDR current_pc, struct m68hc11_unwind_cache *info)
|
||
{
|
||
LONGEST save_addr;
|
||
CORE_ADDR func_end;
|
||
int size;
|
||
int found_frame_point;
|
||
int saved_reg;
|
||
int done = 0;
|
||
struct insn_sequence *seq_table;
|
||
|
||
info->size = 0;
|
||
info->sp_offset = 0;
|
||
if (pc >= current_pc)
|
||
return current_pc;
|
||
|
||
size = 0;
|
||
|
||
m68hc11_initialize_register_info ();
|
||
if (pc == 0)
|
||
{
|
||
info->size = 0;
|
||
return pc;
|
||
}
|
||
|
||
seq_table = gdbarch_tdep (gdbarch)->prologue;
|
||
|
||
/* The 68hc11 stack is as follows:
|
||
|
||
|
||
| |
|
||
+-----------+
|
||
| |
|
||
| args |
|
||
| |
|
||
+-----------+
|
||
| PC-return |
|
||
+-----------+
|
||
| Old frame |
|
||
+-----------+
|
||
| |
|
||
| Locals |
|
||
| |
|
||
+-----------+ <--- current frame
|
||
| |
|
||
|
||
With most processors (like 68K) the previous frame can be computed
|
||
easily because it is always at a fixed offset (see link/unlink).
|
||
That is, locals are accessed with negative offsets, arguments are
|
||
accessed with positive ones. Since 68hc11 only supports offsets
|
||
in the range [0..255], the frame is defined at the bottom of
|
||
locals (see picture).
|
||
|
||
The purpose of the analysis made here is to find out the size
|
||
of locals in this function. An alternative to this is to use
|
||
DWARF2 info. This would be better but I don't know how to
|
||
access dwarf2 debug from this function.
|
||
|
||
Walk from the function entry point to the point where we save
|
||
the frame. While walking instructions, compute the size of bytes
|
||
which are pushed. This gives us the index to access the previous
|
||
frame.
|
||
|
||
We limit the search to 128 bytes so that the algorithm is bounded
|
||
in case of random and wrong code. We also stop and abort if
|
||
we find an instruction which is not supposed to appear in the
|
||
prologue (as generated by gcc 2.95, 2.96).
|
||
*/
|
||
func_end = pc + 128;
|
||
found_frame_point = 0;
|
||
info->size = 0;
|
||
save_addr = 0;
|
||
while (!done && pc + 2 < func_end)
|
||
{
|
||
struct insn_sequence *seq;
|
||
CORE_ADDR val;
|
||
|
||
seq = m68hc11_analyze_instruction (seq_table, pc, &val);
|
||
if (seq == 0)
|
||
break;
|
||
|
||
/* If we are within the instruction group, we can't advance the
|
||
pc nor the stack offset. Otherwise the caller's stack computed
|
||
from the current stack can be wrong. */
|
||
if (pc + seq->length > current_pc)
|
||
break;
|
||
|
||
pc = pc + seq->length;
|
||
if (seq->type == P_SAVE_REG)
|
||
{
|
||
if (found_frame_point)
|
||
{
|
||
saved_reg = m68hc11_which_soft_register (val);
|
||
if (saved_reg < 0)
|
||
break;
|
||
|
||
save_addr -= 2;
|
||
if (info->saved_regs)
|
||
info->saved_regs[saved_reg].addr = save_addr;
|
||
}
|
||
else
|
||
{
|
||
size += 2;
|
||
}
|
||
}
|
||
else if (seq->type == P_SET_FRAME)
|
||
{
|
||
found_frame_point = 1;
|
||
info->size = size;
|
||
}
|
||
else if (seq->type == P_LOCAL_1)
|
||
{
|
||
size += 1;
|
||
}
|
||
else if (seq->type == P_LOCAL_2)
|
||
{
|
||
size += 2;
|
||
}
|
||
else if (seq->type == P_LOCAL_N)
|
||
{
|
||
/* Stack pointer is decremented for the allocation. */
|
||
if (val & 0x8000)
|
||
size -= (int) (val) | 0xffff0000;
|
||
else
|
||
size -= val;
|
||
}
|
||
}
|
||
if (found_frame_point == 0)
|
||
info->sp_offset = size;
|
||
else
|
||
info->sp_offset = -1;
|
||
return pc;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
m68hc11_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
|
||
{
|
||
CORE_ADDR func_addr, func_end;
|
||
struct symtab_and_line sal;
|
||
struct m68hc11_unwind_cache tmp_cache = { 0 };
|
||
|
||
/* If we have line debugging information, then the end of the
|
||
prologue should be the first assembly instruction of the
|
||
first source line. */
|
||
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
|
||
{
|
||
sal = find_pc_line (func_addr, 0);
|
||
if (sal.end && sal.end < func_end)
|
||
return sal.end;
|
||
}
|
||
|
||
pc = m68hc11_scan_prologue (gdbarch, pc, (CORE_ADDR) -1, &tmp_cache);
|
||
return pc;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
||
{
|
||
ULONGEST pc;
|
||
|
||
pc = frame_unwind_register_unsigned (next_frame, gdbarch_pc_regnum (gdbarch));
|
||
return pc;
|
||
}
|
||
|
||
/* Put here the code to store, into fi->saved_regs, the addresses of
|
||
the saved registers of frame described by FRAME_INFO. This
|
||
includes special registers such as pc and fp saved in special ways
|
||
in the stack frame. sp is even more special: the address we return
|
||
for it IS the sp for the next frame. */
|
||
|
||
static struct m68hc11_unwind_cache *
|
||
m68hc11_frame_unwind_cache (struct frame_info *this_frame,
|
||
void **this_prologue_cache)
|
||
{
|
||
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
||
ULONGEST prev_sp;
|
||
ULONGEST this_base;
|
||
struct m68hc11_unwind_cache *info;
|
||
CORE_ADDR current_pc;
|
||
int i;
|
||
|
||
if ((*this_prologue_cache))
|
||
return (*this_prologue_cache);
|
||
|
||
info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache);
|
||
(*this_prologue_cache) = info;
|
||
info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
|
||
|
||
info->pc = get_frame_func (this_frame);
|
||
|
||
info->size = 0;
|
||
info->return_kind = m68hc11_get_return_insn (info->pc);
|
||
|
||
/* The SP was moved to the FP. This indicates that a new frame
|
||
was created. Get THIS frame's FP value by unwinding it from
|
||
the next frame. */
|
||
this_base = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM);
|
||
if (this_base == 0)
|
||
{
|
||
info->base = 0;
|
||
return info;
|
||
}
|
||
|
||
current_pc = get_frame_pc (this_frame);
|
||
if (info->pc != 0)
|
||
m68hc11_scan_prologue (gdbarch, info->pc, current_pc, info);
|
||
|
||
info->saved_regs[HARD_PC_REGNUM].addr = info->size;
|
||
|
||
if (info->sp_offset != (CORE_ADDR) -1)
|
||
{
|
||
info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
|
||
this_base = get_frame_register_unsigned (this_frame, HARD_SP_REGNUM);
|
||
prev_sp = this_base + info->sp_offset + 2;
|
||
this_base += STACK_CORRECTION (gdbarch);
|
||
}
|
||
else
|
||
{
|
||
/* The FP points at the last saved register. Adjust the FP back
|
||
to before the first saved register giving the SP. */
|
||
prev_sp = this_base + info->size + 2;
|
||
|
||
this_base += STACK_CORRECTION (gdbarch);
|
||
if (soft_regs[SOFT_FP_REGNUM].name)
|
||
info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
|
||
}
|
||
|
||
if (info->return_kind == RETURN_RTC)
|
||
{
|
||
prev_sp += 1;
|
||
info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
|
||
info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
|
||
}
|
||
else if (info->return_kind == RETURN_RTI)
|
||
{
|
||
prev_sp += 7;
|
||
info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
|
||
info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
|
||
info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
|
||
info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
|
||
info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
|
||
}
|
||
|
||
/* Add 1 here to adjust for the post-decrement nature of the push
|
||
instruction.*/
|
||
info->prev_sp = prev_sp;
|
||
|
||
info->base = this_base;
|
||
|
||
/* Adjust all the saved registers so that they contain addresses and not
|
||
offsets. */
|
||
for (i = 0;
|
||
i < gdbarch_num_regs (gdbarch)
|
||
+ gdbarch_num_pseudo_regs (gdbarch) - 1;
|
||
i++)
|
||
if (trad_frame_addr_p (info->saved_regs, i))
|
||
{
|
||
info->saved_regs[i].addr += this_base;
|
||
}
|
||
|
||
/* The previous frame's SP needed to be computed. Save the computed
|
||
value. */
|
||
trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp);
|
||
|
||
return info;
|
||
}
|
||
|
||
/* Given a GDB frame, determine the address of the calling function's
|
||
frame. This will be used to create a new GDB frame struct. */
|
||
|
||
static void
|
||
m68hc11_frame_this_id (struct frame_info *this_frame,
|
||
void **this_prologue_cache,
|
||
struct frame_id *this_id)
|
||
{
|
||
struct m68hc11_unwind_cache *info
|
||
= m68hc11_frame_unwind_cache (this_frame, this_prologue_cache);
|
||
CORE_ADDR base;
|
||
CORE_ADDR func;
|
||
struct frame_id id;
|
||
|
||
/* The FUNC is easy. */
|
||
func = get_frame_func (this_frame);
|
||
|
||
/* Hopefully the prologue analysis either correctly determined the
|
||
frame's base (which is the SP from the previous frame), or set
|
||
that base to "NULL". */
|
||
base = info->prev_sp;
|
||
if (base == 0)
|
||
return;
|
||
|
||
id = frame_id_build (base, func);
|
||
(*this_id) = id;
|
||
}
|
||
|
||
static struct value *
|
||
m68hc11_frame_prev_register (struct frame_info *this_frame,
|
||
void **this_prologue_cache, int regnum)
|
||
{
|
||
struct value *value;
|
||
struct m68hc11_unwind_cache *info
|
||
= m68hc11_frame_unwind_cache (this_frame, this_prologue_cache);
|
||
|
||
value = trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
|
||
|
||
/* Take into account the 68HC12 specific call (PC + page). */
|
||
if (regnum == HARD_PC_REGNUM
|
||
&& info->return_kind == RETURN_RTC
|
||
&& USE_PAGE_REGISTER (get_frame_arch (this_frame)))
|
||
{
|
||
CORE_ADDR pc = value_as_long (value);
|
||
if (pc >= 0x08000 && pc < 0x0c000)
|
||
{
|
||
CORE_ADDR page;
|
||
|
||
release_value (value);
|
||
value_free (value);
|
||
|
||
value = trad_frame_get_prev_register (this_frame, info->saved_regs,
|
||
HARD_PAGE_REGNUM);
|
||
page = value_as_long (value);
|
||
release_value (value);
|
||
value_free (value);
|
||
|
||
pc -= 0x08000;
|
||
pc += ((page & 0x0ff) << 14);
|
||
pc += 0x1000000;
|
||
|
||
return frame_unwind_got_constant (this_frame, regnum, pc);
|
||
}
|
||
}
|
||
|
||
return value;
|
||
}
|
||
|
||
static const struct frame_unwind m68hc11_frame_unwind = {
|
||
NORMAL_FRAME,
|
||
m68hc11_frame_this_id,
|
||
m68hc11_frame_prev_register,
|
||
NULL,
|
||
default_frame_sniffer
|
||
};
|
||
|
||
static CORE_ADDR
|
||
m68hc11_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
||
{
|
||
struct m68hc11_unwind_cache *info
|
||
= m68hc11_frame_unwind_cache (this_frame, this_cache);
|
||
|
||
return info->base;
|
||
}
|
||
|
||
static CORE_ADDR
|
||
m68hc11_frame_args_address (struct frame_info *this_frame, void **this_cache)
|
||
{
|
||
CORE_ADDR addr;
|
||
struct m68hc11_unwind_cache *info
|
||
= m68hc11_frame_unwind_cache (this_frame, this_cache);
|
||
|
||
addr = info->base + info->size;
|
||
if (info->return_kind == RETURN_RTC)
|
||
addr += 1;
|
||
else if (info->return_kind == RETURN_RTI)
|
||
addr += 7;
|
||
|
||
return addr;
|
||
}
|
||
|
||
static const struct frame_base m68hc11_frame_base = {
|
||
&m68hc11_frame_unwind,
|
||
m68hc11_frame_base_address,
|
||
m68hc11_frame_base_address,
|
||
m68hc11_frame_args_address
|
||
};
|
||
|
||
static CORE_ADDR
|
||
m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
||
{
|
||
ULONGEST sp;
|
||
sp = frame_unwind_register_unsigned (next_frame, HARD_SP_REGNUM);
|
||
return sp;
|
||
}
|
||
|
||
/* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
|
||
frame. The frame ID's base needs to match the TOS value saved by
|
||
save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
|
||
|
||
static struct frame_id
|
||
m68hc11_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
||
{
|
||
ULONGEST tos;
|
||
CORE_ADDR pc = get_frame_pc (this_frame);
|
||
|
||
tos = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM);
|
||
tos += 2;
|
||
return frame_id_build (tos, pc);
|
||
}
|
||
|
||
|
||
/* Get and print the register from the given frame. */
|
||
static void
|
||
m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
|
||
struct frame_info *frame, int regno)
|
||
{
|
||
LONGEST rval;
|
||
|
||
if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
|
||
|| regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
|
||
rval = get_frame_register_unsigned (frame, regno);
|
||
else
|
||
rval = get_frame_register_signed (frame, regno);
|
||
|
||
if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
|
||
|| regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
|
||
{
|
||
fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
|
||
if (regno != HARD_CCR_REGNUM)
|
||
print_longest (file, 'd', 1, rval);
|
||
}
|
||
else
|
||
{
|
||
if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
|
||
{
|
||
ULONGEST page;
|
||
|
||
page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM);
|
||
fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
|
||
(unsigned) rval);
|
||
}
|
||
else
|
||
{
|
||
fprintf_filtered (file, "0x%04x ", (unsigned) rval);
|
||
if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
|
||
&& regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
|
||
print_longest (file, 'd', 1, rval);
|
||
}
|
||
}
|
||
|
||
if (regno == HARD_CCR_REGNUM)
|
||
{
|
||
/* CCR register */
|
||
int C, Z, N, V;
|
||
unsigned char l = rval & 0xff;
|
||
|
||
fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
|
||
l & M6811_S_BIT ? 'S' : '-',
|
||
l & M6811_X_BIT ? 'X' : '-',
|
||
l & M6811_H_BIT ? 'H' : '-',
|
||
l & M6811_I_BIT ? 'I' : '-',
|
||
l & M6811_N_BIT ? 'N' : '-',
|
||
l & M6811_Z_BIT ? 'Z' : '-',
|
||
l & M6811_V_BIT ? 'V' : '-',
|
||
l & M6811_C_BIT ? 'C' : '-');
|
||
N = (l & M6811_N_BIT) != 0;
|
||
Z = (l & M6811_Z_BIT) != 0;
|
||
V = (l & M6811_V_BIT) != 0;
|
||
C = (l & M6811_C_BIT) != 0;
|
||
|
||
/* Print flags following the h8300 */
|
||
if ((C | Z) == 0)
|
||
fprintf_filtered (file, "u> ");
|
||
else if ((C | Z) == 1)
|
||
fprintf_filtered (file, "u<= ");
|
||
else if (C == 0)
|
||
fprintf_filtered (file, "u< ");
|
||
|
||
if (Z == 0)
|
||
fprintf_filtered (file, "!= ");
|
||
else
|
||
fprintf_filtered (file, "== ");
|
||
|
||
if ((N ^ V) == 0)
|
||
fprintf_filtered (file, ">= ");
|
||
else
|
||
fprintf_filtered (file, "< ");
|
||
|
||
if ((Z | (N ^ V)) == 0)
|
||
fprintf_filtered (file, "> ");
|
||
else
|
||
fprintf_filtered (file, "<= ");
|
||
}
|
||
}
|
||
|
||
/* Same as 'info reg' but prints the registers in a different way. */
|
||
static void
|
||
m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
|
||
struct frame_info *frame, int regno, int cpregs)
|
||
{
|
||
if (regno >= 0)
|
||
{
|
||
const char *name = gdbarch_register_name (gdbarch, regno);
|
||
|
||
if (!name || !*name)
|
||
return;
|
||
|
||
fprintf_filtered (file, "%-10s ", name);
|
||
m68hc11_print_register (gdbarch, file, frame, regno);
|
||
fprintf_filtered (file, "\n");
|
||
}
|
||
else
|
||
{
|
||
int i, nr;
|
||
|
||
fprintf_filtered (file, "PC=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
|
||
|
||
fprintf_filtered (file, " SP=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
|
||
|
||
fprintf_filtered (file, " FP=");
|
||
m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
|
||
|
||
fprintf_filtered (file, "\nCCR=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
|
||
|
||
fprintf_filtered (file, "\nD=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
|
||
|
||
fprintf_filtered (file, " X=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
|
||
|
||
fprintf_filtered (file, " Y=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
|
||
|
||
if (gdbarch_tdep (gdbarch)->use_page_register)
|
||
{
|
||
fprintf_filtered (file, "\nPage=");
|
||
m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
|
||
}
|
||
fprintf_filtered (file, "\n");
|
||
|
||
nr = 0;
|
||
for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
|
||
{
|
||
/* Skip registers which are not defined in the symbol table. */
|
||
if (soft_regs[i].name == 0)
|
||
continue;
|
||
|
||
fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
|
||
m68hc11_print_register (gdbarch, file, frame, i);
|
||
nr++;
|
||
if ((nr % 8) == 7)
|
||
fprintf_filtered (file, "\n");
|
||
else
|
||
fprintf_filtered (file, " ");
|
||
}
|
||
if (nr && (nr % 8) != 7)
|
||
fprintf_filtered (file, "\n");
|
||
}
|
||
}
|
||
|
||
static CORE_ADDR
|
||
m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
||
struct regcache *regcache, CORE_ADDR bp_addr,
|
||
int nargs, struct value **args, CORE_ADDR sp,
|
||
int struct_return, CORE_ADDR struct_addr)
|
||
{
|
||
int argnum;
|
||
int first_stack_argnum;
|
||
struct type *type;
|
||
char *val;
|
||
int len;
|
||
char buf[2];
|
||
|
||
first_stack_argnum = 0;
|
||
if (struct_return)
|
||
{
|
||
regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, struct_addr);
|
||
}
|
||
else if (nargs > 0)
|
||
{
|
||
type = value_type (args[0]);
|
||
len = TYPE_LENGTH (type);
|
||
|
||
/* First argument is passed in D and X registers. */
|
||
if (len <= 4)
|
||
{
|
||
ULONGEST v;
|
||
|
||
v = extract_unsigned_integer (value_contents (args[0]), len);
|
||
first_stack_argnum = 1;
|
||
|
||
regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
|
||
if (len > 2)
|
||
{
|
||
v >>= 16;
|
||
regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
|
||
}
|
||
}
|
||
}
|
||
|
||
for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
|
||
{
|
||
type = value_type (args[argnum]);
|
||
len = TYPE_LENGTH (type);
|
||
|
||
if (len & 1)
|
||
{
|
||
static char zero = 0;
|
||
|
||
sp--;
|
||
write_memory (sp, &zero, 1);
|
||
}
|
||
val = (char*) value_contents (args[argnum]);
|
||
sp -= len;
|
||
write_memory (sp, val, len);
|
||
}
|
||
|
||
/* Store return address. */
|
||
sp -= 2;
|
||
store_unsigned_integer (buf, 2, bp_addr);
|
||
write_memory (sp, buf, 2);
|
||
|
||
/* Finally, update the stack pointer... */
|
||
sp -= STACK_CORRECTION (gdbarch);
|
||
regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
|
||
|
||
/* ...and fake a frame pointer. */
|
||
regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
|
||
|
||
/* DWARF2/GCC uses the stack address *before* the function call as a
|
||
frame's CFA. */
|
||
return sp + 2;
|
||
}
|
||
|
||
|
||
/* Return the GDB type object for the "standard" data type
|
||
of data in register N. */
|
||
|
||
static struct type *
|
||
m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
|
||
{
|
||
switch (reg_nr)
|
||
{
|
||
case HARD_PAGE_REGNUM:
|
||
case HARD_A_REGNUM:
|
||
case HARD_B_REGNUM:
|
||
case HARD_CCR_REGNUM:
|
||
return builtin_type_uint8;
|
||
|
||
case M68HC12_HARD_PC_REGNUM:
|
||
return builtin_type_uint32;
|
||
|
||
default:
|
||
return builtin_type_uint16;
|
||
}
|
||
}
|
||
|
||
static void
|
||
m68hc11_store_return_value (struct type *type, struct regcache *regcache,
|
||
const void *valbuf)
|
||
{
|
||
int len;
|
||
|
||
len = TYPE_LENGTH (type);
|
||
|
||
/* First argument is passed in D and X registers. */
|
||
if (len <= 2)
|
||
regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
|
||
else if (len <= 4)
|
||
{
|
||
regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
|
||
len - 2, valbuf);
|
||
regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
|
||
}
|
||
else
|
||
error (_("return of value > 4 is not supported."));
|
||
}
|
||
|
||
|
||
/* Given a return value in `regcache' with a type `type',
|
||
extract and copy its value into `valbuf'. */
|
||
|
||
static void
|
||
m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
|
||
void *valbuf)
|
||
{
|
||
int len = TYPE_LENGTH (type);
|
||
char buf[M68HC11_REG_SIZE];
|
||
|
||
regcache_raw_read (regcache, HARD_D_REGNUM, buf);
|
||
switch (len)
|
||
{
|
||
case 1:
|
||
memcpy (valbuf, buf + 1, 1);
|
||
break;
|
||
|
||
case 2:
|
||
memcpy (valbuf, buf, 2);
|
||
break;
|
||
|
||
case 3:
|
||
memcpy ((char*) valbuf + 1, buf, 2);
|
||
regcache_raw_read (regcache, HARD_X_REGNUM, buf);
|
||
memcpy (valbuf, buf + 1, 1);
|
||
break;
|
||
|
||
case 4:
|
||
memcpy ((char*) valbuf + 2, buf, 2);
|
||
regcache_raw_read (regcache, HARD_X_REGNUM, buf);
|
||
memcpy (valbuf, buf, 2);
|
||
break;
|
||
|
||
default:
|
||
error (_("bad size for return value"));
|
||
}
|
||
}
|
||
|
||
static enum return_value_convention
|
||
m68hc11_return_value (struct gdbarch *gdbarch, struct type *func_type,
|
||
struct type *valtype, struct regcache *regcache,
|
||
gdb_byte *readbuf, const gdb_byte *writebuf)
|
||
{
|
||
if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|
||
|| TYPE_CODE (valtype) == TYPE_CODE_UNION
|
||
|| TYPE_CODE (valtype) == TYPE_CODE_ARRAY
|
||
|| TYPE_LENGTH (valtype) > 4)
|
||
return RETURN_VALUE_STRUCT_CONVENTION;
|
||
else
|
||
{
|
||
if (readbuf != NULL)
|
||
m68hc11_extract_return_value (valtype, regcache, readbuf);
|
||
if (writebuf != NULL)
|
||
m68hc11_store_return_value (valtype, regcache, writebuf);
|
||
return RETURN_VALUE_REGISTER_CONVENTION;
|
||
}
|
||
}
|
||
|
||
/* Test whether the ELF symbol corresponds to a function using rtc or
|
||
rti to return. */
|
||
|
||
static void
|
||
m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
|
||
{
|
||
unsigned char flags;
|
||
|
||
flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
|
||
if (flags & STO_M68HC12_FAR)
|
||
MSYMBOL_SET_RTC (msym);
|
||
if (flags & STO_M68HC12_INTERRUPT)
|
||
MSYMBOL_SET_RTI (msym);
|
||
}
|
||
|
||
static int
|
||
gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
|
||
{
|
||
if (info->arch == bfd_arch_m68hc11)
|
||
return print_insn_m68hc11 (memaddr, info);
|
||
else
|
||
return print_insn_m68hc12 (memaddr, info);
|
||
}
|
||
|
||
|
||
|
||
/* 68HC11/68HC12 register groups.
|
||
Identify real hard registers and soft registers used by gcc. */
|
||
|
||
static struct reggroup *m68hc11_soft_reggroup;
|
||
static struct reggroup *m68hc11_hard_reggroup;
|
||
|
||
static void
|
||
m68hc11_init_reggroups (void)
|
||
{
|
||
m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
|
||
m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
|
||
}
|
||
|
||
static void
|
||
m68hc11_add_reggroups (struct gdbarch *gdbarch)
|
||
{
|
||
reggroup_add (gdbarch, m68hc11_hard_reggroup);
|
||
reggroup_add (gdbarch, m68hc11_soft_reggroup);
|
||
reggroup_add (gdbarch, general_reggroup);
|
||
reggroup_add (gdbarch, float_reggroup);
|
||
reggroup_add (gdbarch, all_reggroup);
|
||
reggroup_add (gdbarch, save_reggroup);
|
||
reggroup_add (gdbarch, restore_reggroup);
|
||
reggroup_add (gdbarch, vector_reggroup);
|
||
reggroup_add (gdbarch, system_reggroup);
|
||
}
|
||
|
||
static int
|
||
m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
|
||
struct reggroup *group)
|
||
{
|
||
/* We must save the real hard register as well as gcc
|
||
soft registers including the frame pointer. */
|
||
if (group == save_reggroup || group == restore_reggroup)
|
||
{
|
||
return (regnum <= gdbarch_num_regs (gdbarch)
|
||
|| ((regnum == SOFT_FP_REGNUM
|
||
|| regnum == SOFT_TMP_REGNUM
|
||
|| regnum == SOFT_ZS_REGNUM
|
||
|| regnum == SOFT_XY_REGNUM)
|
||
&& m68hc11_register_name (gdbarch, regnum)));
|
||
}
|
||
|
||
/* Group to identify gcc soft registers (d1..dN). */
|
||
if (group == m68hc11_soft_reggroup)
|
||
{
|
||
return regnum >= SOFT_D1_REGNUM
|
||
&& m68hc11_register_name (gdbarch, regnum);
|
||
}
|
||
|
||
if (group == m68hc11_hard_reggroup)
|
||
{
|
||
return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
|
||
|| regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
|
||
|| regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
|
||
}
|
||
return default_register_reggroup_p (gdbarch, regnum, group);
|
||
}
|
||
|
||
static struct gdbarch *
|
||
m68hc11_gdbarch_init (struct gdbarch_info info,
|
||
struct gdbarch_list *arches)
|
||
{
|
||
struct gdbarch *gdbarch;
|
||
struct gdbarch_tdep *tdep;
|
||
int elf_flags;
|
||
|
||
soft_reg_initialized = 0;
|
||
|
||
/* Extract the elf_flags if available. */
|
||
if (info.abfd != NULL
|
||
&& bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
|
||
elf_flags = elf_elfheader (info.abfd)->e_flags;
|
||
else
|
||
elf_flags = 0;
|
||
|
||
/* try to find a pre-existing architecture */
|
||
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
||
arches != NULL;
|
||
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
||
{
|
||
if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
|
||
continue;
|
||
|
||
return arches->gdbarch;
|
||
}
|
||
|
||
/* Need a new architecture. Fill in a target specific vector. */
|
||
tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
|
||
gdbarch = gdbarch_alloc (&info, tdep);
|
||
tdep->elf_flags = elf_flags;
|
||
|
||
switch (info.bfd_arch_info->arch)
|
||
{
|
||
case bfd_arch_m68hc11:
|
||
tdep->stack_correction = 1;
|
||
tdep->use_page_register = 0;
|
||
tdep->prologue = m6811_prologue;
|
||
set_gdbarch_addr_bit (gdbarch, 16);
|
||
set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
|
||
set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
|
||
set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
|
||
break;
|
||
|
||
case bfd_arch_m68hc12:
|
||
tdep->stack_correction = 0;
|
||
tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
|
||
tdep->prologue = m6812_prologue;
|
||
set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
|
||
set_gdbarch_num_pseudo_regs (gdbarch,
|
||
elf_flags & E_M68HC12_BANKS
|
||
? M68HC12_NUM_PSEUDO_REGS
|
||
: M68HC11_NUM_PSEUDO_REGS);
|
||
set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
|
||
? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
|
||
set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
|
||
? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
|
||
break;
|
||
|
||
default:
|
||
break;
|
||
}
|
||
|
||
/* Initially set everything according to the ABI.
|
||
Use 16-bit integers since it will be the case for most
|
||
programs. The size of these types should normally be set
|
||
according to the dwarf2 debug information. */
|
||
set_gdbarch_short_bit (gdbarch, 16);
|
||
set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
|
||
set_gdbarch_float_bit (gdbarch, 32);
|
||
set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
|
||
set_gdbarch_long_double_bit (gdbarch, 64);
|
||
set_gdbarch_long_bit (gdbarch, 32);
|
||
set_gdbarch_ptr_bit (gdbarch, 16);
|
||
set_gdbarch_long_long_bit (gdbarch, 64);
|
||
|
||
/* Characters are unsigned. */
|
||
set_gdbarch_char_signed (gdbarch, 0);
|
||
|
||
set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
|
||
set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp);
|
||
|
||
/* Set register info. */
|
||
set_gdbarch_fp0_regnum (gdbarch, -1);
|
||
|
||
set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
|
||
set_gdbarch_register_name (gdbarch, m68hc11_register_name);
|
||
set_gdbarch_register_type (gdbarch, m68hc11_register_type);
|
||
set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
|
||
set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
|
||
|
||
set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
|
||
|
||
set_gdbarch_return_value (gdbarch, m68hc11_return_value);
|
||
set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
|
||
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
||
set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
|
||
set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
|
||
|
||
m68hc11_add_reggroups (gdbarch);
|
||
set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
|
||
set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
|
||
|
||
/* Hook in the DWARF CFI frame unwinder. */
|
||
dwarf2_append_unwinders (gdbarch);
|
||
|
||
frame_unwind_append_unwinder (gdbarch, &m68hc11_frame_unwind);
|
||
frame_base_set_default (gdbarch, &m68hc11_frame_base);
|
||
|
||
/* Methods for saving / extracting a dummy frame's ID. The ID's
|
||
stack address must match the SP value returned by
|
||
PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
|
||
set_gdbarch_dummy_id (gdbarch, m68hc11_dummy_id);
|
||
|
||
/* Return the unwound PC value. */
|
||
set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc);
|
||
|
||
/* Minsymbol frobbing. */
|
||
set_gdbarch_elf_make_msymbol_special (gdbarch,
|
||
m68hc11_elf_make_msymbol_special);
|
||
|
||
set_gdbarch_believe_pcc_promotion (gdbarch, 1);
|
||
|
||
return gdbarch;
|
||
}
|
||
|
||
extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
|
||
|
||
void
|
||
_initialize_m68hc11_tdep (void)
|
||
{
|
||
register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
|
||
register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
|
||
m68hc11_init_reggroups ();
|
||
}
|
||
|