Maciej W. Rozycki 2b0c8b40ed include/opcode/
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
	(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
	(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
	(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
	(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
	(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
	(INSN2_READ_GPR_MMN): Likewise.
	(INSN2_READ_FPR_D): Change the bit used.
	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
	(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
	(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
	(INSN2_COND_BRANCH): Likewise.
	(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
	(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
	(INSN2_MOD_GPR_MN): Likewise.

	gas/
	* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
	INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
	INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
	INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
	register use checks.
	(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
	INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
	INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
	checks.
	(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
	use flag with INSN_WRITE_GPR_S.  Add INSN2_WRITE_GPR_MB,
	INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
	opcode register use checks.
	(can_swap_branch_p): Enable microMIPS branch swapping.
	(append_insn): Likewise.

	gas/testsuite/
	* gas/mips/micromips.d: Update according to changes to enable
	microMIPS branch swapping.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips@jal-svr4pic.d: Likewise.
	* gas/mips/micromips@loc-swap.d: Likewise.
	* gas/mips/micromips@loc-swap-dis.d: Likewise.

	opcodes/
	* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
	(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
	(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
	(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
	(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
	(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
	(WR_s): Update macro.
	(micromips_opcodes): Update register use flags of: "addiu",
	"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
	"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
	"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
	"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
	"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
	"swm" and "xor" instructions.
2011-08-09 14:25:29 +00:00
..
2010-05-07 12:28:50 +00:00
2009-09-02 07:25:43 +00:00
2010-06-27 04:07:55 +00:00
2009-09-02 07:25:43 +00:00
2011-07-01 16:11:27 +00:00
2009-09-02 07:25:43 +00:00
2009-10-24 00:17:08 +00:00
2009-09-02 07:25:43 +00:00
2011-08-09 14:25:29 +00:00
2009-01-06 01:03:27 +00:00
2011-01-01 16:43:53 +00:00
2011-07-24 14:20:15 +00:00
2011-07-24 14:20:15 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2011-07-22 20:22:38 +00:00
2010-10-09 06:50:23 +00:00
2010-06-27 04:07:55 +00:00
2010-10-09 06:50:23 +00:00
2010-10-08 14:00:50 +00:00
2009-09-02 07:25:43 +00:00
2010-12-31 16:43:46 +00:00
2011-08-02 19:58:06 +00:00
2011-07-22 20:22:38 +00:00
2011-07-22 20:22:38 +00:00
2011-07-22 20:22:38 +00:00
2011-08-01 19:25:48 +00:00
2009-09-02 07:25:43 +00:00
2011-08-01 19:25:48 +00:00
2009-09-02 07:25:43 +00:00
2008-08-28 14:07:50 +00:00
2009-09-02 07:25:43 +00:00
2008-08-28 14:07:50 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2008-08-28 14:07:50 +00:00
2008-08-28 14:07:50 +00:00
2010-10-09 06:50:23 +00:00
2010-10-09 06:50:23 +00:00
2010-10-09 06:50:23 +00:00
2010-02-13 04:38:57 +00:00
2010-10-09 06:50:23 +00:00
2010-10-09 06:50:23 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2010-10-11 22:18:42 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2011-07-24 14:20:15 +00:00
2011-07-24 14:20:15 +00:00
2009-09-02 07:25:43 +00:00
2010-06-27 04:07:55 +00:00
2010-10-09 06:50:23 +00:00
2010-06-28 14:41:59 +00:00
2010-10-09 06:50:23 +00:00
2011-08-09 14:25:29 +00:00
2011-07-24 14:04:51 +00:00
2011-07-24 14:20:15 +00:00
2011-07-24 14:04:51 +00:00
2009-09-02 07:25:43 +00:00
2010-02-03 12:47:06 +00:00
2010-06-27 04:07:55 +00:00
2010-10-09 06:50:23 +00:00
2010-01-02 18:50:59 +00:00
2010-10-09 06:50:23 +00:00
2009-09-02 07:25:43 +00:00
2010-10-08 14:00:50 +00:00
2010-10-08 14:00:50 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2010-07-03 08:27:23 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2011-08-05 16:52:50 +00:00
2011-08-05 16:52:50 +00:00
2009-09-02 07:25:43 +00:00
2010-10-25 15:33:54 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2011-06-29 20:46:11 +00:00
2011-06-29 20:46:11 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2010-10-09 06:50:23 +00:00
2010-10-09 06:50:23 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00
2009-09-02 07:25:43 +00:00