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657 lines
21 KiB
Plaintext
657 lines
21 KiB
Plaintext
2008-01-29 Alan Modra <amodra@bigpond.net.au>
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* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
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to source.
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2007-10-22 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu (movs, movu): Use result of extension operation when
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updating flags.
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2007-07-04 Nick Clifton <nickc@redhat.com>
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* cris.cpu: Update copyright notice to refer to GPLv3.
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* frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
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m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
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sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
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xc16x.opc: Likewise.
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* iq2000.cpu: Fix copyright notice to refer to FSF.
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2007-04-30 Mark Salter <msalter@sadr.localdomain>
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* frv.cpu (spr-names): Support new coprocessor SPR registers.
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2007-04-20 Nick Clifton <nickc@redhat.com>
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* xc16x.cpu: Restore after accidentally overwriting this file with
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xc16x.opc.
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2007-03-29 DJ Delorie <dj@redhat.com>
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* m32c.cpu (Imm-8-s4n): Fix print hook.
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(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
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(arith-jnz-imm4-dst-defn): Make relaxable.
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(arith-jnz16-imm4-dst-defn): Fix encodings.
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2007-03-20 DJ Delorie <dj@redhat.com>
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* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
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mem20): New.
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(src16-16-20-An-relative-*): New.
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(dst16-*-20-An-relative-*): New.
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(dst16-16-16sa-*): New
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(dst16-16-16ar-*): New
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(dst32-16-16sa-Unprefixed-*): New
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(jsri): Fix operands.
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(setzx): Fix encoding.
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2007-03-08 Alan Modra <amodra@bigpond.net.au>
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* m32r.opc: Formatting.
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2006-05-22 Nick Clifton <nickc@redhat.com>
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* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
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2006-04-10 DJ Delorie <dj@redhat.com>
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* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
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decides if this function accepts symbolic constants or not.
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(parse_signed_bitbase): Likewise.
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(parse_unsigned_bitbase8): Pass the new parameter.
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(parse_unsigned_bitbase11): Likewise.
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(parse_unsigned_bitbase16): Likewise.
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(parse_unsigned_bitbase19): Likewise.
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(parse_unsigned_bitbase27): Likewise.
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(parse_signed_bitbase8): Likewise.
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(parse_signed_bitbase11): Likewise.
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(parse_signed_bitbase19): Likewise.
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2006-03-13 DJ Delorie <dj@redhat.com>
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* m32c.cpu (Bit3-S): New.
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(btst:s): New.
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* m32c.opc (parse_bit3_S): New.
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* m32c.cpu (decimal-subtraction16-insn): Add second operand.
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(btst): Add optional :G suffix for MACH32.
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(or.b:S): New.
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(pop.w:G): Add optional :G suffix for MACH16.
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(push.b.imm): Fix syntax.
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2006-03-10 DJ Delorie <dj@redhat.com>
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* m32c.cpu (mul.l): New.
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(mulu.l): New.
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2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
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* xc16x.opc (parse_hash): Return NULL if the input was parsed or
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an error message otherwise.
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(parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
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Fix up comments to correctly describe the functions.
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2006-02-24 DJ Delorie <dj@redhat.com>
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* m32c.cpu (RL_TYPE): New attribute, with macros.
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(Lab-8-24): Add RELAX.
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(unary-insn-defn-g, binary-arith-imm-dst-defn,
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binary-arith-imm4-dst-defn): Add 1ADDR attribute.
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(binary-arith-src-dst-defn): Add 2ADDR attribute.
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(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
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jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
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attribute.
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(jsri16, jsri32): Add 1ADDR attribute.
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(jsr32.w, jsr32.a): Add JUMP attribute.
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2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
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Anil Paranjape <anilp1@kpitcummins.com>
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Shilin Shakti <shilins@kpitcummins.com>
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* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
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description.
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* xc16x.opc: New file containing supporting XC16C routines.
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2006-02-10 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
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2006-01-06 DJ Delorie <dj@redhat.com>
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* m32c.cpu (mov.w:q): Fix mode.
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(push32.b.imm): Likewise, for the comment.
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2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
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Second part of ms1 to mt renaming.
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* mt.cpu (define-arch, define-isa): Set name to mt.
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(define-mach): Adjust.
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* mt.opc (CGEN_ASM_HASH): Update.
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(mt_asm_hash, mt_cgen_insn_supported): Renamed.
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(parse_loopsize, parse_imm16): Adjust.
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2005-12-13 DJ Delorie <dj@redhat.com>
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* m32c.cpu (jsri): Fix order so register names aren't treated as
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symbols.
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(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
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indexwd, indexws): Fix encodings.
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2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
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* mt.cpu: Rename from ms1.cpu.
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* mt.opc: Rename from ms1.opc.
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2005-12-06 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu (simplecris-common-writable-specregs)
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(simplecris-common-readable-specregs): Split from
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simplecris-common-specregs. All users changed.
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(cris-implemented-writable-specregs-v0)
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(cris-implemented-readable-specregs-v0): Similar from
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cris-implemented-specregs-v0.
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(cris-implemented-writable-specregs-v3)
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(cris-implemented-readable-specregs-v3)
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(cris-implemented-writable-specregs-v8)
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(cris-implemented-readable-specregs-v8)
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(cris-implemented-writable-specregs-v10)
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(cris-implemented-readable-specregs-v10)
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(cris-implemented-writable-specregs-v32)
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(cris-implemented-readable-specregs-v32): Similar.
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(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
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insns and specializations.
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2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
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Add ms2
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* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
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model.
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(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
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f-cb2incr, f-rc3): New fields.
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(LOOP): New instruction.
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(JAL-HAZARD): New hazard.
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(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
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New operands.
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(mul, muli, dbnz, iflush): Enable for ms2
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(jal, reti): Has JAL-HAZARD.
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(ldctxt, ldfb, stfb): Only ms1.
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(fbcb): Only ms1,ms1-003.
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(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
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fbcbincrs, mfbcbincrs): Enable for ms2.
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(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
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* ms1.opc (parse_loopsize): New.
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(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
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(print_pcrel): New.
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2005-10-28 Dave Brolley <brolley@redhat.com>
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Contribute the following change:
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2003-09-24 Dave Brolley <brolley@redhat.com>
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* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
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CGEN_ATTR_VALUE_TYPE.
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* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
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Use cgen_bitset_intersect_p.
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2005-10-27 DJ Delorie <dj@redhat.com>
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* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
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(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
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arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
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imm operand is needed.
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(adjnz, sbjnz): Pass the right operands.
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(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
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unary-insn): Add -g variants for opcodes that need to support :G.
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(not.BW:G, push.BW:G): Call it.
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(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
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stzx16-imm8-imm8-abs16): Fix operand typos.
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* m32c.opc (m32c_asm_hash): Support bnCND.
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(parse_signed4n, print_signed4n): New.
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2005-10-26 DJ Delorie <dj@redhat.com>
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* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
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(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
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mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
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dsp8[sp] is signed.
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(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
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(mov.BW:S r0,r1): Fix typo r1l->r1.
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(tst): Allow :G suffix.
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* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
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2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
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2005-10-25 DJ Delorie <dj@redhat.com>
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* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
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making one a macro of the other.
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2005-10-21 DJ Delorie <dj@redhat.com>
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* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
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(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
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indexld, indexls): .w variants have `1' bit.
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(rot32.b): QI, not SI.
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(rot32.w): HI, not SI.
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(xchg16): HI for .w variant.
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2005-10-19 Nick Clifton <nickc@redhat.com>
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* m32r.opc (parse_slo16): Fix bad application of previous patch.
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2005-10-18 Andreas Schwab <schwab@suse.de>
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* m32r.opc (parse_slo16): Better version of previous patch.
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2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
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size.
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2005-07-25 DJ Delorie <dj@redhat.com>
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* m32c.opc (parse_unsigned8): Add %dsp8().
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(parse_signed8): Add %hi8().
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(parse_unsigned16): Add %dsp16().
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(parse_signed16): Add %lo16() and %hi16().
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(parse_lab_5_3): Make valuep a bfd_vma *.
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2005-07-18 Nick Clifton <nickc@redhat.com>
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* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
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components.
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(f-lab32-jmp-s): Fix insertion sequence.
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(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
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(Dsp-40-s8): Make parameter be signed.
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(Dsp-40-s16): Likewise.
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(Dsp-48-s8): Likewise.
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(Dsp-48-s16): Likewise.
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(Imm-13-u3): Likewise. (Despite its name!)
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(BitBase16-16-s8): Make the parameter be unsigned.
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(BitBase16-8-u11-S): Likewise.
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(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
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jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
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relaxation.
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* m32c.opc: Fix formatting.
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Use safe-ctype.h instead of ctype.h
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Move duplicated code sequences into a macro.
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Fix compile time warnings about signedness mismatches.
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Remove dead code.
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(parse_lab_5_3): New parser function.
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2005-07-16 Jim Blandy <jimb@redhat.com>
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* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
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to represent isa sets.
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2005-07-15 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Fix copyright.
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2005-07-14 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
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2005-07-14 Alan Modra <amodra@bigpond.net.au>
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* ms1.opc (print_dollarhex): Correct format string.
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2005-07-06 Alan Modra <amodra@bigpond.net.au>
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* iq2000.cpu: Include from binutils cpu dir.
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2005-07-05 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
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unsigned in order to avoid compile time warnings about sign
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conflicts.
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* ms1.opc (parse_*): Likewise.
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(parse_imm16): Use a "void *" as it is passed both signed and
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unsigned arguments.
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2005-07-01 Nick Clifton <nickc@redhat.com>
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* frv.opc: Update to ISO C90 function declaration style.
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* iq2000.opc: Likewise.
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* m32r.opc: Likewise.
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* sh.opc: Likewise.
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2005-06-15 Dave Brolley <brolley@redhat.com>
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Contributed by Red Hat.
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* ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
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* ms1.opc: New file. Written by Stan Cox.
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2005-05-10 Nick Clifton <nickc@redhat.com>
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* Update the address and phone number of the FSF organization in
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the GPL notices in the following files:
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cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
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m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
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sh64-media.cpu, simplify.inc
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2005-02-24 Alan Modra <amodra@bigpond.net.au>
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* frv.opc (parse_A): Warning fix.
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2005-02-23 Nick Clifton <nickc@redhat.com>
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* frv.opc: Fixed compile time warnings about differing signed'ness
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of pointers passed to functions.
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* m32r.opc: Likewise.
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2005-02-11 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (parse_jtargq10): Change type of valuep argument to
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'bfd_vma *' in order avoid compile time warning message.
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2005-01-28 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu (mstep): Add missing insn.
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2005-01-25 Alexandre Oliva <aoliva@redhat.com>
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2004-11-10 Alexandre Oliva <aoliva@redhat.com>
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* frv.cpu: Add support for TLS annotations in loads and calll.
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* frv.opc (parse_symbolic_address): New.
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(parse_ldd_annotation): New.
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(parse_call_annotation): New.
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(parse_ld_annotation): New.
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(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
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Introduce TLS relocations.
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(parse_d12, parse_s12, parse_u12): Likewise.
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(parse_uhi16): Likewise. Fix constant checking on 64-bit host.
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(parse_call_label, print_at): New.
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2004-12-21 Mikael Starvik <starvik@axis.com>
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* cris.cpu (cris-set-mem): Correct integral write semantics.
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2004-11-29 Hans-Peter Nilsson <hp@axis.com>
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* cris.cpu: New file.
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2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
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* iq2000.cpu: Added quotes around macro arguments so that they
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will work with newer versions of guile.
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2004-10-27 Nick Clifton <nickc@redhat.com>
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* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
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wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
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operand.
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* iq2000.cpu (dnop index): Rename to _index to avoid complications
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with guile.
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2004-08-27 Richard Sandiford <rsandifo@redhat.com>
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* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
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2004-05-15 Nick Clifton <nickc@redhat.com>
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* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
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2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
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2004-03-01 Richard Sandiford <rsandifo@redhat.com>
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* frv.cpu (define-arch frv): Add fr450 mach.
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(define-mach fr450): New.
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(define-model fr450): New. Add profile units to every fr450 insn.
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(define-attr UNIT): Add MDCUTSSI.
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(define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
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(define-attr AUDIO): New boolean.
|
||
(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
|
||
(f-LRA-null, f-TLBPR-null): New fields.
|
||
(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
|
||
(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
|
||
(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
|
||
(LRA-null, TLBPR-null): New macros.
|
||
(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
|
||
(load-real-address): New macro.
|
||
(lrai, lrad, tlbpr): New instructions.
|
||
(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
|
||
(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
|
||
(mdcutssi): Change UNIT attribute to MDCUTSSI.
|
||
(media-low-clear-semantics, media-scope-limit-semantics)
|
||
(media-quad-limit, media-quad-shift): New macros.
|
||
(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
|
||
* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
|
||
(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
|
||
(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
|
||
(fr450_unit_mapping): New array.
|
||
(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
|
||
for new MDCUTSSI unit.
|
||
(fr450_check_insn_major_constraints): New function.
|
||
(check_insn_major_constraints): Use it.
|
||
|
||
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
||
|
||
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
|
||
(scutss): Change unit to I0.
|
||
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
|
||
(mqsaths): Fix FR400-MAJOR categorization.
|
||
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
|
||
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
|
||
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
|
||
combinations.
|
||
|
||
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
||
|
||
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
|
||
(rstb, rsth, rst, rstd, rstq): Delete.
|
||
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
|
||
|
||
2004-02-23 Nick Clifton <nickc@redhat.com>
|
||
|
||
* Apply these patches from Renesas:
|
||
|
||
2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
||
|
||
* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
|
||
disassembling codes for 0x*2 addresses.
|
||
|
||
2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
||
|
||
* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
|
||
|
||
2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
||
|
||
* cpu/m32r.cpu : Add new model m32r2.
|
||
Add new instructions.
|
||
Replace occurrances of 'Mitsubishi' with 'Renesas'.
|
||
Changed PIPE attr of push from O to OS.
|
||
Care for Little-endian of M32R.
|
||
* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
|
||
Care for Little-endian of M32R.
|
||
(parse_slo16): signed extension for value.
|
||
|
||
2004-02-20 Andrew Cagney <cagney@redhat.com>
|
||
|
||
* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
|
||
Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
|
||
|
||
* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
|
||
written by Ben Elliston.
|
||
|
||
2004-01-14 Richard Sandiford <rsandifo@redhat.com>
|
||
|
||
* frv.cpu (UNIT): Add IACC.
|
||
(iacc-multiply-r-r): Use it.
|
||
* frv.opc (fr400_unit_mapping): Add entry for IACC.
|
||
(fr500_unit_mapping, fr550_unit_mapping): Likewise.
|
||
|
||
2004-01-06 Alexandre Oliva <aoliva@redhat.com>
|
||
|
||
2003-12-19 Alexandre Oliva <aoliva@redhat.com>
|
||
* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
|
||
cut&paste errors in shifting/truncating numerical operands.
|
||
2003-08-08 Alexandre Oliva <aoliva@redhat.com>
|
||
* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
|
||
(parse_uslo16): Likewise.
|
||
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
|
||
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
|
||
(parse_s12): Likewise.
|
||
2003-08-04 Alexandre Oliva <aoliva@redhat.com>
|
||
* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
|
||
(parse_uslo16): Likewise.
|
||
(parse_uhi16): Parse gothi and gotfuncdeschi.
|
||
(parse_d12): Parse got12 and gotfuncdesc12.
|
||
(parse_s12): Likewise.
|
||
|
||
2003-10-10 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu (dnpmop): New p-macro.
|
||
(GRdoublek): Use dnpmop.
|
||
(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
|
||
(store-double-r-r): Use (.sym regtype doublek).
|
||
(r-store-double): Ditto.
|
||
(store-double-r-r-u): Ditto.
|
||
(conditional-store-double): Ditto.
|
||
(conditional-store-double-u): Ditto.
|
||
(store-double-r-simm): Ditto.
|
||
(fmovs): Assign to UNIT FMALL.
|
||
|
||
2003-10-06 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu, frv.opc: Add support for fr550.
|
||
|
||
2003-09-24 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu (u-commit): New modelling unit for fr500.
|
||
(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
|
||
(commit-r): Use u-commit model for fr500.
|
||
(commit): Ditto.
|
||
(conditional-float-binary-op): Take profiling data as an argument.
|
||
Update callers.
|
||
(ne-float-binary-op): Ditto.
|
||
|
||
2003-09-19 Michael Snyder <msnyder@redhat.com>
|
||
|
||
* frv.cpu (nldqi): Delete unimplemented instruction.
|
||
|
||
2003-09-12 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
|
||
(clear-ne-flag-r): Pass insn profiling in as an argument. Call
|
||
frv_ref_SI to get input register referenced for profiling.
|
||
(clear-ne-flag-all): Pass insn profiling in as an argument.
|
||
(clrgr,clrfr,clrga,clrfa): Add profiling information.
|
||
|
||
2003-09-11 Michael Snyder <msnyder@redhat.com>
|
||
|
||
* frv.cpu: Typographical corrections.
|
||
|
||
2003-09-09 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu (media-dual-complex): Change UNIT to FMALL.
|
||
(conditional-media-dual-complex, media-quad-complex): Likewise.
|
||
|
||
2003-09-04 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.cpu (register-transfer): Pass in all attributes in on argument.
|
||
Update all callers.
|
||
(conditional-register-transfer): Ditto.
|
||
(cache-preload): Ditto.
|
||
(floating-point-conversion): Ditto.
|
||
(floating-point-neg): Ditto.
|
||
(float-abs): Ditto.
|
||
(float-binary-op-s): Ditto.
|
||
(conditional-float-binary-op): Ditto.
|
||
(ne-float-binary-op): Ditto.
|
||
(float-dual-arith): Ditto.
|
||
(ne-float-dual-arith): Ditto.
|
||
|
||
2003-09-03 Dave Brolley <brolley@redhat.com>
|
||
|
||
* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
|
||
* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
|
||
MCLRACC-1.
|
||
(A): Removed operand.
|
||
(A0,A1): New operands replace operand A.
|
||
(mnop): Now a real insn
|
||
(mclracc): Removed insn.
|
||
(mclracc-0, mclracc-1): New insns replace mclracc.
|
||
(all insns): Use new UNIT attributes.
|
||
|
||
2003-08-21 Nick Clifton <nickc@redhat.com>
|
||
|
||
* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
|
||
and u-media-dual-btoh with output parameter.
|
||
(cmbtoh): Add profiling hack.
|
||
|
||
2003-08-19 Michael Snyder <msnyder@redhat.com>
|
||
|
||
* frv.cpu: Fix typo, Frintkeven -> FRintkeven
|
||
|
||
2003-06-10 Doug Evans <dje@sebabeach.org>
|
||
|
||
* frv.cpu: Add IDOC attribute.
|
||
|
||
2003-06-06 Andrew Cagney <cagney@redhat.com>
|
||
|
||
Contributed by Red Hat.
|
||
* iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
|
||
Stan Cox, and Frank Ch. Eigler.
|
||
* iq2000.opc: New file. Written by Ben Elliston, Frank
|
||
Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
|
||
* iq2000m.cpu: New file. Written by Jeff Johnston.
|
||
* iq10.cpu: New file. Written by Jeff Johnston.
|
||
|
||
2003-06-05 Nick Clifton <nickc@redhat.com>
|
||
|
||
* frv.cpu (FRintieven): New operand. An even-numbered only
|
||
version of the FRinti operand.
|
||
(FRintjeven): Likewise for FRintj.
|
||
(FRintkeven): Likewise for FRintk.
|
||
(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
|
||
media-quad-arith-sat-semantics, media-quad-arith-sat,
|
||
conditional-media-quad-arith-sat, mdunpackh,
|
||
media-quad-multiply-semantics, media-quad-multiply,
|
||
conditional-media-quad-multiply, media-quad-complex-i,
|
||
media-quad-multiply-acc-semantics, media-quad-multiply-acc,
|
||
conditional-media-quad-multiply-acc, munpackh,
|
||
media-quad-multiply-cross-acc-semantics, mdpackh,
|
||
media-quad-multiply-cross-acc, mbtoh-semantics,
|
||
media-quad-cross-multiply-cross-acc-semantics,
|
||
media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
|
||
media-quad-cross-multiply-acc-semantics, cmbtoh,
|
||
media-quad-cross-multiply-acc, media-quad-complex, mhtob,
|
||
media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
|
||
cmhtob): Use new operands.
|
||
* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
|
||
(parse_even_register): New function.
|
||
|
||
2003-06-03 Nick Clifton <nickc@redhat.com>
|
||
|
||
* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
|
||
immediate value not unsigned.
|
||
|
||
2003-06-03 Andrew Cagney <cagney@redhat.com>
|
||
|
||
Contributed by Red Hat.
|
||
* frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
|
||
and Eric Christopher.
|
||
* frv.opc: New file. Written by Catherine Moore, and Dave
|
||
Brolley.
|
||
* simplify.inc: New file. Written by Doug Evans.
|
||
|
||
2003-05-02 Andrew Cagney <cagney@redhat.com>
|
||
|
||
* New file.
|
||
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|