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2a770cac0f
* tm-m88k.h (REGISTER_CONVERT_TO_RAW): Fix typo. * m88k-tdep.c (next_insn): Lint, cleanup. (store_parm_word): Lint.
857 lines
27 KiB
C
857 lines
27 KiB
C
/* Target-machine dependent code for Motorola 88000 series, for GDB.
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Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "value.h"
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#ifdef USG
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#include <sys/types.h>
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#endif
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#include <sys/param.h>
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#include <sys/dir.h>
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#include <signal.h>
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#include "gdbcore.h"
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#include <sys/user.h>
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#ifndef USER /* added to support BCS ptrace_user */
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#define USER ptrace_user
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#endif
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#include <sys/ioctl.h>
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#include <fcntl.h>
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#include <sys/file.h>
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#include <sys/stat.h>
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#include "symtab.h"
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#include "setjmp.h"
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#include "value.h"
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/* Size of an instruction */
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#define BYTES_PER_88K_INSN 4
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void frame_find_saved_regs ();
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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For us, the frame address is its stack pointer value, so we look up
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the function prologue to determine the caller's sp value, and return it. */
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FRAME_ADDR
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frame_chain (thisframe)
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FRAME thisframe;
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{
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frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
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/* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
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the ADDRESS, of SP_REGNUM. It also depends on the cache of
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frame_find_saved_regs results. */
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if (thisframe->fsr->regs[SP_REGNUM])
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return thisframe->fsr->regs[SP_REGNUM];
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else
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return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
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}
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int
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frameless_function_invocation (frame)
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FRAME frame;
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{
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frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
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/* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
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the ADDRESS, of SP_REGNUM. It also depends on the cache of
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frame_find_saved_regs results. */
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if (frame->fsr->regs[SP_REGNUM])
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return 0; /* Frameful -- return addr saved somewhere */
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else
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return 1; /* Frameless -- no saved return address */
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}
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int
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frame_chain_valid (chain, thisframe)
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CORE_ADDR chain;
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struct frame_info *thisframe;
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{
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return (chain != 0
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&& !inside_entry_file (FRAME_SAVED_PC (thisframe)));
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}
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void
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init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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struct frame_info *fi;
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{
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fi->fsr = 0; /* Not yet allocated */
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fi->args_pointer = 0; /* Unknown */
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fi->locals_pointer = 0; /* Unknown */
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}
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/* Examine an m88k function prologue, recording the addresses at which
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registers are saved explicitly by the prologue code, and returning
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the address of the first instruction after the prologue (but not
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after the instruction at address LIMIT, as explained below).
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LIMIT places an upper bound on addresses of the instructions to be
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examined. If the prologue code scan reaches LIMIT, the scan is
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aborted and LIMIT is returned. This is used, when examining the
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prologue for the current frame, to keep examine_prologue () from
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claiming that a given register has been saved when in fact the
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instruction that saves it has not yet been executed. LIMIT is used
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at other times to stop the scan when we hit code after the true
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function prologue (e.g. for the first source line) which might
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otherwise be mistaken for function prologue.
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The format of the function prologue matched by this routine is
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derived from examination of the source to gcc 1.95, particularly
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the routine output_prologue () in config/out-m88k.c.
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subu r31,r31,n # stack pointer update
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(st rn,r31,offset)? # save incoming regs
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(st.d rn,r31,offset)?
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(addu r30,r31,n)? # frame pointer update
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(pic sequence)? # PIC code prologue
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(or rn,rm,0)? # Move parameters to other regs
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*/
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/* Macros for extracting fields from instructions. */
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#define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
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#define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
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/* Prologue code that handles position-independent-code setup. */
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struct pic_prologue_code {
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unsigned long insn, mask;
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};
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static struct pic_prologue_code pic_prologue_code [] = {
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/* FIXME -- until this is translated to hex, we won't match it... */
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0xffffffff, 0,
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/* or r10,r1,0 (if not saved) */
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/* bsr.n LabN */
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/* or.u r25,r0,const */
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/*LabN: or r25,r25,const2 */
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/* addu r25,r25,1 */
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/* or r1,r10,0 (if not saved) */
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};
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/* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
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is not the address of a valid instruction, the address of the next
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instruction beyond ADDR otherwise. *PWORD1 receives the first word
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of the instruction. PWORD2 is ignored -- a remnant of the original
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i960 version. */
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#define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
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(((addr) < (lim)) ? next_insn (addr, pword1) : 0)
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/* Read the m88k instruction at 'memaddr' and return the address of
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the next instruction after that, or 0 if 'memaddr' is not the
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address of a valid instruction. The instruction
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is stored at 'pword1'. */
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CORE_ADDR
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next_insn (memaddr, pword1)
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unsigned long *pword1;
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CORE_ADDR memaddr;
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{
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unsigned long buf[1];
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*pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
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return memaddr + BYTES_PER_88K_INSN;
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}
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/* Read a register from frames called by us (or from the hardware regs). */
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int
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read_next_frame_reg(fi, regno)
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FRAME fi;
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int regno;
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{
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for (; fi; fi = fi->next) {
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if (regno == SP_REGNUM) return fi->frame;
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else if (fi->fsr->regs[regno])
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return read_memory_integer(fi->fsr->regs[regno], 4);
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}
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return read_register(regno);
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}
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/* Examine the prologue of a function. `ip' points to the first instruction.
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`limit' is the limit of the prologue (e.g. the addr of the first
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linenumber, or perhaps the program counter if we're stepping through).
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`frame_sp' is the stack pointer value in use in this frame.
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`fsr' is a pointer to a frame_saved_regs structure into which we put
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info about the registers saved by this frame.
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`fi' is a struct frame_info pointer; we fill in various fields in it
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to reflect the offsets of the arg pointer and the locals pointer. */
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static CORE_ADDR
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examine_prologue (ip, limit, frame_sp, fsr, fi)
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register CORE_ADDR ip;
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register CORE_ADDR limit;
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FRAME_ADDR frame_sp;
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struct frame_saved_regs *fsr;
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struct frame_info *fi;
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{
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register CORE_ADDR next_ip;
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register int src;
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register struct pic_prologue_code *pcode;
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unsigned int insn1, insn2;
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int size, offset;
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char must_adjust[32]; /* If set, must adjust offsets in fsr */
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int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
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int fp_offset = -1; /* -1 means not set */
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CORE_ADDR frame_fp;
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bzero (must_adjust, sizeof (must_adjust));
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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/* Accept move of incoming registers to other registers, using
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"or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
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We don't have to worry about walking into the first lines of code,
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since the first line number will stop us (assuming we have symbols).
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What we have actually seen is "or r10,r0,r12". */
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#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
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#define OR_MOVE_MASK 0xF800FFFF
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#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
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#define OR_REG_MOVE1_MASK 0xFC1FFFE0
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#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
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#define OR_REG_MOVE2_MASK 0xFC00FFFF
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while (next_ip &&
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((insn1 & OR_MOVE_MASK) == OR_MOVE_INSN ||
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(insn1 & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
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(insn1 & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
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)
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)
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{
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/* We don't care what moves to where. The result of the moves
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has already been reflected in what the compiler tells us is the
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location of these parameters. */
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
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#define SUBU_SP_INSN 0x67ff0000
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#define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
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#define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
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if (next_ip &&
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((insn1 & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
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{
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sp_offset = -SUBU_OFFSET (insn1);
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* The function must start with a stack-pointer adjustment, or
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we don't know WHAT'S going on... */
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if (sp_offset == -1)
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return ip;
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/* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
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This may cause us to mistake the copying of a register
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parameter to the frame for the saving of a callee-saved
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register, but that can't be helped, since with the
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"-fcall-saved" flag, any register can be made callee-saved.
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This probably doesn't matter, since the ``saved'' caller's values of
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non-callee-saved registers are not relevant anyway. */
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#define STD_STACK_INSN 0x201f0000
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#define STD_STACK_MASK 0xfc1f0000
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#define ST_STACK_INSN 0x241f0000
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#define ST_STACK_MASK 0xfc1f0000
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#define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
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#define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
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while (next_ip)
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{
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if ((insn1 & ST_STACK_MASK) == ST_STACK_INSN)
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size = 1;
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else if ((insn1 & STD_STACK_MASK) == STD_STACK_INSN)
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size = 2;
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else
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break;
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src = ST_SRC (insn1);
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offset = ST_OFFSET (insn1);
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while (size--)
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{
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must_adjust[src] = 1;
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fsr->regs[src++] = offset; /* Will be adjusted later */
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offset += 4;
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}
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
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#define ADDU_FP_INSN 0x63df0000
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#define ADDU_FP_MASK 0xffff0000
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#define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
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if (next_ip &&
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((insn1 & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
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{
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fp_offset = ADDU_OFFSET (insn1);
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* Accept the PIC prologue code if present. */
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pcode = pic_prologue_code;
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size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
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/* If return addr is saved, we don't use first or last insn of PICstuff. */
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if (fsr->regs[SRP_REGNUM]) {
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pcode++;
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size-=2;
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}
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while (size-- && next_ip && (pcode->insn == (pcode->mask & insn1)))
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{
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pcode++;
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* Accept moves of parameter registers to other registers, using
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"or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
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We don't have to worry about walking into the first lines of code,
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since the first line number will stop us (assuming we have symbols).
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What gcc actually seems to produce is "or rd,r0,rs". */
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#define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
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#define OR_MOVE_MASK 0xF800FFFF
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#define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
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#define OR_REG_MOVE1_MASK 0xFC1FFFE0
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#define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
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#define OR_REG_MOVE2_MASK 0xFC00FFFF
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while (next_ip &&
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((insn1 & OR_MOVE_MASK) == OR_MOVE_INSN ||
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(insn1 & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
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(insn1 & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
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)
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)
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{
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/* We don't care what moves to where. The result of the moves
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has already been reflected in what the compiler tells us is the
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location of these parameters. */
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ip = next_ip;
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next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
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}
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/* We're done with the prologue. If we don't care about the stack
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frame itself, just return. (Note that fsr->regs has been trashed,
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but the one caller who calls with fi==0 passes a dummy there.) */
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if (fi == 0)
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return ip;
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/* OK, now we have:
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sp_offset original negative displacement of SP
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fp_offset positive displacement between new SP and new FP, or -1
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fsr->regs[0..31] offset from original SP where reg is stored
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must_adjust[0..31] set if corresp. offset was set
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The current SP (frame_sp) might not be the original new SP as set
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by the function prologue, if alloca has been called. This can
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only occur if fp_offset is set, though (the compiler allocates an
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FP when it sees alloca). In that case, we have the FP,
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and can calculate the original new SP from the FP.
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Then, we figure out where the arguments and locals are, and
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relocate the offsets in fsr->regs to absolute addresses. */
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if (fp_offset != -1) {
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/* We have a frame pointer, so get it, and base our calc's on it. */
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frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, FP_REGNUM);
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frame_sp = frame_fp - fp_offset;
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} else {
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/* We have no frame pointer, therefore frame_sp is still the same value
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as set by prologue. But where is the frame itself? */
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if (must_adjust[SRP_REGNUM]) {
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/* Function header saved SRP (r1), the return address. Frame starts
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4 bytes down from where it was saved. */
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frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
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fi->locals_pointer = frame_fp;
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} else {
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/* Function header didn't save SRP (r1), so we are in a leaf fn or
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are otherwise confused. */
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frame_fp = -1;
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}
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}
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/* The locals are relative to the FP (whether it exists as an allocated
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register, or just as an assumed offset from the SP) */
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fi->locals_pointer = frame_fp;
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/* The arguments are just above the SP as it was before we adjusted it
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on entry. */
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fi->args_pointer = frame_sp - sp_offset;
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/* Now that we know the SP value used by the prologue, we know where
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it saved all the registers. */
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for (src = 0; src < 32; src++)
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if (must_adjust[src])
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fsr->regs[src] += frame_sp;
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/* The saved value of the SP is always known. */
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/* (we hope...) */
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if (fsr->regs[SP_REGNUM] != 0
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&& fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
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fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
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fsr->regs[SP_REGNUM],
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frame_sp - sp_offset, sp_offset);
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fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
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return (ip);
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}
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/* Given an ip value corresponding to the start of a function,
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return the ip of the first instruction after the function
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prologue. */
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CORE_ADDR
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skip_prologue (ip)
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CORE_ADDR (ip);
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{
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struct frame_saved_regs saved_regs_dummy;
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struct symtab_and_line sal;
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CORE_ADDR limit;
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sal = find_pc_line (ip, 0);
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limit = (sal.end) ? sal.end : 0xffffffff;
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return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
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(struct frame_info *)0 ));
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}
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
|
||
the address we return for it IS the sp for the next frame.
|
||
|
||
We cache the result of doing this in the frame_cache_obstack, since
|
||
it is fairly expensive. */
|
||
|
||
void
|
||
frame_find_saved_regs (fi, fsr)
|
||
struct frame_info *fi;
|
||
struct frame_saved_regs *fsr;
|
||
{
|
||
register CORE_ADDR next_addr;
|
||
register CORE_ADDR *saved_regs;
|
||
register int regnum;
|
||
register struct frame_saved_regs *cache_fsr;
|
||
extern struct obstack frame_cache_obstack;
|
||
CORE_ADDR ip;
|
||
struct symtab_and_line sal;
|
||
CORE_ADDR limit;
|
||
|
||
if (!fi->fsr)
|
||
{
|
||
cache_fsr = (struct frame_saved_regs *)
|
||
obstack_alloc (&frame_cache_obstack,
|
||
sizeof (struct frame_saved_regs));
|
||
bzero (cache_fsr, sizeof (struct frame_saved_regs));
|
||
fi->fsr = cache_fsr;
|
||
|
||
/* Find the start and end of the function prologue. If the PC
|
||
is in the function prologue, we only consider the part that
|
||
has executed already. */
|
||
|
||
ip = get_pc_function_start (fi->pc);
|
||
sal = find_pc_line (ip, 0);
|
||
limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
|
||
|
||
/* This will fill in fields in *fi as well as in cache_fsr. */
|
||
examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
|
||
}
|
||
|
||
if (fsr)
|
||
*fsr = *fi->fsr;
|
||
}
|
||
|
||
/* Return the address of the locals block for the frame
|
||
described by FI. Returns 0 if the address is unknown.
|
||
NOTE! Frame locals are referred to by negative offsets from the
|
||
argument pointer, so this is the same as frame_args_address(). */
|
||
|
||
CORE_ADDR
|
||
frame_locals_address (fi)
|
||
struct frame_info *fi;
|
||
{
|
||
register FRAME frame;
|
||
struct frame_saved_regs fsr;
|
||
CORE_ADDR ap;
|
||
|
||
if (fi->args_pointer) /* Cached value is likely there. */
|
||
return fi->args_pointer;
|
||
|
||
/* Nope, generate it. */
|
||
|
||
get_frame_saved_regs (fi, &fsr);
|
||
|
||
return fi->args_pointer;
|
||
}
|
||
|
||
/* Return the address of the argument block for the frame
|
||
described by FI. Returns 0 if the address is unknown. */
|
||
|
||
CORE_ADDR
|
||
frame_args_address (fi)
|
||
struct frame_info *fi;
|
||
{
|
||
register FRAME frame;
|
||
struct frame_saved_regs fsr;
|
||
CORE_ADDR ap;
|
||
|
||
if (fi->args_pointer) /* Cached value is likely there. */
|
||
return fi->args_pointer;
|
||
|
||
/* Nope, generate it. */
|
||
|
||
get_frame_saved_regs (fi, &fsr);
|
||
|
||
return fi->args_pointer;
|
||
}
|
||
|
||
/* Return the saved PC from this frame.
|
||
|
||
If the frame has a memory copy of SRP_REGNUM, use that. If not,
|
||
just use the register SRP_REGNUM itself. */
|
||
|
||
CORE_ADDR
|
||
frame_saved_pc (frame)
|
||
FRAME frame;
|
||
{
|
||
return read_next_frame_reg(frame, SRP_REGNUM);
|
||
}
|
||
|
||
|
||
#if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
|
||
you lose
|
||
#else /* Host and target byte order the same. */
|
||
#define SINGLE_EXP_BITS 8
|
||
#define DOUBLE_EXP_BITS 11
|
||
int
|
||
IEEE_isNAN(fp, len)
|
||
int *fp, len;
|
||
/* fp points to a single precision OR double precision
|
||
* floating point value; len is the number of bytes, either 4 or 8.
|
||
* Returns 1 iff fp points to a valid IEEE floating point number.
|
||
* Returns 0 if fp points to a denormalized number or a NaN
|
||
*/
|
||
{
|
||
int exponent;
|
||
if (len == 4)
|
||
{
|
||
exponent = *fp;
|
||
exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
|
||
return ((exponent == -1) || (! exponent && *fp));
|
||
}
|
||
else if (len == 8)
|
||
{
|
||
exponent = *(fp+1);
|
||
exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
|
||
return ((exponent == -1) || (! exponent && *fp * *(fp+1)));
|
||
}
|
||
else return 1;
|
||
}
|
||
#endif /* Host and target byte order the same. */
|
||
|
||
static int
|
||
pushed_size (prev_words, v)
|
||
int prev_words;
|
||
struct value *v;
|
||
{
|
||
switch (TYPE_CODE (VALUE_TYPE (v)))
|
||
{
|
||
case TYPE_CODE_VOID: /* Void type (values zero length) */
|
||
|
||
return 0; /* That was easy! */
|
||
|
||
case TYPE_CODE_PTR: /* Pointer type */
|
||
case TYPE_CODE_ENUM: /* Enumeration type */
|
||
case TYPE_CODE_INT: /* Integer type */
|
||
case TYPE_CODE_REF: /* C++ Reference types */
|
||
case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
|
||
|
||
return 1;
|
||
|
||
case TYPE_CODE_FLT: /* Floating type */
|
||
|
||
if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
|
||
return 1;
|
||
else
|
||
/* Assume that it must be a double. */
|
||
if (prev_words & 1) /* at an odd-word boundary */
|
||
return 3; /* round to 8-byte boundary */
|
||
else
|
||
return 2;
|
||
|
||
case TYPE_CODE_STRUCT: /* C struct or Pascal record */
|
||
case TYPE_CODE_UNION: /* C union or Pascal variant part */
|
||
|
||
return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
|
||
|
||
case TYPE_CODE_FUNC: /* Function type */
|
||
case TYPE_CODE_SET: /* Pascal sets */
|
||
case TYPE_CODE_RANGE: /* Range (integers within bounds) */
|
||
case TYPE_CODE_STRING: /* String type */
|
||
case TYPE_CODE_MEMBER: /* Member type */
|
||
case TYPE_CODE_METHOD: /* Method type */
|
||
/* Don't know how to pass these yet. */
|
||
|
||
case TYPE_CODE_UNDEF: /* Not used; catches errors */
|
||
default:
|
||
abort ();
|
||
}
|
||
}
|
||
|
||
static void
|
||
store_parm_word (address, val)
|
||
CORE_ADDR address;
|
||
int val;
|
||
{
|
||
write_memory (address, (char *)&val, 4);
|
||
}
|
||
|
||
static int
|
||
store_parm (prev_words, left_parm_addr, v)
|
||
unsigned int prev_words;
|
||
CORE_ADDR left_parm_addr;
|
||
struct value *v;
|
||
{
|
||
CORE_ADDR start = left_parm_addr + (prev_words * 4);
|
||
int *val_addr = (int *)VALUE_CONTENTS(v);
|
||
|
||
switch (TYPE_CODE (VALUE_TYPE (v)))
|
||
{
|
||
case TYPE_CODE_VOID: /* Void type (values zero length) */
|
||
|
||
return 0;
|
||
|
||
case TYPE_CODE_PTR: /* Pointer type */
|
||
case TYPE_CODE_ENUM: /* Enumeration type */
|
||
case TYPE_CODE_INT: /* Integer type */
|
||
case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
|
||
case TYPE_CODE_REF: /* C++ Reference types */
|
||
|
||
store_parm_word (start, *val_addr);
|
||
return 1;
|
||
|
||
case TYPE_CODE_FLT: /* Floating type */
|
||
|
||
if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
|
||
{
|
||
store_parm_word (start, *val_addr);
|
||
return 1;
|
||
}
|
||
else
|
||
{
|
||
store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
|
||
store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
|
||
return 2 + (prev_words & 1);
|
||
}
|
||
|
||
case TYPE_CODE_STRUCT: /* C struct or Pascal record */
|
||
case TYPE_CODE_UNION: /* C union or Pascal variant part */
|
||
|
||
{
|
||
unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
|
||
unsigned int word;
|
||
|
||
for (word = 0; word < words; word++)
|
||
store_parm_word (start + (word * 4), val_addr[word]);
|
||
return words;
|
||
}
|
||
|
||
default:
|
||
abort ();
|
||
}
|
||
}
|
||
|
||
/* This routine sets up all of the parameter values needed to make a pseudo
|
||
call. The name "push_parameters" is a misnomer on some archs,
|
||
because (on the m88k) most parameters generally end up being passed in
|
||
registers rather than on the stack. In this routine however, we do
|
||
end up storing *all* parameter values onto the stack (even if we will
|
||
realize later that some of these stores were unnecessary). */
|
||
|
||
#define FIRST_PARM_REGNUM 2
|
||
|
||
void
|
||
push_parameters (return_type, struct_conv, nargs, args)
|
||
struct type *return_type;
|
||
int struct_conv;
|
||
int nargs;
|
||
value *args;
|
||
{
|
||
int parm_num;
|
||
unsigned int p_words = 0;
|
||
CORE_ADDR left_parm_addr;
|
||
|
||
/* Start out by creating a space for the return value (if need be). We
|
||
only need to do this if the return value is a struct or union. If we
|
||
do make a space for a struct or union return value, then we must also
|
||
arrange for the base address of that space to go into r12, which is the
|
||
standard place to pass the address of the return value area to the
|
||
callee. Note that only structs and unions are returned in this fashion.
|
||
Ints, enums, pointers, and floats are returned into r2. Doubles are
|
||
returned into the register pair {r2,r3}. Note also that the space
|
||
reserved for a struct or union return value only has to be word aligned
|
||
(not double-word) but it is double-word aligned here anyway (just in
|
||
case that becomes important someday). */
|
||
|
||
switch (TYPE_CODE (return_type))
|
||
{
|
||
case TYPE_CODE_STRUCT:
|
||
case TYPE_CODE_UNION:
|
||
{
|
||
int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
|
||
CORE_ADDR rv_addr;
|
||
|
||
rv_addr = read_register (SP_REGNUM) - return_bytes;
|
||
|
||
write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
|
||
write_register (SRA_REGNUM, rv_addr);/* set return value register */
|
||
}
|
||
}
|
||
|
||
/* Here we make a pre-pass on the whole parameter list to figure out exactly
|
||
how many words worth of stuff we are going to pass. */
|
||
|
||
for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
|
||
p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
|
||
|
||
/* Now, check to see if we have to round up the number of parameter words
|
||
to get up to the next 8-bytes boundary. This may be necessary because
|
||
of the software convention to always keep the stack aligned on an 8-byte
|
||
boundary. */
|
||
|
||
if (p_words & 1)
|
||
p_words++; /* round to 8-byte boundary */
|
||
|
||
/* Now figure out the absolute address of the leftmost parameter, and update
|
||
the stack pointer to point at that address. */
|
||
|
||
left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
|
||
write_register (SP_REGNUM, left_parm_addr);
|
||
|
||
/* Now we can go through all of the parameters (in left-to-right order)
|
||
and write them to their parameter stack slots. Note that we are not
|
||
really "pushing" the parameter values. The stack space for these values
|
||
was already allocated above. Now we are just filling it up. */
|
||
|
||
for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
|
||
p_words +=
|
||
store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
|
||
|
||
/* Now that we are all done storing the parameter values into the stack, we
|
||
must go back and load up the parameter registers with the values from the
|
||
corresponding stack slots. Note that in the two cases of (a) gaps in the
|
||
parameter word sequence causes by (otherwise) misaligned doubles, and (b)
|
||
slots correcponding to structs or unions, the work we do here in loading
|
||
some parameter registers may be unnecessary, but who cares? */
|
||
|
||
for (p_words = 0; p_words < 8; p_words++)
|
||
{
|
||
write_register (FIRST_PARM_REGNUM + p_words,
|
||
read_memory_integer (left_parm_addr + (p_words * 4), 4));
|
||
}
|
||
}
|
||
|
||
void
|
||
pop_frame ()
|
||
{
|
||
error ("Feature not implemented for the m88k yet.");
|
||
return;
|
||
}
|
||
|
||
void
|
||
collect_returned_value (rval, value_type, struct_return, nargs, args)
|
||
value *rval;
|
||
struct type *value_type;
|
||
int struct_return;
|
||
int nargs;
|
||
value *args;
|
||
{
|
||
char retbuf[REGISTER_BYTES];
|
||
|
||
bcopy (registers, retbuf, REGISTER_BYTES);
|
||
*rval = value_being_returned (value_type, retbuf, struct_return);
|
||
return;
|
||
}
|
||
|
||
#if 0
|
||
/* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
|
||
/* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
|
||
is not a good place for it). Return the address at which the instruction
|
||
got stuffed, or zero if we were unable to stuff it anywhere. */
|
||
|
||
CORE_ADDR
|
||
push_breakpoint ()
|
||
{
|
||
static char breakpoint_insn[] = BREAKPOINT;
|
||
extern CORE_ADDR text_end; /* of inferior */
|
||
static char readback_buffer[] = BREAKPOINT;
|
||
int i;
|
||
|
||
/* With a little bit of luck, we can just stash the breakpoint instruction
|
||
in the word just beyond the end of normal text space. For systems on
|
||
which the hardware will not allow us to execute out of the stack segment,
|
||
we have to hope that we *are* at least allowed to effectively extend the
|
||
text segment by one word. If the actual end of user's the text segment
|
||
happens to fall right at a page boundary this trick may fail. Note that
|
||
we check for this by reading after writing, and comparing in order to
|
||
be sure that the write worked. */
|
||
|
||
write_memory (text_end, &breakpoint_insn, 4);
|
||
|
||
/* Fill the readback buffer with some garbage which is certain to be
|
||
unequal to the breakpoint insn. That way we can tell if the
|
||
following read doesn't actually succeed. */
|
||
|
||
for (i = 0; i < sizeof (readback_buffer); i++)
|
||
readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
|
||
|
||
/* Now check that the breakpoint insn was successfully installed. */
|
||
|
||
read_memory (text_end, readback_buffer, sizeof (readback_buffer));
|
||
for (i = 0; i < sizeof (readback_buffer); i++)
|
||
if (readback_buffer[i] != breakpoint_insn[i])
|
||
return 0; /* Failed to install! */
|
||
|
||
return text_end;
|
||
}
|
||
#endif
|