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86bc60ebf4
* gencode.c: Replace 'Hitachi' with 'Renesas'.
(op tab): Add new instructions for sh4a, DBR, SBR.
(expand_opcode): Add handling for new movxy combinations.
(gensym_caselist): Ditto.
(expand_ppi_movxy): Remove movx/movy expansions,
now handled in expand_opcode.
(gensym): Add some helpful macros.
(expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
instead of 8-bit table (some insns are ambiguous to 8 bits).
(ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.
* interp.c: Replace 'Hitachi' with 'Renesas'.
(union saved_state_type): Add dbr, sgr, ldst.
(get_loop_bounds_ext): New function.
(init_dsp): Add bfd_mach_sh4al_dsp.
(sim_resume): Handle extended loop bounds.