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darling-gdb/sim/mips
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Jim Blandy c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to 
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
..
acconfig.h
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ChangeLog
* mips.igen (CFC1, CTC1): Pass the correct register numbers to
2001-04-12 14:53:20 +00:00
config.in
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configure
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configure.in
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dv-tx3904cpu.c
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dv-tx3904irc.c
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dv-tx3904sio.c
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dv-tx3904tmr.c
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interp.c
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m16.dc
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m16.igen
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m16run.c
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Makefile.in
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mips.dc
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mips.igen
* mips.igen (CFC1, CTC1): Pass the correct register numbers to
2001-04-12 14:53:20 +00:00
sim-main.c
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sim-main.h
* mips.igen (CFC1, CTC1): Pass the correct register numbers to
2001-04-12 14:53:20 +00:00
tconfig.in
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tx.igen
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vr.igen
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