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darling-gdb/gdb/armnbsd-nat.c
Pedro Alves 28439f5ef7 * corelow.c (get_core_registers): Adjust. 
(core_file_thread_alive): Rename to...
	(core_thread_alive): ... this.
	(core_pid_to_str): Try gdbarch_core_pid_to_str first.
	(init_core_ops): Adjust.
	(coreops_suppress_target): Delete.
	(_initialize_corelow): Unconditionally add core_ops.
	* procfs.c: Include "inf-child.h".
	(procfs_ops): Delete.
	(init_procfs_ops): Delete.  Reimplement as...
	(procfs_target): ... this, inheriting from inf-child.
	(procfs_attach, procfs_detach, procfs_fetch_registers): Adjust.
	(procfs_prepare_to_store): Delete.
	(procfs_store_registers, procfs_resume): Adjust.
	(procfs_open): Delete.
	(procfs_suppress_run): Delete.
	(procfs_can_run): Delete.
	(procfs_mourn_inferior): Adjust.
	(procfs_init_inferior): Add target_ops parameter.  Adjust.
	(procfs_create_inferior): Don't pass procfs_init_inferior to
	fork_inferior.  Instead call it after fork_inferior returns.
	(procfs_find_new_threads): Adjust.
	(_initialize_procfs): Adjust to use procfs_target instead of
	init_procfs_ops.
	* sol-thread.c (orig_core_ops, sol_core_ops): Delete.
	(lwp_to_thread): Use target_thread_alive.
	(sol_thread_open): Delete.
	(sol_thread_attach): Delete.
	(sol_thread_detach, sol_thread_resume, sol_thread_wait)
	(sol_thread_fetch_registers, sol_thread_store_registers): Adjust
	to use find_target_beneath.
	(sol_thread_prepare_to_store, sol_thread_xfer_memory): Delete.
	(sol_thread_xfer_partial): Adjust to use find_target_beneath.
	(sol_thread_files_info, sol_thread_kill_inferior): Delete.
	(check_for_thread_db): New.
	(sol_thread_notice_signals, sol_thread_create_inferior): Delete.
	(sol_thread_new_objfile): Call check_for_thread_db.
	(sol_thread_mourn_inferior): Adjust to use find_target_beneath.
	(sol_thread_can_run): Delete.
	(sol_thread_alive): Adjust to use find_target_beneath.
	(sol_thread_stop): Delete.
	(rw_common): Use target_write_memory or target_read_memory.
	(ps_lgetregs, ps_lgetfpregs): Use target_fetch_registers.
	(ps_lsetregs, ps_lsetfpregs): Use target_store_registers.
	(solaris_pid_to_str): Remove check for libthread_db initialization
	failing.
	(sol_find_new_threads): Remove check for libthread_db
	initialization failing, or for an invalid inferior_ptid.  Adjust
	to use find_target_beneath.
	(sol_core_open, sol_core_close, sol_core_detach,
	sol_core_files_info, sol_find_memory_regions,
	sol_make_note_section, ignore): Delete.
	(init_sol_thread_ops): Make it a thread_stratum target.  Remove
	unneeded callback settings.
	(init_sol_core_ops): Delete.
	(_initialize_sol_thread): No longer call init_sol_core_ops, set
	procfs_suppress_run, or hack with core_ops.

	* target.h (struct target_ops): Add a target_ops * parameter to
	to_resume, to_fetch_registers, to_store_registers, to_thread_alive
	and to_find_new_threads.
	(target_fetch_registers, target_store_registers)
	(target_thread_alive, target_find_new_threads): Redeclare as
	function.

	* target.c (update_current_target): Do not inherit or de_fault
	to_resume, to_fetch_registers, to_store_registers,
	to_thread_alive, to_find_new_threads.
	(target_resume): Adjust.
	(target_thread_alive, target_find_new_threads): New.
	(debug_to_resume, debug_to_fetch_registers): Delete.
	(target_fetch_registers): New.
	(debug_to_store_registers): Delete.
	(target_store_registers): New.
	(debug_to_thread_alive, debug_to_find_new_threads): Delete.
	(setup_target_debug): Adjust.

	* gdbcore.h (core_ops): Delete declaration.

	* inf-ptrace.c, linux-nat.c, remote.c, amd64-linux-nat.c,
	inf-child.c, linux-thread-db.c, bsd-uthread.c, inf-ttrace.c,
	i386-sol2-tdep.c, darwin-nat.c, gnu-nat.c, go32-nat.c,
	hpux-thread.c, i386-linux-nat.c, i386fbsd-nat.c, monitor.c,
	nto-procfs.c, remote-m32r-sdi.c, remote-mips.c, windows-nat.c,
	alphabsd-nat.c, amd64bsd-nat.c, arm-linux-nat.c, armnbsd-nat.c,
	bsd-kvm.c, hppa-hpux-nat.c, hppa-linux-nat.c, hppabsd-nat.c,
	hppanbsd-nat.c, i386-darwin-nat.c, i386bsd-nat.c,
	ia64-linux-nat.c, m32r-linux-nat.c, m68kbsd-nat.c,
	m68klinux-nat.c, m88kbsd-nat.c, mips-linux-nat.c,
	mips64obsd-nat.c, mipsnbsd-nat.c, ppc-linux-nat.c, ppcnbsd-nat.c,
	ppcobsd-nat.c, remote-sim.c, rs6000-nat.c, s390-nat.c,
	shnbsd-nat.c, sparc-nat.c, sparc-nat.h, spu-linux-nat.c,
	vaxbsd-nat.c, xtensa-linux-nat.c: Adjust to target_ops changes.

	* gdbarch.sh (core_pid_to_str): New gdbarch callback.
	* gdbarch.h, gdbarch.c: Regenerate.

	* sol2-tdep.c: Include "inferior.h".
	(sol2_core_pid_to_str): New.
	* sol2-tdep.h (sol2_core_pid_to_str): Declare.

	* amd64-sol2-tdep.c (amd64_sol2_init_abi): Set it.
	* sparc-sol2-tdep.c (sparc32_sol2_init_abi): Set it.
	* sparc64-sol2-tdep.c (sparc64_sol2_init_abi): Set it.
	* i386-sol2-tdep.c (i386_sol2_init_abi): Set it.
2009-02-23 00:03:50 +00:00

505 lines
12 KiB
C
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/* Native-dependent code for BSD Unix running on ARM's, for GDB.
Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002, 2004, 2007,
2008, 2009 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "gdbcore.h"
#include "inferior.h"
#include "regcache.h"
#include "target.h"
#include "gdb_string.h"
#include <sys/types.h>
#include <sys/ptrace.h>
#include <machine/reg.h>
#include <machine/frame.h>
#include "arm-tdep.h"
#include "inf-ptrace.h"
extern int arm_apcs_32;
static void
arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
{
int regno;
CORE_ADDR r_pc;
/* Integer registers. */
for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
regcache_raw_supply (regcache, ARM_SP_REGNUM,
(char *) &gregset->r_sp);
regcache_raw_supply (regcache, ARM_LR_REGNUM,
(char *) &gregset->r_lr);
/* This is ok: we're running native... */
r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc);
regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) &gregset->r_cpsr);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) &gregset->r_pc);
}
static void
arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
{
int regno;
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
regcache_raw_supply (regcache, regno,
(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
(char *) &fparegset->fpr_fpsr);
}
static void
fetch_register (struct regcache *regcache, int regno)
{
struct reg inferior_registers;
int ret;
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch general register"));
return;
}
switch (regno)
{
case ARM_SP_REGNUM:
regcache_raw_supply (regcache, ARM_SP_REGNUM,
(char *) &inferior_registers.r_sp);
break;
case ARM_LR_REGNUM:
regcache_raw_supply (regcache, ARM_LR_REGNUM,
(char *) &inferior_registers.r_lr);
break;
case ARM_PC_REGNUM:
/* This is ok: we're running native... */
inferior_registers.r_pc = gdbarch_addr_bits_remove
(get_regcache_arch (regcache),
inferior_registers.r_pc);
regcache_raw_supply (regcache, ARM_PC_REGNUM,
(char *) &inferior_registers.r_pc);
break;
case ARM_PS_REGNUM:
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) &inferior_registers.r_cpsr);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) &inferior_registers.r_pc);
break;
default:
regcache_raw_supply (regcache, regno,
(char *) &inferior_registers.r[regno]);
break;
}
}
static void
fetch_regs (struct regcache *regcache)
{
struct reg inferior_registers;
int ret;
int regno;
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch general registers"));
return;
}
arm_supply_gregset (regcache, &inferior_registers);
}
static void
fetch_fp_register (struct regcache *regcache, int regno)
{
struct fpreg inferior_fp_registers;
int ret;
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch floating-point register"));
return;
}
switch (regno)
{
case ARM_FPS_REGNUM:
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
(char *) &inferior_fp_registers.fpr_fpsr);
break;
default:
regcache_raw_supply (regcache, regno,
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
break;
}
}
static void
fetch_fp_regs (struct regcache *regcache)
{
struct fpreg inferior_fp_registers;
int ret;
int regno;
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch general registers"));
return;
}
arm_supply_fparegset (regcache, &inferior_fp_registers);
}
static void
armnbsd_fetch_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
if (regno >= 0)
{
if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
fetch_register (regcache, regno);
else
fetch_fp_register (regcache, regno);
}
else
{
fetch_regs (regcache);
fetch_fp_regs (regcache);
}
}
static void
store_register (const struct regcache *regcache, int regno)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct reg inferior_registers;
int ret;
ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch general registers"));
return;
}
switch (regno)
{
case ARM_SP_REGNUM:
regcache_raw_collect (regcache, ARM_SP_REGNUM,
(char *) &inferior_registers.r_sp);
break;
case ARM_LR_REGNUM:
regcache_raw_collect (regcache, ARM_LR_REGNUM,
(char *) &inferior_registers.r_lr);
break;
case ARM_PC_REGNUM:
if (arm_apcs_32)
regcache_raw_collect (regcache, ARM_PC_REGNUM,
(char *) &inferior_registers.r_pc);
else
{
unsigned pc_val;
regcache_raw_collect (regcache, ARM_PC_REGNUM,
(char *) &pc_val);
pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
inferior_registers.r_pc ^= gdbarch_addr_bits_remove
(gdbarch, inferior_registers.r_pc);
inferior_registers.r_pc |= pc_val;
}
break;
case ARM_PS_REGNUM:
if (arm_apcs_32)
regcache_raw_collect (regcache, ARM_PS_REGNUM,
(char *) &inferior_registers.r_cpsr);
else
{
unsigned psr_val;
regcache_raw_collect (regcache, ARM_PS_REGNUM,
(char *) &psr_val);
psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
inferior_registers.r_pc = gdbarch_addr_bits_remove
(gdbarch, inferior_registers.r_pc);
inferior_registers.r_pc |= psr_val;
}
break;
default:
regcache_raw_collect (regcache, regno,
(char *) &inferior_registers.r[regno]);
break;
}
ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
if (ret < 0)
warning (_("unable to write register %d to inferior"), regno);
}
static void
store_regs (const struct regcache *regcache)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct reg inferior_registers;
int ret;
int regno;
for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
regcache_raw_collect (regcache, regno,
(char *) &inferior_registers.r[regno]);
regcache_raw_collect (regcache, ARM_SP_REGNUM,
(char *) &inferior_registers.r_sp);
regcache_raw_collect (regcache, ARM_LR_REGNUM,
(char *) &inferior_registers.r_lr);
if (arm_apcs_32)
{
regcache_raw_collect (regcache, ARM_PC_REGNUM,
(char *) &inferior_registers.r_pc);
regcache_raw_collect (regcache, ARM_PS_REGNUM,
(char *) &inferior_registers.r_cpsr);
}
else
{
unsigned pc_val;
unsigned psr_val;
regcache_raw_collect (regcache, ARM_PC_REGNUM,
(char *) &pc_val);
regcache_raw_collect (regcache, ARM_PS_REGNUM,
(char *) &psr_val);
pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
inferior_registers.r_pc = pc_val | psr_val;
}
ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_registers, 0);
if (ret < 0)
warning (_("unable to store general registers"));
}
static void
store_fp_register (const struct regcache *regcache, int regno)
{
struct fpreg inferior_fp_registers;
int ret;
ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
if (ret < 0)
{
warning (_("unable to fetch floating-point registers"));
return;
}
switch (regno)
{
case ARM_FPS_REGNUM:
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
(char *) &inferior_fp_registers.fpr_fpsr);
break;
default:
regcache_raw_collect (regcache, regno,
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
break;
}
ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
if (ret < 0)
warning (_("unable to write register %d to inferior"), regno);
}
static void
store_fp_regs (const struct regcache *regcache)
{
struct fpreg inferior_fp_registers;
int ret;
int regno;
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
regcache_raw_collect (regcache, regno,
(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
regcache_raw_collect (regcache, ARM_FPS_REGNUM,
(char *) &inferior_fp_registers.fpr_fpsr);
ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
if (ret < 0)
warning (_("unable to store floating-point registers"));
}
static void
armnbsd_store_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
if (regno >= 0)
{
if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
store_register (regcache, regno);
else
store_fp_register (regcache, regno);
}
else
{
store_regs (regcache);
store_fp_regs (regcache);
}
}
struct md_core
{
struct reg intreg;
struct fpreg freg;
};
static void
fetch_core_registers (struct regcache *regcache,
char *core_reg_sect, unsigned core_reg_size,
int which, CORE_ADDR ignore)
{
struct md_core *core_reg = (struct md_core *) core_reg_sect;
int regno;
CORE_ADDR r_pc;
arm_supply_gregset (regcache, &core_reg->intreg);
arm_supply_fparegset (regcache, &core_reg->freg);
}
static void
fetch_elfcore_registers (struct regcache *regcache,
char *core_reg_sect, unsigned core_reg_size,
int which, CORE_ADDR ignore)
{
struct reg gregset;
struct fpreg fparegset;
switch (which)
{
case 0: /* Integer registers. */
if (core_reg_size != sizeof (struct reg))
warning (_("wrong size of register set in core file"));
else
{
/* The memcpy may be unnecessary, but we can't really be sure
of the alignment of the data in the core file. */
memcpy (&gregset, core_reg_sect, sizeof (gregset));
arm_supply_gregset (regcache, &gregset);
}
break;
case 2:
if (core_reg_size != sizeof (struct fpreg))
warning (_("wrong size of FPA register set in core file"));
else
{
/* The memcpy may be unnecessary, but we can't really be sure
of the alignment of the data in the core file. */
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
arm_supply_fparegset (regcache, &fparegset);
}
break;
default:
/* Don't know what kind of register request this is; just ignore it. */
break;
}
}
static struct core_fns arm_netbsd_core_fns =
{
bfd_target_unknown_flavour, /* core_flovour. */
default_check_format, /* check_format. */
default_core_sniffer, /* core_sniffer. */
fetch_core_registers, /* core_read_registers. */
NULL
};
static struct core_fns arm_netbsd_elfcore_fns =
{
bfd_target_elf_flavour, /* core_flovour. */
default_check_format, /* check_format. */
default_core_sniffer, /* core_sniffer. */
fetch_elfcore_registers, /* core_read_registers. */
NULL
};
void
_initialize_arm_netbsd_nat (void)
{
struct target_ops *t;
t = inf_ptrace_target ();
t->to_fetch_registers = armnbsd_fetch_registers;
t->to_store_registers = armnbsd_store_registers;
add_target (t);
deprecated_add_core_fns (&arm_netbsd_core_fns);
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
}
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