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https://github.com/darlinghq/darling-gdb.git
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396 lines
9.4 KiB
C
396 lines
9.4 KiB
C
/* Disassemble D30V instructions.
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Copyright 1997, 1998, 2000, 2001, 2005 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "opcode/d30v.h"
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#include "dis-asm.h"
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#include "opintl.h"
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#define PC_MASK 0xFFFFFFFF
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/* Return 0 if lookup fails,
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1 if found and only one form,
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2 if found and there are short and long forms. */
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static int
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lookup_opcode (struct d30v_insn *insn, long num, int is_long)
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{
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int i = 0, index;
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struct d30v_format *f;
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struct d30v_opcode *op = (struct d30v_opcode *) d30v_opcode_table;
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int op1 = (num >> 25) & 0x7;
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int op2 = (num >> 20) & 0x1f;
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int mod = (num >> 18) & 0x3;
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/* Find the opcode. */
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do
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{
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if ((op->op1 == op1) && (op->op2 == op2))
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break;
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op++;
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}
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while (op->name);
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if (!op || !op->name)
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return 0;
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while (op->op1 == op1 && op->op2 == op2)
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{
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/* Scan through all the formats for the opcode. */
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index = op->format[i++];
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do
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{
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f = (struct d30v_format *) &d30v_format_table[index];
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while (f->form == index)
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{
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if ((!is_long || f->form >= LONG) && (f->modifier == mod))
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{
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insn->form = f;
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break;
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}
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f++;
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}
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if (insn->form)
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break;
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}
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while ((index = op->format[i++]) != 0);
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if (insn->form)
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break;
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op++;
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i = 0;
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}
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if (insn->form == NULL)
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return 0;
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insn->op = op;
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insn->ecc = (num >> 28) & 0x7;
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if (op->format[1])
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return 2;
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else
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return 1;
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}
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static int
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extract_value (long long num, struct d30v_operand *oper, int is_long)
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{
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int val;
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int shift = 12 - oper->position;
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int mask = (0xFFFFFFFF >> (32 - oper->bits));
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if (is_long)
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{
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if (oper->bits == 32)
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/* Piece together 32-bit constant. */
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val = ((num & 0x3FFFF)
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| ((num & 0xFF00000) >> 2)
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| ((num & 0x3F00000000LL) >> 6));
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else
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val = (num >> (32 + shift)) & mask;
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}
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else
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val = (num >> shift) & mask;
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if (oper->flags & OPERAND_SHIFT)
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val <<= 3;
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return val;
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}
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static void
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print_insn (struct disassemble_info *info,
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bfd_vma memaddr,
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long long num,
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struct d30v_insn *insn,
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int is_long,
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int show_ext)
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{
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int val, opnum, need_comma = 0;
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struct d30v_operand *oper;
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int i, match, opind = 0, need_paren = 0, found_control = 0;
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(*info->fprintf_func) (info->stream, "%s", insn->op->name);
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/* Check for CMP or CMPU. */
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if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME)
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{
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opind++;
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val =
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extract_value (num,
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(struct d30v_operand *) &d30v_operand_table[insn->form->operands[0]],
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is_long);
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(*info->fprintf_func) (info->stream, "%s", d30v_cc_names[val]);
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}
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/* Add in ".s" or ".l". */
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if (show_ext == 2)
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{
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if (is_long)
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(*info->fprintf_func) (info->stream, ".l");
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else
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(*info->fprintf_func) (info->stream, ".s");
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}
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if (insn->ecc)
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(*info->fprintf_func) (info->stream, "/%s", d30v_ecc_names[insn->ecc]);
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(*info->fprintf_func) (info->stream, "\t");
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while ((opnum = insn->form->operands[opind++]) != 0)
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{
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int bits;
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oper = (struct d30v_operand *) &d30v_operand_table[opnum];
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bits = oper->bits;
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if (oper->flags & OPERAND_SHIFT)
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bits += 3;
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if (need_comma
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&& oper->flags != OPERAND_PLUS
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&& oper->flags != OPERAND_MINUS)
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{
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need_comma = 0;
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(*info->fprintf_func) (info->stream, ", ");
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}
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if (oper->flags == OPERAND_ATMINUS)
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{
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(*info->fprintf_func) (info->stream, "@-");
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continue;
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}
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if (oper->flags == OPERAND_MINUS)
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{
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(*info->fprintf_func) (info->stream, "-");
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continue;
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}
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if (oper->flags == OPERAND_PLUS)
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{
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(*info->fprintf_func) (info->stream, "+");
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continue;
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}
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if (oper->flags == OPERAND_ATSIGN)
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{
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(*info->fprintf_func) (info->stream, "@");
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continue;
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}
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if (oper->flags == OPERAND_ATPAR)
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{
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(*info->fprintf_func) (info->stream, "@(");
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need_paren = 1;
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continue;
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}
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if (oper->flags == OPERAND_SPECIAL)
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continue;
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val = extract_value (num, oper, is_long);
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if (oper->flags & OPERAND_REG)
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{
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match = 0;
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if (oper->flags & OPERAND_CONTROL)
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{
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struct d30v_operand *oper3 =
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(struct d30v_operand *) &d30v_operand_table[insn->form->operands[2]];
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int id = extract_value (num, oper3, is_long);
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found_control = 1;
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switch (id)
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{
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case 0:
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val |= OPERAND_CONTROL;
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break;
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case 1:
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case 2:
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val = OPERAND_CONTROL + MAX_CONTROL_REG + id;
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break;
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case 3:
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val |= OPERAND_FLAG;
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break;
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default:
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fprintf (stderr, "illegal id (%d)\n", id);
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}
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}
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else if (oper->flags & OPERAND_ACC)
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val |= OPERAND_ACC;
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else if (oper->flags & OPERAND_FLAG)
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val |= OPERAND_FLAG;
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for (i = 0; i < reg_name_cnt (); i++)
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{
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if (val == pre_defined_registers[i].value)
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{
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if (pre_defined_registers[i].pname)
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(*info->fprintf_func)
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(info->stream, "%s", pre_defined_registers[i].pname);
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else
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(*info->fprintf_func)
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(info->stream, "%s", pre_defined_registers[i].name);
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match = 1;
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break;
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}
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}
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if (match == 0)
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{
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/* This would only get executed if a register was not in
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the register table. */
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(*info->fprintf_func)
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(info->stream, _("<unknown register %d>"), val & 0x3F);
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}
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}
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/* repeati has a relocation, but its first argument is a plain
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immediate. OTOH instructions like djsri have a pc-relative
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delay target, but an absolute jump target. Therefore, a test
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of insn->op->reloc_flag is not specific enough; we must test
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if the actual operand we are handling now is pc-relative. */
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else if (oper->flags & OPERAND_PCREL)
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{
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int neg = 0;
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/* IMM6S3 is unsigned. */
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if (oper->flags & OPERAND_SIGNED || bits == 32)
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{
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long max;
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max = (1 << (bits - 1));
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if (val & max)
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{
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if (bits == 32)
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val = -val;
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else
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val = -val & ((1 << bits) - 1);
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neg = 1;
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}
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}
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if (neg)
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{
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(*info->fprintf_func) (info->stream, "-%x\t(", val);
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(*info->print_address_func) ((memaddr - val) & PC_MASK, info);
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(*info->fprintf_func) (info->stream, ")");
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}
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else
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{
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(*info->fprintf_func) (info->stream, "%x\t(", val);
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(*info->print_address_func) ((memaddr + val) & PC_MASK, info);
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(*info->fprintf_func) (info->stream, ")");
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}
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}
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else if (insn->op->reloc_flag == RELOC_ABS)
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{
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(*info->print_address_func) (val, info);
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}
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else
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{
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if (oper->flags & OPERAND_SIGNED)
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{
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int max = (1 << (bits - 1));
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if (val & max)
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{
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val = -val;
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if (bits < 32)
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val &= ((1 << bits) - 1);
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(*info->fprintf_func) (info->stream, "-");
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}
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}
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(*info->fprintf_func) (info->stream, "0x%x", val);
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}
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/* If there is another operand, then write a comma and space. */
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if (insn->form->operands[opind] && !(found_control && opind == 2))
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need_comma = 1;
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}
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if (need_paren)
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(*info->fprintf_func) (info->stream, ")");
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}
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int
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print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info)
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{
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int status, result;
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bfd_byte buffer[12];
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unsigned long in1, in2;
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struct d30v_insn insn;
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long long num;
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insn.form = NULL;
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info->bytes_per_line = 8;
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info->bytes_per_chunk = 4;
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info->display_endian = BFD_ENDIAN_BIG;
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status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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in1 = bfd_getb32 (buffer);
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status = (*info->read_memory_func) (memaddr + 4, buffer, 4, info);
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if (status != 0)
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{
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info->bytes_per_line = 8;
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if (!(result = lookup_opcode (&insn, in1, 0)))
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(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
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else
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print_insn (info, memaddr, (long long) in1, &insn, 0, result);
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return 4;
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}
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in2 = bfd_getb32 (buffer);
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if (in1 & in2 & FM01)
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{
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/* LONG instruction. */
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if (!(result = lookup_opcode (&insn, in1, 1)))
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{
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(*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2);
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return 8;
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}
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num = (long long) in1 << 32 | in2;
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print_insn (info, memaddr, num, &insn, 1, result);
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}
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else
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{
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num = in1;
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if (!(result = lookup_opcode (&insn, in1, 0)))
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(*info->fprintf_func) (info->stream, ".long\t0x%x", in1);
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else
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print_insn (info, memaddr, num, &insn, 0, result);
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switch (((in1 >> 31) << 1) | (in2 >> 31))
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{
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case 0:
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(*info->fprintf_func) (info->stream, "\t||\t");
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break;
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case 1:
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(*info->fprintf_func) (info->stream, "\t->\t");
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break;
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case 2:
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(*info->fprintf_func) (info->stream, "\t<-\t");
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default:
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break;
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}
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insn.form = NULL;
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num = in2;
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if (!(result = lookup_opcode (&insn, in2, 0)))
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(*info->fprintf_func) (info->stream, ".long\t0x%x", in2);
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else
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print_insn (info, memaddr, num, &insn, 0, result);
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}
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return 8;
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}
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