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66ee273116
This simulates a CFI flash. Its pretty configurable via the device tree. For now, only basic read/write/erase operations are supported for the Intel command set, but it's easy enough to extend support. It's certainly enough to trick Das U-Boot into using it for probing, reading, writing, and erasing. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/* Common Flash Memory Interface (CFI) model.
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Copyright (C) 2010 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef DV_CFI_H
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#define DV_CFI_H
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/* CFI standard. */
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#define CFI_CMD_CFI_QUERY 0x98
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#define CFI_ADDR_CFI_QUERY_START 0x55
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#define CFI_ADDR_CFI_QUERY_RESULT 0x10
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#define CFI_CMD_READ 0xFF
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#define CFI_CMD_RESET 0xF0
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#define CFI_CMD_READ_ID 0x90
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/* Intel specific. */
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#define CFI_CMDSET_INTEL 0x0001
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#define INTEL_CMD_STATUS_CLEAR 0x50
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#define INTEL_CMD_STATUS_READ 0x70
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#define INTEL_CMD_WRITE 0x40
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#define INTEL_CMD_WRITE_ALT 0x10
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#define INTEL_CMD_WRITE_BUFFER 0xE8
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#define INTEL_CMD_WRITE_BUFFER_CONFIRM 0xD0
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#define INTEL_CMD_LOCK_SETUP 0x60
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#define INTEL_CMD_LOCK_BLOCK 0x01
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#define INTEL_CMD_UNLOCK_BLOCK 0xD0
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#define INTEL_CMD_LOCK_DOWN_BLOCK 0x2F
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#define INTEL_CMD_ERASE_BLOCK 0x20
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#define INTEL_CMD_ERASE_CONFIRM 0xD0
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/* Intel Status Register bits. */
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#define INTEL_SR_BWS (1 << 0) /* BEFP Write. */
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#define INTEL_SR_BLS (1 << 1) /* Block Locked. */
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#define INTEL_SR_PSS (1 << 2) /* Program Suspend. */
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#define INTEL_SR_VPPS (1 << 3) /* Vpp. */
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#define INTEL_SR_PS (1 << 4) /* Program. */
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#define INTEL_SR_ES (1 << 5) /* Erase. */
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#define INTEL_SR_ESS (1 << 6) /* Erase Suspend. */
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#define INTEL_SR_DWS (1 << 7) /* Device Write. */
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#define INTEL_ID_MANU 0x89
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#endif
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