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https://github.com/darlinghq/darling-gdb.git
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4aaf25031b
(tilegx_write_pc): New function.
(tilegx_cannot_reference_register): Return zero if REGNO
is TILEGX_FAULTNUM_REGNUM.
(tilegx_gdbarch_init): Add call to set_gdbarch_write_pc.
(tilegx_register_name): Add handling of "faultnum" register.
* tilegx-tdep.h (enum tilegx_regnum): Add TILEGX_FAULTNUM_REGNUM.
* tilegx-linux-tdep.c (tilegx_linux_supply_regset): Add
handling of TILEGX_FAULTNUM_REGNUM.
* tilegx-linux-nat.c (regmap): Add entry for TILEGX_FAULTNUM_REGNUM.
110 lines
2.8 KiB
C
110 lines
2.8 KiB
C
/* Target-dependent code for the Tilera TILE-Gx processor.
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Copyright (C) 2012-2013 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef TILEGX_TDEP_H
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#define TILEGX_TDEP_H
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/* TILE-Gx has 56 general purpose registers (R0 - R52, TP, SP, LR),
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plus 8 special general purpose registers (network and ZERO),
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plus 1 magic register (PC).
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TP (aka R53) is the thread specific data pointer.
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SP (aka R54) is the stack pointer.
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LR (aka R55) is the link register. */
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enum tilegx_regnum
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{
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TILEGX_R0_REGNUM,
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TILEGX_R1_REGNUM,
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TILEGX_R2_REGNUM,
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TILEGX_R3_REGNUM,
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TILEGX_R4_REGNUM,
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TILEGX_R5_REGNUM,
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TILEGX_R6_REGNUM,
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TILEGX_R7_REGNUM,
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TILEGX_R8_REGNUM,
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TILEGX_R9_REGNUM,
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TILEGX_R10_REGNUM,
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TILEGX_R11_REGNUM,
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TILEGX_R12_REGNUM,
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TILEGX_R13_REGNUM,
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TILEGX_R14_REGNUM,
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TILEGX_R15_REGNUM,
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TILEGX_R16_REGNUM,
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TILEGX_R17_REGNUM,
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TILEGX_R18_REGNUM,
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TILEGX_R19_REGNUM,
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TILEGX_R20_REGNUM,
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TILEGX_R21_REGNUM,
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TILEGX_R22_REGNUM,
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TILEGX_R23_REGNUM,
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TILEGX_R24_REGNUM,
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TILEGX_R25_REGNUM,
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TILEGX_R26_REGNUM,
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TILEGX_R27_REGNUM,
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TILEGX_R28_REGNUM,
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TILEGX_R29_REGNUM,
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TILEGX_R30_REGNUM,
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TILEGX_R31_REGNUM,
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TILEGX_R32_REGNUM,
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TILEGX_R33_REGNUM,
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TILEGX_R34_REGNUM,
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TILEGX_R35_REGNUM,
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TILEGX_R36_REGNUM,
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TILEGX_R37_REGNUM,
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TILEGX_R38_REGNUM,
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TILEGX_R39_REGNUM,
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TILEGX_R40_REGNUM,
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TILEGX_R41_REGNUM,
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TILEGX_R42_REGNUM,
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TILEGX_R43_REGNUM,
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TILEGX_R44_REGNUM,
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TILEGX_R45_REGNUM,
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TILEGX_R46_REGNUM,
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TILEGX_R47_REGNUM,
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TILEGX_R48_REGNUM,
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TILEGX_R49_REGNUM,
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TILEGX_R50_REGNUM,
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TILEGX_R51_REGNUM,
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TILEGX_R52_REGNUM,
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TILEGX_TP_REGNUM,
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TILEGX_SP_REGNUM,
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TILEGX_LR_REGNUM,
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TILEGX_SN_REGNUM,
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TILEGX_NUM_EASY_REGS = TILEGX_SN_REGNUM, /* 56 */
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TILEGX_IO0_REGNUM,
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TILEGX_IO1_REGNUM,
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TILEGX_US0_REGNUM,
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TILEGX_US1_REGNUM,
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TILEGX_US2_REGNUM,
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TILEGX_US3_REGNUM,
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TILEGX_ZERO_REGNUM,
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TILEGX_PC_REGNUM,
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TILEGX_NUM_PHYS_REGS = TILEGX_PC_REGNUM, /* 64 */
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TILEGX_FAULTNUM_REGNUM,
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TILEGX_NUM_REGS, /* 66 */
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};
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enum { tilegx_reg_size = 8 };
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#endif /* tilegx-tdep.h */
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