Nick Clifton 87a8d6cbe0 PR binutils/15241 ... * lm32.cpu (Control and status registers): Add CFG2, PSW, TLBVADDR, TLBPADDR and TLBBADVADDR. * lm32-desc.c: Regenerate.		2013-03-08 17:25:12 +00:00
..
ChangeLog	PR binutils/15241	2013-03-08 17:25:12 +00:00
cris.cpu
epiphany.cpu	2012-11-30 Oleg Raikhman <oleg@adapteva.com>	2012-11-30 17:54:58 +00:00
epiphany.opc	bfd:	2011-10-27 14:27:16 +00:00
fr30.cpu
fr30.opc
frv.cpu
frv.opc	* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit	2011-12-15 10:21:51 +00:00
ip2k.cpu
ip2k.opc
iq10.cpu
iq2000.cpu
iq2000.opc
iq2000m.cpu
lm32.cpu	PR binutils/15241	2013-03-08 17:25:12 +00:00
lm32.opc
m32c.cpu
m32c.opc
m32r.cpu
m32r.opc
mep-avc2.cpu
mep-avc.cpu
mep-c5.cpu
mep-core.cpu
mep-default.cpu
mep-ext-cop.cpu
mep-fmax.cpu
mep-h1.cpu
mep-ivc2.cpu
mep-rhcop.cpu
mep-sample-ucidsp.cpu
mep.cpu
mep.opc
mt.cpu
mt.opc	cpu/	2012-02-27 06:57:57 +00:00
openrisc.cpu
openrisc.opc
sh64-compact.cpu
sh64-media.cpu
sh.cpu
sh.opc
simplify.inc
xc16x.cpu
xc16x.opc
xstormy16.cpu
xstormy16.opc