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darling-gdb/sim
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Chris Demetriou f4f1b9f102 2002-06-02 Chris Demetriou <cgd@broadcom.com> 
Ed Satterthwaite  <ehs@broadcom.com>

	* mips.igen (mdmx): New (pseudo-)model.
	* mdmx.c, mdmx.igen: New files.
	* Makefile.in (SIM_OBJS): Add mdmx.o.
	* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
	New typedefs.
	(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
	(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
	(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
	(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
	(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
	(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
	(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
	(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
	(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
	(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
	(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
	(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
	(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
	(qh_fmtsel): New macros.
	(_sim_cpu): New member "acc".
	(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
	(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
..
arm Set the FSR and FAR registers if a Data Abort is detected. 2002-05-29 19:01:36 +00:00
common * run.c: Fix formatting. 2002-05-31 02:17:26 +00:00
d10v Fill-out d10v enum so that there are no ``=''. 2002-06-01 18:15:43 +00:00
d30v Change minimum loop size limit to 0x10 (103792) 2000-07-05 21:40:11 +00:00
erc32 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
fr30 2001-11-14 Dave Brolley <brolley@redhat.com> 2001-11-14 19:50:01 +00:00
h8300 * compile.c: Fix formatting. 2002-05-19 12:52:54 +00:00
h8500 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
i960 2001-07-05 Ben Elliston <bje@redhat.com> 2001-07-05 13:51:26 +00:00
igen [ common/ChangeLog ] 2002-05-01 23:26:32 +00:00
m32r 2001-11-14 Dave Brolley <brolley@redhat.com> 2001-11-14 19:51:40 +00:00
m68hc11 * m68hc11_sim.c (cpu_move8): Call sim_engine_abort in default case. 2002-03-07 19:17:04 +00:00
mcore Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
mips 2002-06-02 Chris Demetriou <cgd@broadcom.com> 2002-06-02 07:39:26 +00:00
mn10200 * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
mn10300 *** empty log message *** 2001-05-07 06:10:25 +00:00
ppc * lf.c (lf_print__gnu_copyleft): Convert multiline strings to 2002-05-30 15:07:06 +00:00
sh * interp.c (sim_create_inferior): Record program arguments for 2001-01-30 23:03:56 +00:00
sh64 print_insn_sh cleanup: 2002-05-17 14:36:46 +00:00
testsuite * Contribute Hitachi SH5 simulator. 2002-02-01 11:44:32 +00:00
v850 * Makefile.in (simops.h, table.c): Delete targets. 2001-12-02 19:27:29 +00:00
w65 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
z8k Handle CLASS_IGNORE and ARG_NIM4. 2002-04-29 16:50:29 +00:00
ChangeLog Delete TiC80, no longer supported by GDB. 2002-06-01 23:23:28 +00:00
configure Revert sh64 changes. Accidently committed. 2002-02-02 04:48:32 +00:00
configure.in Revert sh64 changes. Accidently committed. 2002-02-02 04:48:32 +00:00
MAINTAINERS * MAINTAINERS: Update my email address. 2002-05-16 13:38:55 +00:00
Makefile.in Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
README-HACKING Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00