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1226 lines
36 KiB
C
1226 lines
36 KiB
C
/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
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Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
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2007, 2008 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "arch-utils.h"
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#include "dis-asm.h"
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#include "gdbtypes.h"
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#include "regcache.h"
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#include "gdb_string.h"
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#include "gdb_assert.h"
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#include "gdbcore.h" /* for write_memory_unsigned_integer */
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#include "value.h"
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#include "gdbtypes.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "trad-frame.h"
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#include "symtab.h"
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#include "dwarf2-frame.h"
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#include "osabi.h"
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#include "infcall.h"
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#include "target.h"
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#include "mn10300-tdep.h"
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/* Forward decl. */
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extern struct trad_frame_cache *mn10300_frame_unwind_cache (struct frame_info*,
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void **);
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/* Compute the alignment required by a type. */
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static int
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mn10300_type_align (struct type *type)
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{
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int i, align = 1;
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switch (TYPE_CODE (type))
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{
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case TYPE_CODE_INT:
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case TYPE_CODE_ENUM:
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case TYPE_CODE_SET:
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case TYPE_CODE_RANGE:
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case TYPE_CODE_CHAR:
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case TYPE_CODE_BOOL:
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case TYPE_CODE_FLT:
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case TYPE_CODE_PTR:
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case TYPE_CODE_REF:
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return TYPE_LENGTH (type);
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case TYPE_CODE_COMPLEX:
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return TYPE_LENGTH (type) / 2;
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case TYPE_CODE_STRUCT:
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case TYPE_CODE_UNION:
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for (i = 0; i < TYPE_NFIELDS (type); i++)
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{
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int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
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while (align < falign)
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align <<= 1;
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}
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return align;
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case TYPE_CODE_ARRAY:
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/* HACK! Structures containing arrays, even small ones, are not
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elligible for returning in registers. */
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return 256;
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case TYPE_CODE_TYPEDEF:
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return mn10300_type_align (check_typedef (type));
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default:
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internal_error (__FILE__, __LINE__, _("bad switch"));
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}
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}
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/* Should call_function allocate stack space for a struct return? */
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static int
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mn10300_use_struct_convention (struct type *type)
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{
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/* Structures bigger than a pair of words can't be returned in
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registers. */
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if (TYPE_LENGTH (type) > 8)
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return 1;
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switch (TYPE_CODE (type))
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{
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case TYPE_CODE_STRUCT:
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case TYPE_CODE_UNION:
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/* Structures with a single field are handled as the field
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itself. */
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if (TYPE_NFIELDS (type) == 1)
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return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
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/* Structures with word or double-word size are passed in memory, as
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long as they require at least word alignment. */
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if (mn10300_type_align (type) >= 4)
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return 0;
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return 1;
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/* Arrays are addressable, so they're never returned in
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registers. This condition can only hold when the array is
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the only field of a struct or union. */
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case TYPE_CODE_ARRAY:
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return 1;
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case TYPE_CODE_TYPEDEF:
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return mn10300_use_struct_convention (check_typedef (type));
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default:
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return 0;
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}
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}
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static void
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mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
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struct regcache *regcache, const void *valbuf)
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{
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int len = TYPE_LENGTH (type);
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int reg, regsz;
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if (TYPE_CODE (type) == TYPE_CODE_PTR)
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reg = 4;
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else
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reg = 0;
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regsz = register_size (gdbarch, reg);
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if (len <= regsz)
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regcache_raw_write_part (regcache, reg, 0, len, valbuf);
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else if (len <= 2 * regsz)
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{
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regcache_raw_write (regcache, reg, valbuf);
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gdb_assert (regsz == register_size (gdbarch, reg + 1));
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regcache_raw_write_part (regcache, reg+1, 0,
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len - regsz, (char *) valbuf + regsz);
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}
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else
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internal_error (__FILE__, __LINE__,
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_("Cannot store return value %d bytes long."), len);
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}
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static void
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mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
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struct regcache *regcache, void *valbuf)
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{
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char buf[MAX_REGISTER_SIZE];
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int len = TYPE_LENGTH (type);
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int reg, regsz;
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if (TYPE_CODE (type) == TYPE_CODE_PTR)
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reg = 4;
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else
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reg = 0;
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regsz = register_size (gdbarch, reg);
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if (len <= regsz)
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{
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regcache_raw_read (regcache, reg, buf);
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memcpy (valbuf, buf, len);
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}
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else if (len <= 2 * regsz)
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{
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regcache_raw_read (regcache, reg, buf);
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memcpy (valbuf, buf, regsz);
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gdb_assert (regsz == register_size (gdbarch, reg + 1));
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regcache_raw_read (regcache, reg + 1, buf);
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memcpy ((char *) valbuf + regsz, buf, len - regsz);
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}
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else
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internal_error (__FILE__, __LINE__,
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_("Cannot extract return value %d bytes long."), len);
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}
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/* Determine, for architecture GDBARCH, how a return value of TYPE
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should be returned. If it is supposed to be returned in registers,
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and READBUF is non-zero, read the appropriate value from REGCACHE,
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and copy it into READBUF. If WRITEBUF is non-zero, write the value
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from WRITEBUF into REGCACHE. */
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static enum return_value_convention
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mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type,
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struct type *type, struct regcache *regcache,
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gdb_byte *readbuf, const gdb_byte *writebuf)
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{
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if (mn10300_use_struct_convention (type))
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return RETURN_VALUE_STRUCT_CONVENTION;
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if (readbuf)
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mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
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if (writebuf)
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mn10300_store_return_value (gdbarch, type, regcache, writebuf);
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return RETURN_VALUE_REGISTER_CONVENTION;
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}
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static char *
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register_name (int reg, char **regs, long sizeof_regs)
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{
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if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
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return NULL;
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else
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return regs[reg];
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}
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static const char *
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mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
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{
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static char *regs[] =
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{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
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"sp", "pc", "mdr", "psw", "lir", "lar", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "fp"
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};
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return register_name (reg, regs, sizeof regs);
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}
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static const char *
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am33_register_name (struct gdbarch *gdbarch, int reg)
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{
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static char *regs[] =
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{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
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"sp", "pc", "mdr", "psw", "lir", "lar", "",
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
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};
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return register_name (reg, regs, sizeof regs);
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}
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static const char *
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am33_2_register_name (struct gdbarch *gdbarch, int reg)
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{
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static char *regs[] =
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{
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"d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
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"sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
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"r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
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"msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
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"fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
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"fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
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"fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
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"fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
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};
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return register_name (reg, regs, sizeof regs);
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}
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static struct type *
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mn10300_register_type (struct gdbarch *gdbarch, int reg)
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{
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return builtin_type_int;
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}
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static CORE_ADDR
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mn10300_read_pc (struct regcache *regcache)
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{
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ULONGEST val;
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regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
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return val;
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}
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static void
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mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
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{
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regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
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}
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/* The breakpoint instruction must be the same size as the smallest
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instruction in the instruction set.
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The Matsushita mn10x00 processors have single byte instructions
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so we need a single byte breakpoint. Matsushita hasn't defined
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one, so we defined it ourselves. */
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const static unsigned char *
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mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
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int *bp_size)
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{
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static char breakpoint[] = {0xff};
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*bp_size = 1;
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return breakpoint;
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}
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/* Set offsets of saved registers.
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This is a helper function for mn10300_analyze_prologue. */
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static void
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set_reg_offsets (struct frame_info *fi,
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void **this_cache,
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int movm_args,
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int fpregmask,
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int stack_extra_size,
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int frame_in_fp)
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{
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struct gdbarch *gdbarch;
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struct trad_frame_cache *cache;
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int offset = 0;
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CORE_ADDR base;
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if (fi == NULL || this_cache == NULL)
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return;
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cache = mn10300_frame_unwind_cache (fi, this_cache);
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if (cache == NULL)
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return;
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gdbarch = get_frame_arch (fi);
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if (frame_in_fp)
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{
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base = get_frame_register_unsigned (fi, E_A3_REGNUM);
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}
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else
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{
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base = get_frame_register_unsigned (fi, E_SP_REGNUM)
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+ stack_extra_size;
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}
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trad_frame_set_this_base (cache, base);
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if (AM33_MODE (gdbarch) == 2)
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{
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/* If bit N is set in fpregmask, fsN is saved on the stack.
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The floating point registers are saved in ascending order.
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For example: fs16 <- Frame Pointer
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fs17 Frame Pointer + 4 */
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if (fpregmask != 0)
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{
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int i;
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for (i = 0; i < 32; i++)
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{
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if (fpregmask & (1 << i))
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{
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trad_frame_set_reg_addr (cache, E_FS0_REGNUM + i,
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base + offset);
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offset += 4;
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}
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}
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}
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}
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if (movm_args & movm_other_bit)
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{
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/* The `other' bit leaves a blank area of four bytes at the
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beginning of its block of saved registers, making it 32 bytes
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long in total. */
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trad_frame_set_reg_addr (cache, E_LAR_REGNUM, base + offset + 4);
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trad_frame_set_reg_addr (cache, E_LIR_REGNUM, base + offset + 8);
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trad_frame_set_reg_addr (cache, E_MDR_REGNUM, base + offset + 12);
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trad_frame_set_reg_addr (cache, E_A0_REGNUM + 1, base + offset + 16);
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trad_frame_set_reg_addr (cache, E_A0_REGNUM, base + offset + 20);
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trad_frame_set_reg_addr (cache, E_D0_REGNUM + 1, base + offset + 24);
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trad_frame_set_reg_addr (cache, E_D0_REGNUM, base + offset + 28);
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offset += 32;
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}
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if (movm_args & movm_a3_bit)
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{
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trad_frame_set_reg_addr (cache, E_A3_REGNUM, base + offset);
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offset += 4;
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}
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if (movm_args & movm_a2_bit)
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{
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trad_frame_set_reg_addr (cache, E_A2_REGNUM, base + offset);
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offset += 4;
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}
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if (movm_args & movm_d3_bit)
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{
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trad_frame_set_reg_addr (cache, E_D3_REGNUM, base + offset);
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offset += 4;
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}
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if (movm_args & movm_d2_bit)
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{
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trad_frame_set_reg_addr (cache, E_D2_REGNUM, base + offset);
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offset += 4;
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}
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if (AM33_MODE (gdbarch))
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{
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if (movm_args & movm_exother_bit)
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{
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trad_frame_set_reg_addr (cache, E_MCVF_REGNUM, base + offset);
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trad_frame_set_reg_addr (cache, E_MCRL_REGNUM, base + offset + 4);
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trad_frame_set_reg_addr (cache, E_MCRH_REGNUM, base + offset + 8);
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trad_frame_set_reg_addr (cache, E_MDRQ_REGNUM, base + offset + 12);
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trad_frame_set_reg_addr (cache, E_E1_REGNUM, base + offset + 16);
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trad_frame_set_reg_addr (cache, E_E0_REGNUM, base + offset + 20);
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offset += 24;
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}
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if (movm_args & movm_exreg1_bit)
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{
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trad_frame_set_reg_addr (cache, E_E7_REGNUM, base + offset);
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trad_frame_set_reg_addr (cache, E_E6_REGNUM, base + offset + 4);
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trad_frame_set_reg_addr (cache, E_E5_REGNUM, base + offset + 8);
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trad_frame_set_reg_addr (cache, E_E4_REGNUM, base + offset + 12);
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offset += 16;
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}
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if (movm_args & movm_exreg0_bit)
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{
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trad_frame_set_reg_addr (cache, E_E3_REGNUM, base + offset);
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trad_frame_set_reg_addr (cache, E_E2_REGNUM, base + offset + 4);
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offset += 8;
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}
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}
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/* The last (or first) thing on the stack will be the PC. */
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trad_frame_set_reg_addr (cache, E_PC_REGNUM, base + offset);
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/* Save the SP in the 'traditional' way.
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This will be the same location where the PC is saved. */
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trad_frame_set_reg_value (cache, E_SP_REGNUM, base + offset);
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}
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/* The main purpose of this file is dealing with prologues to extract
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information about stack frames and saved registers.
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In gcc/config/mn13000/mn10300.c, the expand_prologue prologue
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function is pretty readable, and has a nice explanation of how the
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prologue is generated. The prologues generated by that code will
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have the following form (NOTE: the current code doesn't handle all
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this!):
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+ If this is an old-style varargs function, then its arguments
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need to be flushed back to the stack:
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mov d0,(4,sp)
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mov d1,(4,sp)
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+ If we use any of the callee-saved registers, save them now.
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movm [some callee-saved registers],(sp)
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+ If we have any floating-point registers to save:
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- Decrement the stack pointer to reserve space for the registers.
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If the function doesn't need a frame pointer, we may combine
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this with the adjustment that reserves space for the frame.
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add -SIZE, sp
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- Save the floating-point registers. We have two possible
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strategies:
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. Save them at fixed offset from the SP:
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fmov fsN,(OFFSETN,sp)
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fmov fsM,(OFFSETM,sp)
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...
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Note that, if OFFSETN happens to be zero, you'll get the
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different opcode: fmov fsN,(sp)
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. Or, set a0 to the start of the save area, and then use
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post-increment addressing to save the FP registers.
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mov sp, a0
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add SIZE, a0
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fmov fsN,(a0+)
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fmov fsM,(a0+)
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...
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+ If the function needs a frame pointer, we set it here.
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mov sp, a3
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+ Now we reserve space for the stack frame proper. This could be
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merged into the `add -SIZE, sp' instruction for FP saves up
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above, unless we needed to set the frame pointer in the previous
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step, or the frame is so large that allocating the whole thing at
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once would put the FP register save slots out of reach of the
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addressing mode (128 bytes).
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add -SIZE, sp
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One day we might keep the stack pointer constant, that won't
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change the code for prologues, but it will make the frame
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pointerless case much more common. */
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|
|
/* Analyze the prologue to determine where registers are saved,
|
|
the end of the prologue, etc etc. Return the end of the prologue
|
|
scanned.
|
|
|
|
We store into FI (if non-null) several tidbits of information:
|
|
|
|
* stack_size -- size of this stack frame. Note that if we stop in
|
|
certain parts of the prologue/epilogue we may claim the size of the
|
|
current frame is zero. This happens when the current frame has
|
|
not been allocated yet or has already been deallocated.
|
|
|
|
* fsr -- Addresses of registers saved in the stack by this frame.
|
|
|
|
* status -- A (relatively) generic status indicator. It's a bitmask
|
|
with the following bits:
|
|
|
|
MY_FRAME_IN_SP: The base of the current frame is actually in
|
|
the stack pointer. This can happen for frame pointerless
|
|
functions, or cases where we're stopped in the prologue/epilogue
|
|
itself. For these cases mn10300_analyze_prologue will need up
|
|
update fi->frame before returning or analyzing the register
|
|
save instructions.
|
|
|
|
MY_FRAME_IN_FP: The base of the current frame is in the
|
|
frame pointer register ($a3).
|
|
|
|
NO_MORE_FRAMES: Set this if the current frame is "start" or
|
|
if the first instruction looks like mov <imm>,sp. This tells
|
|
frame chain to not bother trying to unwind past this frame. */
|
|
|
|
static CORE_ADDR
|
|
mn10300_analyze_prologue (struct gdbarch *gdbarch, struct frame_info *fi,
|
|
void **this_cache,
|
|
CORE_ADDR pc)
|
|
{
|
|
CORE_ADDR func_addr, func_end, addr, stop;
|
|
long stack_extra_size = 0;
|
|
int imm_size;
|
|
unsigned char buf[4];
|
|
int status;
|
|
int movm_args = 0;
|
|
int fpregmask = 0;
|
|
char *name;
|
|
int frame_in_fp = 0;
|
|
|
|
/* Use the PC in the frame if it's provided to look up the
|
|
start of this function.
|
|
|
|
Note: kevinb/2003-07-16: We used to do the following here:
|
|
pc = (fi ? get_frame_pc (fi) : pc);
|
|
But this is (now) badly broken when called from analyze_dummy_frame().
|
|
*/
|
|
if (fi)
|
|
{
|
|
pc = (pc ? pc : get_frame_pc (fi));
|
|
}
|
|
|
|
/* Find the start of this function. */
|
|
status = find_pc_partial_function (pc, &name, &func_addr, &func_end);
|
|
|
|
/* Do nothing if we couldn't find the start of this function
|
|
|
|
MVS: comment went on to say "or if we're stopped at the first
|
|
instruction in the prologue" -- but code doesn't reflect that,
|
|
and I don't want to do that anyway. */
|
|
if (status == 0)
|
|
{
|
|
addr = pc;
|
|
goto finish_prologue;
|
|
}
|
|
|
|
/* If we're in start, then give up. */
|
|
if (strcmp (name, "start") == 0)
|
|
{
|
|
addr = pc;
|
|
goto finish_prologue;
|
|
}
|
|
|
|
/* Figure out where to stop scanning. */
|
|
stop = fi ? pc : func_end;
|
|
|
|
/* Don't walk off the end of the function. */
|
|
stop = stop > func_end ? func_end : stop;
|
|
|
|
/* Start scanning on the first instruction of this function. */
|
|
addr = func_addr;
|
|
|
|
/* Suck in two bytes. */
|
|
if (addr + 2 > stop || !safe_frame_unwind_memory (fi, addr, buf, 2))
|
|
goto finish_prologue;
|
|
|
|
/* First see if this insn sets the stack pointer from a register; if
|
|
so, it's probably the initialization of the stack pointer in _start,
|
|
so mark this as the bottom-most frame. */
|
|
if (buf[0] == 0xf2 && (buf[1] & 0xf3) == 0xf0)
|
|
{
|
|
goto finish_prologue;
|
|
}
|
|
|
|
/* Now look for movm [regs],sp, which saves the callee saved registers.
|
|
|
|
At this time we don't know if fi->frame is valid, so we only note
|
|
that we encountered a movm instruction. Later, we'll set the entries
|
|
in fsr.regs as needed. */
|
|
if (buf[0] == 0xcf)
|
|
{
|
|
/* Extract the register list for the movm instruction. */
|
|
movm_args = buf[1];
|
|
|
|
addr += 2;
|
|
|
|
/* Quit now if we're beyond the stop point. */
|
|
if (addr >= stop)
|
|
goto finish_prologue;
|
|
|
|
/* Get the next two bytes so the prologue scan can continue. */
|
|
if (!safe_frame_unwind_memory (fi, addr, buf, 2))
|
|
goto finish_prologue;
|
|
}
|
|
|
|
/* Check for "mov pc, a2", an instruction found in optimized, position
|
|
independent code. Skip it if found. */
|
|
if (buf[0] == 0xf0 && buf[1] == 0x2e)
|
|
{
|
|
addr += 2;
|
|
|
|
/* Quit now if we're beyond the stop point. */
|
|
if (addr >= stop)
|
|
goto finish_prologue;
|
|
|
|
/* Get the next two bytes so the prologue scan can continue. */
|
|
status = target_read_memory (addr, buf, 2);
|
|
if (status != 0)
|
|
goto finish_prologue;
|
|
}
|
|
|
|
if (AM33_MODE (gdbarch) == 2)
|
|
{
|
|
/* Determine if any floating point registers are to be saved.
|
|
Look for one of the following three prologue formats:
|
|
|
|
[movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)]
|
|
|
|
add -SIZE,sp add -SIZE,sp add -SIZE,sp
|
|
fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1
|
|
fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1
|
|
... ... fmov fs#,(a0/a1+)
|
|
... ... ...
|
|
fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+)
|
|
|
|
[mov sp,a3] [mov sp,a3]
|
|
[add -SIZE2,sp] [add -SIZE2,sp] */
|
|
|
|
/* Remember the address at which we started in the event that we
|
|
don't ultimately find an fmov instruction. Once we're certain
|
|
that we matched one of the above patterns, we'll set
|
|
``restore_addr'' to the appropriate value. Note: At one time
|
|
in the past, this code attempted to not adjust ``addr'' until
|
|
there was a fair degree of certainty that the pattern would be
|
|
matched. However, that code did not wait until an fmov instruction
|
|
was actually encountered. As a consequence, ``addr'' would
|
|
sometimes be advanced even when no fmov instructions were found. */
|
|
CORE_ADDR restore_addr = addr;
|
|
int fmov_found = 0;
|
|
|
|
/* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX)
|
|
or add imm16,sp (0xfafeXXXX)
|
|
or add imm32,sp (0xfcfeXXXXXXXX)) */
|
|
imm_size = 0;
|
|
if (buf[0] == 0xf8 && buf[1] == 0xfe)
|
|
imm_size = 1;
|
|
else if (buf[0] == 0xfa && buf[1] == 0xfe)
|
|
imm_size = 2;
|
|
else if (buf[0] == 0xfc && buf[1] == 0xfe)
|
|
imm_size = 4;
|
|
if (imm_size != 0)
|
|
{
|
|
/* An "add -#,sp" instruction has been found. "addr + 2 + imm_size"
|
|
is the address of the next instruction. Don't modify "addr" until
|
|
the next "floating point prologue" instruction is found. If this
|
|
is not a prologue that saves floating point registers we need to
|
|
be able to back out of this bit of code and continue with the
|
|
prologue analysis. */
|
|
if (addr + 2 + imm_size < stop)
|
|
{
|
|
if (!safe_frame_unwind_memory (fi, addr + 2 + imm_size, buf, 3))
|
|
goto finish_prologue;
|
|
if ((buf[0] & 0xfc) == 0x3c)
|
|
{
|
|
/* Occasionally, especially with C++ code, the "fmov"
|
|
instructions will be preceded by "mov sp,aN"
|
|
(aN => a0, a1, a2, or a3).
|
|
|
|
This is a one byte instruction: mov sp,aN = 0011 11XX
|
|
where XX is the register number.
|
|
|
|
Skip this instruction by incrementing addr. The "fmov"
|
|
instructions will have the form "fmov fs#,(aN+)" in this
|
|
case, but that will not necessitate a change in the
|
|
"fmov" parsing logic below. */
|
|
|
|
addr++;
|
|
|
|
if ((buf[1] & 0xfc) == 0x20)
|
|
{
|
|
/* Occasionally, especially with C++ code compiled with
|
|
the -fomit-frame-pointer or -O3 options, the
|
|
"mov sp,aN" instruction will be followed by an
|
|
"add #,aN" instruction. This indicates the
|
|
"stack_size", the size of the portion of the stack
|
|
containing the arguments. This instruction format is:
|
|
add #,aN = 0010 00XX YYYY YYYY
|
|
where XX is the register number
|
|
YYYY YYYY is the constant.
|
|
Note the size of the stack (as a negative number) in
|
|
the frame info structure. */
|
|
if (fi)
|
|
stack_extra_size += -buf[2];
|
|
|
|
addr += 2;
|
|
}
|
|
}
|
|
|
|
if ((buf[0] & 0xfc) == 0x3c ||
|
|
buf[0] == 0xf9 || buf[0] == 0xfb)
|
|
{
|
|
/* An "fmov" instruction has been found indicating that this
|
|
prologue saves floating point registers (or, as described
|
|
above, a "mov sp,aN" and possible "add #,aN" have been
|
|
found and we will assume an "fmov" follows). Process the
|
|
consecutive "fmov" instructions. */
|
|
for (addr += 2 + imm_size;;addr += imm_size)
|
|
{
|
|
int regnum;
|
|
|
|
/* Read the "fmov" instruction. */
|
|
if (addr >= stop ||
|
|
!safe_frame_unwind_memory (fi, addr, buf, 4))
|
|
goto finish_prologue;
|
|
|
|
if (buf[0] != 0xf9 && buf[0] != 0xfb)
|
|
break;
|
|
|
|
/* An fmov instruction has just been seen. We can
|
|
now really commit to the pattern match. */
|
|
|
|
fmov_found = 1;
|
|
|
|
/* Get the floating point register number from the
|
|
2nd and 3rd bytes of the "fmov" instruction:
|
|
Machine Code: 0000 00X0 YYYY 0000 =>
|
|
Regnum: 000X YYYY */
|
|
regnum = (buf[1] & 0x02) << 3;
|
|
regnum |= ((buf[2] & 0xf0) >> 4) & 0x0f;
|
|
|
|
/* Add this register number to the bit mask of floating
|
|
point registers that have been saved. */
|
|
fpregmask |= 1 << regnum;
|
|
|
|
/* Determine the length of this "fmov" instruction.
|
|
fmov fs#,(sp) => 3 byte instruction
|
|
fmov fs#,(#,sp) => 4 byte instruction */
|
|
imm_size = (buf[0] == 0xf9) ? 3 : 4;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/* If no fmov instructions were found by the above sequence, reset
|
|
the state and pretend that the above bit of code never happened. */
|
|
if (!fmov_found)
|
|
{
|
|
addr = restore_addr;
|
|
status = target_read_memory (addr, buf, 2);
|
|
if (status != 0)
|
|
goto finish_prologue;
|
|
stack_extra_size = 0;
|
|
}
|
|
}
|
|
|
|
/* Now see if we set up a frame pointer via "mov sp,a3" */
|
|
if (buf[0] == 0x3f)
|
|
{
|
|
addr += 1;
|
|
|
|
/* The frame pointer is now valid. */
|
|
if (fi)
|
|
{
|
|
frame_in_fp = 1;
|
|
}
|
|
|
|
/* Quit now if we're beyond the stop point. */
|
|
if (addr >= stop)
|
|
goto finish_prologue;
|
|
|
|
/* Get two more bytes so scanning can continue. */
|
|
if (!safe_frame_unwind_memory (fi, addr, buf, 2))
|
|
goto finish_prologue;
|
|
}
|
|
|
|
/* Next we should allocate the local frame. No more prologue insns
|
|
are found after allocating the local frame.
|
|
|
|
Search for add imm8,sp (0xf8feXX)
|
|
or add imm16,sp (0xfafeXXXX)
|
|
or add imm32,sp (0xfcfeXXXXXXXX).
|
|
|
|
If none of the above was found, then this prologue has no
|
|
additional stack. */
|
|
|
|
imm_size = 0;
|
|
if (buf[0] == 0xf8 && buf[1] == 0xfe)
|
|
imm_size = 1;
|
|
else if (buf[0] == 0xfa && buf[1] == 0xfe)
|
|
imm_size = 2;
|
|
else if (buf[0] == 0xfc && buf[1] == 0xfe)
|
|
imm_size = 4;
|
|
|
|
if (imm_size != 0)
|
|
{
|
|
/* Suck in imm_size more bytes, they'll hold the size of the
|
|
current frame. */
|
|
if (!safe_frame_unwind_memory (fi, addr + 2, buf, imm_size))
|
|
goto finish_prologue;
|
|
|
|
/* Note the size of the stack. */
|
|
stack_extra_size -= extract_signed_integer (buf, imm_size);
|
|
|
|
/* We just consumed 2 + imm_size bytes. */
|
|
addr += 2 + imm_size;
|
|
|
|
/* No more prologue insns follow, so begin preparation to return. */
|
|
goto finish_prologue;
|
|
}
|
|
/* Do the essentials and get out of here. */
|
|
finish_prologue:
|
|
/* Note if/where callee saved registers were saved. */
|
|
if (fi)
|
|
set_reg_offsets (fi, this_cache, movm_args, fpregmask, stack_extra_size,
|
|
frame_in_fp);
|
|
return addr;
|
|
}
|
|
|
|
/* Function: skip_prologue
|
|
Return the address of the first inst past the prologue of the function. */
|
|
|
|
static CORE_ADDR
|
|
mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
|
|
{
|
|
return mn10300_analyze_prologue (gdbarch, NULL, NULL, pc);
|
|
}
|
|
|
|
/* Simple frame_unwind_cache.
|
|
This finds the "extra info" for the frame. */
|
|
struct trad_frame_cache *
|
|
mn10300_frame_unwind_cache (struct frame_info *this_frame,
|
|
void **this_prologue_cache)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct trad_frame_cache *cache;
|
|
CORE_ADDR pc, start, end;
|
|
void *cache_p;
|
|
|
|
if (*this_prologue_cache)
|
|
return (*this_prologue_cache);
|
|
|
|
gdbarch = get_frame_arch (this_frame);
|
|
cache_p = trad_frame_cache_zalloc (this_frame);
|
|
pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
|
|
mn10300_analyze_prologue (gdbarch, this_frame, &cache_p, pc);
|
|
cache = cache_p;
|
|
|
|
if (find_pc_partial_function (pc, NULL, &start, &end))
|
|
trad_frame_set_id (cache,
|
|
frame_id_build (trad_frame_get_this_base (cache),
|
|
start));
|
|
else
|
|
{
|
|
start = get_frame_func (this_frame);
|
|
trad_frame_set_id (cache,
|
|
frame_id_build (trad_frame_get_this_base (cache),
|
|
start));
|
|
}
|
|
|
|
(*this_prologue_cache) = cache;
|
|
return cache;
|
|
}
|
|
|
|
/* Here is a dummy implementation. */
|
|
static struct frame_id
|
|
mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
{
|
|
CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
|
|
CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
|
|
return frame_id_build (sp, pc);
|
|
}
|
|
|
|
/* Trad frame implementation. */
|
|
static void
|
|
mn10300_frame_this_id (struct frame_info *this_frame,
|
|
void **this_prologue_cache,
|
|
struct frame_id *this_id)
|
|
{
|
|
struct trad_frame_cache *cache =
|
|
mn10300_frame_unwind_cache (this_frame, this_prologue_cache);
|
|
|
|
trad_frame_get_id (cache, this_id);
|
|
}
|
|
|
|
static struct value *
|
|
mn10300_frame_prev_register (struct frame_info *this_frame,
|
|
void **this_prologue_cache, int regnum)
|
|
{
|
|
struct trad_frame_cache *cache =
|
|
mn10300_frame_unwind_cache (this_frame, this_prologue_cache);
|
|
|
|
return trad_frame_get_register (cache, this_frame, regnum);
|
|
}
|
|
|
|
static const struct frame_unwind mn10300_frame_unwind = {
|
|
NORMAL_FRAME,
|
|
mn10300_frame_this_id,
|
|
mn10300_frame_prev_register,
|
|
NULL,
|
|
default_frame_sniffer
|
|
};
|
|
|
|
static CORE_ADDR
|
|
mn10300_frame_base_address (struct frame_info *this_frame,
|
|
void **this_prologue_cache)
|
|
{
|
|
struct trad_frame_cache *cache =
|
|
mn10300_frame_unwind_cache (this_frame, this_prologue_cache);
|
|
|
|
return trad_frame_get_this_base (cache);
|
|
}
|
|
|
|
static const struct frame_base mn10300_frame_base = {
|
|
&mn10300_frame_unwind,
|
|
mn10300_frame_base_address,
|
|
mn10300_frame_base_address,
|
|
mn10300_frame_base_address
|
|
};
|
|
|
|
static CORE_ADDR
|
|
mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
ULONGEST pc;
|
|
|
|
pc = frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
|
|
return pc;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
{
|
|
ULONGEST sp;
|
|
|
|
sp = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
|
|
return sp;
|
|
}
|
|
|
|
static void
|
|
mn10300_frame_unwind_init (struct gdbarch *gdbarch)
|
|
{
|
|
dwarf2_append_unwinders (gdbarch);
|
|
frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
|
|
frame_base_set_default (gdbarch, &mn10300_frame_base);
|
|
set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
|
|
set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
|
|
set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
|
|
}
|
|
|
|
/* Function: push_dummy_call
|
|
*
|
|
* Set up machine state for a target call, including
|
|
* function arguments, stack, return address, etc.
|
|
*
|
|
*/
|
|
|
|
static CORE_ADDR
|
|
mn10300_push_dummy_call (struct gdbarch *gdbarch,
|
|
struct value *target_func,
|
|
struct regcache *regcache,
|
|
CORE_ADDR bp_addr,
|
|
int nargs, struct value **args,
|
|
CORE_ADDR sp,
|
|
int struct_return,
|
|
CORE_ADDR struct_addr)
|
|
{
|
|
const int push_size = register_size (gdbarch, E_PC_REGNUM);
|
|
int regs_used;
|
|
int len, arg_len;
|
|
int stack_offset = 0;
|
|
int argnum;
|
|
char *val, valbuf[MAX_REGISTER_SIZE];
|
|
|
|
/* This should be a nop, but align the stack just in case something
|
|
went wrong. Stacks are four byte aligned on the mn10300. */
|
|
sp &= ~3;
|
|
|
|
/* Now make space on the stack for the args.
|
|
|
|
XXX This doesn't appear to handle pass-by-invisible reference
|
|
arguments. */
|
|
regs_used = struct_return ? 1 : 0;
|
|
for (len = 0, argnum = 0; argnum < nargs; argnum++)
|
|
{
|
|
arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
|
|
while (regs_used < 2 && arg_len > 0)
|
|
{
|
|
regs_used++;
|
|
arg_len -= push_size;
|
|
}
|
|
len += arg_len;
|
|
}
|
|
|
|
/* Allocate stack space. */
|
|
sp -= len;
|
|
|
|
if (struct_return)
|
|
{
|
|
regs_used = 1;
|
|
regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
|
|
}
|
|
else
|
|
regs_used = 0;
|
|
|
|
/* Push all arguments onto the stack. */
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
{
|
|
/* FIXME what about structs? Unions? */
|
|
if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
|
|
&& TYPE_LENGTH (value_type (*args)) > 8)
|
|
{
|
|
/* Change to pointer-to-type. */
|
|
arg_len = push_size;
|
|
store_unsigned_integer (valbuf, push_size,
|
|
VALUE_ADDRESS (*args));
|
|
val = &valbuf[0];
|
|
}
|
|
else
|
|
{
|
|
arg_len = TYPE_LENGTH (value_type (*args));
|
|
val = (char *) value_contents (*args);
|
|
}
|
|
|
|
while (regs_used < 2 && arg_len > 0)
|
|
{
|
|
regcache_cooked_write_unsigned (regcache, regs_used,
|
|
extract_unsigned_integer (val, push_size));
|
|
val += push_size;
|
|
arg_len -= push_size;
|
|
regs_used++;
|
|
}
|
|
|
|
while (arg_len > 0)
|
|
{
|
|
write_memory (sp + stack_offset, val, push_size);
|
|
arg_len -= push_size;
|
|
val += push_size;
|
|
stack_offset += push_size;
|
|
}
|
|
|
|
args++;
|
|
}
|
|
|
|
/* Make space for the flushback area. */
|
|
sp -= 8;
|
|
|
|
/* Push the return address that contains the magic breakpoint. */
|
|
sp -= 4;
|
|
write_memory_unsigned_integer (sp, push_size, bp_addr);
|
|
|
|
/* The CPU also writes the return address always into the
|
|
MDR register on "call". */
|
|
regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
|
|
|
|
/* Update $sp. */
|
|
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
|
|
|
|
/* On the mn10300, it's possible to move some of the stack adjustment
|
|
and saving of the caller-save registers out of the prologue and
|
|
into the call sites. (When using gcc, this optimization can
|
|
occur when using the -mrelax switch.) If this occurs, the dwarf2
|
|
info will reflect this fact. We can test to see if this is the
|
|
case by creating a new frame using the current stack pointer and
|
|
the address of the function that we're about to call. We then
|
|
unwind SP and see if it's different than the SP of our newly
|
|
created frame. If the SP values are the same, the caller is not
|
|
expected to allocate any additional stack. On the other hand, if
|
|
the SP values are different, the difference determines the
|
|
additional stack that must be allocated.
|
|
|
|
Note that we don't update the return value though because that's
|
|
the value of the stack just after pushing the arguments, but prior
|
|
to performing the call. This value is needed in order to
|
|
construct the frame ID of the dummy call. */
|
|
{
|
|
CORE_ADDR func_addr = find_function_addr (target_func, NULL);
|
|
CORE_ADDR unwound_sp
|
|
= mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
|
|
if (sp != unwound_sp)
|
|
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
|
|
sp - (unwound_sp - sp));
|
|
}
|
|
|
|
return sp;
|
|
}
|
|
|
|
/* If DWARF2 is a register number appearing in Dwarf2 debug info, then
|
|
mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
|
|
register number. Why don't Dwarf2 and GDB use the same numbering?
|
|
Who knows? But since people have object files lying around with
|
|
the existing Dwarf2 numbering, and other people have written stubs
|
|
to work with the existing GDB, neither of them can change. So we
|
|
just have to cope. */
|
|
static int
|
|
mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
|
|
{
|
|
/* This table is supposed to be shaped like the gdbarch_register_name
|
|
initializer in gcc/config/mn10300/mn10300.h. Registers which
|
|
appear in GCC's numbering, but have no counterpart in GDB's
|
|
world, are marked with a -1. */
|
|
static int dwarf2_to_gdb[] = {
|
|
0, 1, 2, 3, 4, 5, 6, 7, -1, 8,
|
|
15, 16, 17, 18, 19, 20, 21, 22,
|
|
32, 33, 34, 35, 36, 37, 38, 39,
|
|
40, 41, 42, 43, 44, 45, 46, 47,
|
|
48, 49, 50, 51, 52, 53, 54, 55,
|
|
56, 57, 58, 59, 60, 61, 62, 63,
|
|
9
|
|
};
|
|
|
|
if (dwarf2 < 0
|
|
|| dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
|
|
{
|
|
warning (_("Bogus register number in debug info: %d"), dwarf2);
|
|
return -1;
|
|
}
|
|
|
|
return dwarf2_to_gdb[dwarf2];
|
|
}
|
|
|
|
static struct gdbarch *
|
|
mn10300_gdbarch_init (struct gdbarch_info info,
|
|
struct gdbarch_list *arches)
|
|
{
|
|
struct gdbarch *gdbarch;
|
|
struct gdbarch_tdep *tdep;
|
|
int num_regs;
|
|
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
if (arches != NULL)
|
|
return arches->gdbarch;
|
|
|
|
tdep = xmalloc (sizeof (struct gdbarch_tdep));
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
switch (info.bfd_arch_info->mach)
|
|
{
|
|
case 0:
|
|
case bfd_mach_mn10300:
|
|
set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
|
|
tdep->am33_mode = 0;
|
|
num_regs = 32;
|
|
break;
|
|
case bfd_mach_am33:
|
|
set_gdbarch_register_name (gdbarch, am33_register_name);
|
|
tdep->am33_mode = 1;
|
|
num_regs = 32;
|
|
break;
|
|
case bfd_mach_am33_2:
|
|
set_gdbarch_register_name (gdbarch, am33_2_register_name);
|
|
tdep->am33_mode = 2;
|
|
num_regs = 64;
|
|
set_gdbarch_fp0_regnum (gdbarch, 32);
|
|
break;
|
|
default:
|
|
internal_error (__FILE__, __LINE__,
|
|
_("mn10300_gdbarch_init: Unknown mn10300 variant"));
|
|
break;
|
|
}
|
|
|
|
/* Registers. */
|
|
set_gdbarch_num_regs (gdbarch, num_regs);
|
|
set_gdbarch_register_type (gdbarch, mn10300_register_type);
|
|
set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
|
|
set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
|
|
set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
|
|
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
|
|
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
|
|
|
|
/* Stack unwinding. */
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
/* Breakpoints. */
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
|
|
/* decr_pc_after_break? */
|
|
/* Disassembly. */
|
|
set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
|
|
|
|
/* Stage 2 */
|
|
set_gdbarch_return_value (gdbarch, mn10300_return_value);
|
|
|
|
/* Stage 3 -- get target calls working. */
|
|
set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
|
|
/* set_gdbarch_return_value (store, extract) */
|
|
|
|
|
|
mn10300_frame_unwind_init (gdbarch);
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
return gdbarch;
|
|
}
|
|
|
|
/* Dump out the mn10300 specific architecture information. */
|
|
|
|
static void
|
|
mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
|
|
{
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
|
|
tdep->am33_mode);
|
|
}
|
|
|
|
void
|
|
_initialize_mn10300_tdep (void)
|
|
{
|
|
gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
|
|
}
|
|
|