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c908d778a7
* maxq-dis.c (get_reg_name): Fix the scan of the mem_access_syntax_table.
718 lines
18 KiB
C
718 lines
18 KiB
C
/* Instruction printing code for the MAXQ
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Copyright 2004, 2005, 2007 Free Software Foundation, Inc.
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Written by Vineet Sharma(vineets@noida.hcltech.com) Inderpreet
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S.(inderpreetb@noida.hcltech.com)
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/maxq.h"
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struct _group_info
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{
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unsigned char group_no;
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unsigned char sub_opcode;
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unsigned char src;
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unsigned char dst;
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unsigned char fbit;
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unsigned char bit_no;
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unsigned char flag;
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};
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typedef struct _group_info group_info;
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#define SRC 0x01
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#define DST 0x02
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#define FORMAT 0x04
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#define BIT_NO 0x08
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#define SUB_OP 0x10
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#define MASK_LOW_BYTE 0x0f
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#define MASK_HIGH_BYTE 0xf0
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/* Flags for retrieving the bits from the op-code. */
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#define _DECODE_LOWNIB_LOWBYTE 0x000f
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#define _DECODE_HIGHNIB_LOWBYTE 0x00f0
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#define _DECODE_LOWNIB_HIGHBYTE 0x0f00
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#define _DECODE_HIGHNIB_HIGHBYTE 0xf000
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#define _DECODE_HIGHBYTE 0xff00
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#define _DECODE_LOWBYTE 0x00ff
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#define _DECODE_4TO6_HIGHBYTE 0x7000
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#define _DECODE_4TO6_LOWBYTE 0x0070
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#define _DECODE_0TO6_HIGHBYTE 0x7f00
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#define _DECODE_0TO2_HIGHBYTE 0x0700
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#define _DECODE_GET_F_HIGHBYTE 0x8000
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#define _DECODE_BIT7_HIGHBYTE 0x8000
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#define _DECODE_BIT7_LOWBYTE 0x0080
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#define _DECODE_GET_CARRY 0x10000
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#define _DECODE_BIT0_LOWBYTE 0x1
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#define _DECODE_BIT6AND7_HIGHBYTE 0xc000
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/* Module and Register Indexed of System Registers. */
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#define _CURR_ACC_MODINDEX 0xa
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#define _CURR_ACC_REGINDEX 0x0
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#define _PSF_REG_MODINDEX 0x8
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#define _PSF_REG_REGINDEX 0x4
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#define _PFX_REG_MODINDEX 0xb
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#define _PFX0_REG_REGINDEX 0x0
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#define _PFX2_REG_REGINDEX 0x2
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#define _DP_REG_MODINDEX 0xf
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#define _DP0_REG_REGINDEX 0x3
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#define _DP1_REG_REGINDEX 0x7
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#define _IP_REG_MODINDEX 0xc
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#define _IP_REG_REGINDEX 0x0
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#define _IIR_REG_MODINDEX 0x8
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#define _IIR_REG_REGINDEX 0xb
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#define _SP_REG_MODINDEX 0xd
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#define _SP_REG_REGINDEX 0x1
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#define _IC_REG_MODINDEX 0x8
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#define _IC_REG_REGINDEX 0x5
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#define _LC_REG_MODINDEX 0xe
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#define _LC0_REG_REGINDEX 0x0
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#define _LC1_REG_REGINDEX 0x1
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#define _LC2_REG_REGINDEX 0x2
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#define _LC3_REG_REGINDEX 0x3
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/* Flags for finding the bits in PSF Register. */
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#define SIM_ALU_DECODE_CARRY_BIT_POS 0x2
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#define SIM_ALU_DECODE_SIGN_BIT_POS 0x40
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#define SIM_ALU_DECODE_ZERO_BIT_POS 0x80
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#define SIM_ALU_DECODE_EQUAL_BIT_POS 0x1
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#define SIM_ALU_DECODE_IGE_BIT_POS 0x1
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/* Number Of Op-code Groups. */
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unsigned char const SIM_ALU_DECODE_OPCODE_GROUPS = 11;
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/* Op-code Groups. */
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unsigned char const SIM_ALU_DECODE_LOGICAL_XCHG_OP_GROUP = 1;
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/* Group1: AND/OR/XOR/ADD/SUB Operations: fxxx 1010 ssss ssss. */
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unsigned char const SIM_ALU_DECODE_AND_OR_ADD_SUB_OP_GROUP = 2;
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/* Group2: Logical Operations: 1000 1010 xxxx 1010. */
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unsigned char const SIM_ALU_DECODE_BIT_OP_GROUP = 3;
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/* XCHG/Bit Operations: 1xxx 1010 xxxx 1010. */
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unsigned char const SIM_ALU_DECODE_SET_DEST_BIT_GROUP = 4;
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/* Move value in bit of destination register: 1ddd dddd xbbb 0111. */
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unsigned char const SIM_ALU_DECODE_JUMP_OP_GROUP = 5;
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#define JUMP_CHECK(insn) \
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( ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x2000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x6000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x1000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x7000) \
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000) )
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/* JUMP operations: fxxx 1100 ssss ssss */
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unsigned char const SIM_ALU_DECODE_RET_OP_GROUP = 6;
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/* RET Operations: 1xxx 1100 0000 1101 */
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unsigned char const SIM_ALU_DECODE_MOVE_SRC_DST_GROUP = 7;
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/* Move src into dest register: fddd dddd ssss ssss */
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unsigned char const SIM_ALU_DECODE_SET_SRC_BIT_GROUP = 8;
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/* Move value in bit of source register: fbbb 0111 ssss ssss */
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unsigned char const SIM_ALU_DECODE_DJNZ_CALL_PUSH_OP_GROUP = 9;
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/* PUSH, DJNZ and CALL operations: fxxx 1101 ssss ssss */
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unsigned char const SIM_ALU_DECODE_POP_OP_GROUP = 10;
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/* POP operation: 1ddd dddd 0000 1101 */
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unsigned char const SIM_ALU_DECODE_CMP_SRC_OP_GROUP = 11;
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/* GLOBAL */
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char unres_reg_name[20];
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static char *
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get_reg_name (unsigned char reg_code, type1 arg_pos)
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{
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unsigned char module;
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unsigned char index;
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int ix = 0;
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reg_entry const *reg_x;
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mem_access_syntax const *syntax;
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mem_access *mem_acc;
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module = 0;
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index = 0;
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module = (reg_code & MASK_LOW_BYTE);
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index = (reg_code & MASK_HIGH_BYTE);
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index = index >> 4;
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/* Search the system register table. */
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for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL; ++reg_x)
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if ((reg_x->Mod_name == module) && (reg_x->Mod_index == index))
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return reg_x->reg_name;
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/* Serch pheripheral table. */
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for (ix = 0; ix < num_of_reg; ix++)
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{
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reg_x = &new_reg_table[ix];
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if ((reg_x->Mod_name == module) && (reg_x->Mod_index == index))
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return reg_x->reg_name;
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}
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for (mem_acc = &mem_table[0]; mem_acc->name != NULL || !mem_acc; ++mem_acc)
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{
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if (reg_code == mem_acc->opcode)
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{
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for (syntax = mem_access_syntax_table;
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syntax != NULL && syntax->name;
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++syntax)
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if (!strcmp (mem_acc->name, syntax->name))
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{
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if ((arg_pos == syntax->type) || (syntax->type == BOTH))
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return mem_acc->name;
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break;
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}
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}
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}
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memset (unres_reg_name, 0, 20);
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sprintf (unres_reg_name, "%01x%01xh", index, module);
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return unres_reg_name;
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}
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static bfd_boolean
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check_move (unsigned char insn0, unsigned char insn8)
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{
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bfd_boolean first = FALSE;
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bfd_boolean second = FALSE;
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char *first_reg;
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char *second_reg;
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reg_entry const *reg_x;
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const unsigned char module1 = insn0 & MASK_LOW_BYTE;
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const unsigned char index1 = ((insn0 & 0x70) >> 4);
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const unsigned char module2 = insn8 & MASK_LOW_BYTE;
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const unsigned char index2 = ((insn8 & MASK_HIGH_BYTE) >> 4);
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/* DST */
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if (((insn0 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
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&& ((index1 == 0) || (index1 == 1) || (index1 == 2) || (index1 == 5)
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|| (index1 == 4) || (index1 == 6)))
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first = TRUE;
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else if (((insn0 & MASK_LOW_BYTE) == 0x0D) && (index1 == 0))
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first = TRUE;
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else if ((module1 == 0x0E)
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&& ((index1 == 0) || (index1 == 1) || (index1 == 2)))
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first = TRUE;
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else
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{
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for (reg_x = &system_reg_table[0]; reg_x->reg_name != NULL && reg_x;
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++reg_x)
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{
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if ((reg_x->Mod_name == module1) && (reg_x->Mod_index == index1)
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&& ((reg_x->rtype == Reg_16W) || (reg_x->rtype == Reg_8W)))
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{
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/* IP not allowed. */
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if ((reg_x->Mod_name == 0x0C) && (reg_x->Mod_index == 0x00))
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continue;
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/* A[AP] not allowed. */
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if ((reg_x->Mod_name == 0x0A) && (reg_x->Mod_index == 0x01))
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continue;
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first_reg = reg_x->reg_name;
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first = TRUE;
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break;
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}
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}
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}
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if (!first)
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/* No need to check further. */
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return FALSE;
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if (insn0 & 0x80)
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{
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/* SRC */
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if (((insn8 & MASK_LOW_BYTE) == MASK_LOW_BYTE)
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&& ((index2 == 0) || (index2 == 1) || (index2 == 2) || (index2 == 4)
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|| (index2 == 5) || (index2 == 6)))
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second = TRUE;
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else if (((insn8 & MASK_LOW_BYTE) == 0x0D) && (index2 == 0))
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second = TRUE;
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else if ((module2 == 0x0E)
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&& ((index2 == 0) || (index2 == 1) || (index2 == 2)))
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second = TRUE;
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else
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{
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for (reg_x = &system_reg_table[0];
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reg_x->reg_name != NULL && reg_x;
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++reg_x)
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{
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if ((reg_x->Mod_name == (insn8 & MASK_LOW_BYTE))
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&& (reg_x->Mod_index == (((insn8 & 0xf0) >> 4))))
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{
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second = TRUE;
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second_reg = reg_x->reg_name;
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break;
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}
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}
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}
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if (second)
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{
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if ((module1 == 0x0A && index1 == 0x0)
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&& (module2 == 0x0A && index2 == 0x01))
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return FALSE;
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return TRUE;
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}
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return FALSE;
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}
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return first;
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}
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static void
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maxq_print_arg (MAX_ARG_TYPE arg,
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struct disassemble_info * info,
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group_info grp)
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{
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switch (arg)
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{
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case FLAG_C:
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info->fprintf_func (info->stream, "C");
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break;
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case FLAG_NC:
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info->fprintf_func (info->stream, "NC");
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break;
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case FLAG_Z:
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info->fprintf_func (info->stream, "Z");
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break;
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case FLAG_NZ:
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info->fprintf_func (info->stream, "NZ");
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break;
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case FLAG_S:
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info->fprintf_func (info->stream, "S");
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break;
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case FLAG_E:
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info->fprintf_func (info->stream, "E");
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break;
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case FLAG_NE:
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info->fprintf_func (info->stream, "NE");
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break;
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case ACC_BIT:
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info->fprintf_func (info->stream, "Acc");
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if ((grp.flag & BIT_NO) == BIT_NO)
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info->fprintf_func (info->stream, ".%d", grp.bit_no);
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break;
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case A_BIT_0:
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info->fprintf_func (info->stream, "#0");
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break;
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case A_BIT_1:
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info->fprintf_func (info->stream, "#1");
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break;
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default:
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break;
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}
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}
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static unsigned char
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get_group (const unsigned int insn)
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{
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if (check_move ((insn >> 8), (insn & _DECODE_LOWBYTE)))
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return 8;
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if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0A00)
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{
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/* && condition with sec part added on 26 May for resolving 2 & 3 grp
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conflict. */
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if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x000A)
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&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
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{
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if ((insn & _DECODE_HIGHNIB_HIGHBYTE) == 0x8000)
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return 2;
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else
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return 3;
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}
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return 1;
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}
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else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0C00)
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{
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if (((insn & _DECODE_LOWBYTE) == 0x000D) && JUMP_CHECK (insn)
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&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
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return 6;
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else if ((insn & _DECODE_LOWBYTE) == 0x008D)
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return 7;
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return 5;
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}
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else if (((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0D00)
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&& (((insn & _DECODE_4TO6_HIGHBYTE) == 0x3000)
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x4000)
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x5000)
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|| ((insn & _DECODE_4TO6_HIGHBYTE) == 0x0000)))
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return 10;
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else if ((insn & _DECODE_LOWBYTE) == 0x000D)
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return 11;
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else if ((insn & _DECODE_LOWBYTE) == 0x008D)
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return 12;
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else if ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800)
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return 13;
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else if ((insn & _DECODE_LOWNIB_HIGHBYTE) == 0x0700)
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return 9;
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else if (((insn & _DECODE_LOWNIB_LOWBYTE) == 0x0007)
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&& ((insn & _DECODE_GET_F_HIGHBYTE) == 0x8000))
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return 4;
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return 8;
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}
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static void
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get_insn_opcode (const unsigned int insn, group_info *i)
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{
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static unsigned char pfx_flag = 0;
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static unsigned char count_for_pfx = 0;
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i->flag ^= i->flag;
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i->bit_no ^= i->bit_no;
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i->dst ^= i->dst;
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i->fbit ^= i->fbit;
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i->group_no ^= i->group_no;
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i->src ^= i->src;
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i->sub_opcode ^= i->sub_opcode;
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if (count_for_pfx > 0)
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count_for_pfx++;
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if (((insn >> 8) == 0x0b) || ((insn >> 8) == 0x2b))
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{
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pfx_flag = 1;
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count_for_pfx = 1;
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}
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i->group_no = get_group (insn);
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if (pfx_flag && (i->group_no == 0x0D) && (count_for_pfx == 2)
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&& ((insn & _DECODE_0TO6_HIGHBYTE) == 0x7800))
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{
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i->group_no = 0x08;
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count_for_pfx = 0;
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pfx_flag ^= pfx_flag;
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}
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switch (i->group_no)
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{
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case 1:
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i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
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i->flag |= SUB_OP;
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i->src = ((insn & _DECODE_LOWBYTE));
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i->flag |= SRC;
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i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
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i->flag |= FORMAT;
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break;
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case 2:
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i->sub_opcode = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
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i->flag |= SUB_OP;
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break;
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case 3:
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i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
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i->flag |= SUB_OP;
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i->bit_no = ((insn & _DECODE_HIGHNIB_LOWBYTE) >> 4);
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i->flag |= BIT_NO;
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break;
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case 4:
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i->sub_opcode = ((insn & _DECODE_BIT7_LOWBYTE) >> 7);
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i->flag |= SUB_OP;
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i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
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i->flag |= DST;
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i->bit_no = ((insn & _DECODE_4TO6_LOWBYTE) >> 4);
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i->flag |= BIT_NO;
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break;
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case 5:
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i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
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i->flag |= SUB_OP;
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i->src = ((insn & _DECODE_LOWBYTE));
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i->flag |= SRC;
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i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
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i->flag |= FORMAT;
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break;
|
|
|
|
case 6:
|
|
i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
|
|
i->flag |= SUB_OP;
|
|
break;
|
|
|
|
case 7:
|
|
i->sub_opcode = ((insn & _DECODE_HIGHNIB_HIGHBYTE) >> 12);
|
|
i->flag |= SUB_OP;
|
|
break;
|
|
|
|
case 8:
|
|
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
|
|
i->flag |= DST;
|
|
i->src = ((insn & _DECODE_LOWBYTE));
|
|
i->flag |= SRC;
|
|
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
|
|
i->flag |= FORMAT;
|
|
break;
|
|
|
|
case 9:
|
|
i->sub_opcode = ((insn & _DECODE_0TO2_HIGHBYTE) >> 8);
|
|
i->flag |= SUB_OP;
|
|
i->bit_no = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
|
|
i->flag |= BIT_NO;
|
|
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
|
|
i->flag |= FORMAT;
|
|
i->src = ((insn & _DECODE_LOWBYTE));
|
|
i->flag |= SRC;
|
|
break;
|
|
|
|
case 10:
|
|
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
|
|
i->flag |= SUB_OP;
|
|
i->src = ((insn & _DECODE_LOWBYTE));
|
|
i->flag |= SRC;
|
|
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
|
|
i->flag |= FORMAT;
|
|
break;
|
|
|
|
case 11:
|
|
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
|
|
i->flag |= DST;
|
|
break;
|
|
|
|
case 12:
|
|
i->dst = ((insn & _DECODE_0TO6_HIGHBYTE) >> 8);
|
|
i->flag |= DST;
|
|
break;
|
|
|
|
case 13:
|
|
i->sub_opcode = ((insn & _DECODE_4TO6_HIGHBYTE) >> 12);
|
|
i->flag |= SUB_OP;
|
|
i->src = ((insn & _DECODE_LOWBYTE));
|
|
i->flag |= SRC;
|
|
i->fbit = ((insn & _DECODE_GET_F_HIGHBYTE) >> 15);
|
|
i->flag |= FORMAT;
|
|
break;
|
|
|
|
}
|
|
return;
|
|
}
|
|
|
|
|
|
/* Print one instruction from MEMADDR on INFO->STREAM. Return the size of the
|
|
instruction (always 2 on MAXQ20). */
|
|
|
|
static int
|
|
print_insn (bfd_vma memaddr, struct disassemble_info *info,
|
|
enum bfd_endian endianess)
|
|
{
|
|
/* The raw instruction. */
|
|
unsigned char insn[2], insn0, insn8, derived_code;
|
|
unsigned int format;
|
|
unsigned int actual_operands;
|
|
unsigned int i;
|
|
/* The group_info collected/decoded. */
|
|
group_info grp;
|
|
MAXQ20_OPCODE_INFO const *opcode;
|
|
int status;
|
|
|
|
format = 0;
|
|
|
|
status = info->read_memory_func (memaddr, (bfd_byte *) & insn[0], 2, info);
|
|
|
|
if (status != 0)
|
|
{
|
|
info->memory_error_func (status, memaddr, info);
|
|
return -1;
|
|
}
|
|
|
|
insn8 = insn[1];
|
|
insn0 = insn[0];
|
|
|
|
/* FIXME: Endianness always little. */
|
|
if (endianess == BFD_ENDIAN_BIG)
|
|
get_insn_opcode (((insn[0] << 8) | (insn[1])), &grp);
|
|
else
|
|
get_insn_opcode (((insn[1] << 8) | (insn[0])), &grp);
|
|
|
|
derived_code = ((grp.group_no << 4) | grp.sub_opcode);
|
|
|
|
if (insn[0] == 0 && insn[1] == 0)
|
|
{
|
|
info->fprintf_func (info->stream, "00 00");
|
|
return 2;
|
|
}
|
|
|
|
/* The opcode is always in insn0. */
|
|
for (opcode = &op_table[0]; opcode->name != NULL; ++opcode)
|
|
{
|
|
if (opcode->instr_id == derived_code)
|
|
{
|
|
if (opcode->instr_id == 0x3D)
|
|
{
|
|
if ((grp.bit_no == 0) && (opcode->arg[1] != A_BIT_0))
|
|
continue;
|
|
if ((grp.bit_no == 1) && (opcode->arg[1] != A_BIT_1))
|
|
continue;
|
|
if ((grp.bit_no == 3) && (opcode->arg[0] != 0))
|
|
continue;
|
|
}
|
|
|
|
info->fprintf_func (info->stream, "%s ", opcode->name);
|
|
|
|
actual_operands = 0;
|
|
|
|
if ((grp.flag & SRC) == SRC)
|
|
actual_operands++;
|
|
|
|
if ((grp.flag & DST) == DST)
|
|
actual_operands++;
|
|
|
|
/* If Implict FLAG in the Instruction. */
|
|
if ((opcode->op_number > actual_operands)
|
|
&& !((grp.flag & SRC) == SRC) && !((grp.flag & DST) == DST))
|
|
{
|
|
for (i = 0; i < opcode->op_number; i++)
|
|
{
|
|
if (i == 1 && (opcode->arg[1] != NO_ARG))
|
|
info->fprintf_func (info->stream, ",");
|
|
maxq_print_arg (opcode->arg[i], info, grp);
|
|
}
|
|
}
|
|
|
|
/* DST is ABSENT in the grp. */
|
|
if ((opcode->op_number > actual_operands)
|
|
&& ((grp.flag & SRC) == SRC))
|
|
{
|
|
maxq_print_arg (opcode->arg[0], info, grp);
|
|
info->fprintf_func (info->stream, " ");
|
|
|
|
if (opcode->instr_id == 0xA4)
|
|
info->fprintf_func (info->stream, "LC[0]");
|
|
|
|
if (opcode->instr_id == 0xA5)
|
|
info->fprintf_func (info->stream, "LC[1]");
|
|
|
|
if ((grp.flag & SRC) == SRC)
|
|
info->fprintf_func (info->stream, ",");
|
|
}
|
|
|
|
if ((grp.flag & DST) == DST)
|
|
{
|
|
if ((grp.flag & BIT_NO) == BIT_NO)
|
|
{
|
|
info->fprintf_func (info->stream, " %s.%d",
|
|
get_reg_name (grp.dst,
|
|
(type1) 0 /*DST*/),
|
|
grp.bit_no);
|
|
}
|
|
else
|
|
info->fprintf_func (info->stream, " %s",
|
|
get_reg_name (grp.dst, (type1) 0));
|
|
}
|
|
|
|
/* SRC is ABSENT in the grp. */
|
|
if ((opcode->op_number > actual_operands)
|
|
&& ((grp.flag & DST) == DST))
|
|
{
|
|
info->fprintf_func (info->stream, ",");
|
|
maxq_print_arg (opcode->arg[1], info, grp);
|
|
info->fprintf_func (info->stream, " ");
|
|
}
|
|
|
|
if ((grp.flag & SRC) == SRC)
|
|
{
|
|
if ((grp.flag & DST) == DST)
|
|
info->fprintf_func (info->stream, ",");
|
|
|
|
if ((grp.flag & BIT_NO) == BIT_NO)
|
|
{
|
|
format = opcode->format;
|
|
|
|
if ((grp.flag & FORMAT) == FORMAT)
|
|
format = grp.fbit;
|
|
if (format == 1)
|
|
info->fprintf_func (info->stream, " %s.%d",
|
|
get_reg_name (grp.src,
|
|
(type1) 1 /*SRC*/),
|
|
grp.bit_no);
|
|
if (format == 0)
|
|
info->fprintf_func (info->stream, " #%02xh.%d",
|
|
grp.src, grp.bit_no);
|
|
}
|
|
else
|
|
{
|
|
format = opcode->format;
|
|
|
|
if ((grp.flag & FORMAT) == FORMAT)
|
|
format = grp.fbit;
|
|
if (format == 1)
|
|
info->fprintf_func (info->stream, " %s",
|
|
get_reg_name (grp.src,
|
|
(type1) 1 /*SRC*/));
|
|
if (format == 0)
|
|
info->fprintf_func (info->stream, " #%02xh",
|
|
(grp.src));
|
|
}
|
|
}
|
|
|
|
return 2;
|
|
}
|
|
}
|
|
|
|
info->fprintf_func (info->stream, "Unable to Decode : %02x %02x",
|
|
insn[0], insn[1]);
|
|
return 2;
|
|
}
|
|
|
|
int
|
|
print_insn_maxq_little (bfd_vma memaddr, struct disassemble_info *info)
|
|
{
|
|
return print_insn (memaddr, info, BFD_ENDIAN_LITTLE);
|
|
}
|