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275f450c27
that a register should be ignored, supply a value for the register from the raw registers[] buffer.
785 lines
20 KiB
C
785 lines
20 KiB
C
/* Cache and manage the values of registers for GDB, the GNU debugger.
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Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "target.h"
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#include "gdbarch.h"
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#include "gdbcmd.h"
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#include "regcache.h"
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#include "gdb_assert.h"
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/*
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* DATA STRUCTURE
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*
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* Here is the actual register cache.
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*/
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/* NOTE: this is a write-through cache. There is no "dirty" bit for
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recording if the register values have been changed (eg. by the
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user). Therefore all registers must be written back to the
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target when appropriate. */
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/* REGISTERS contains the cached register values (in target byte order). */
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char *registers;
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/* REGISTER_VALID is 0 if the register needs to be fetched,
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1 if it has been fetched, and
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-1 if the register value was not available.
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"Not available" means don't try to fetch it again. */
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signed char *register_valid;
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/* The thread/process associated with the current set of registers. */
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static ptid_t registers_ptid;
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/*
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* FUNCTIONS:
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*/
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/* REGISTER_CACHED()
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Returns 0 if the value is not in the cache (needs fetch).
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>0 if the value is in the cache.
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<0 if the value is permanently unavailable (don't ask again). */
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int
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register_cached (int regnum)
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{
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return register_valid[regnum];
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}
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/* Record that REGNUM's value is cached if STATE is >0, uncached but
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fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
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void
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set_register_cached (int regnum, int state)
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{
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register_valid[regnum] = state;
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}
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/* REGISTER_CHANGED
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invalidate a single register REGNUM in the cache */
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void
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register_changed (int regnum)
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{
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set_register_cached (regnum, 0);
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}
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/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
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else return a pointer to the start of the cache buffer. */
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char *
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register_buffer (int regnum)
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{
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if (regnum < 0)
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return registers;
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else
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return ®isters[REGISTER_BYTE (regnum)];
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}
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/* Return whether register REGNUM is a real register. */
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static int
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real_register (int regnum)
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{
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return regnum >= 0 && regnum < NUM_REGS;
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}
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/* Return whether register REGNUM is a pseudo register. */
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static int
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pseudo_register (int regnum)
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{
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return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
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}
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/* Fetch register REGNUM into the cache. */
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static void
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fetch_register (int regnum)
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{
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if (real_register (regnum))
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target_fetch_registers (regnum);
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else if (pseudo_register (regnum))
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FETCH_PSEUDO_REGISTER (regnum);
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}
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/* Write register REGNUM cached value to the target. */
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static void
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store_register (int regnum)
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{
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if (real_register (regnum))
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target_store_registers (regnum);
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else if (pseudo_register (regnum))
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STORE_PSEUDO_REGISTER (regnum);
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}
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/* Low level examining and depositing of registers.
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The caller is responsible for making sure that the inferior is
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stopped before calling the fetching routines, or it will get
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garbage. (a change from GDB version 3, in which the caller got the
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value from the last stop). */
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/* REGISTERS_CHANGED ()
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Indicate that registers may have changed, so invalidate the cache. */
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void
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registers_changed (void)
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{
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int i;
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registers_ptid = pid_to_ptid (-1);
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/* Force cleanup of any alloca areas if using C alloca instead of
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a builtin alloca. This particular call is used to clean up
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areas allocated by low level target code which may build up
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during lengthy interactions between gdb and the target before
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gdb gives control to the user (ie watchpoints). */
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alloca (0);
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for (i = 0; i < NUM_REGS; i++)
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set_register_cached (i, 0);
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/* Assume that if all the hardware regs have changed,
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then so have the pseudo-registers. */
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for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
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set_register_cached (i, 0);
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if (registers_changed_hook)
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registers_changed_hook ();
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}
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/* REGISTERS_FETCHED ()
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Indicate that all registers have been fetched, so mark them all valid. */
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void
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registers_fetched (void)
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{
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int i;
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for (i = 0; i < NUM_REGS; i++)
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set_register_cached (i, 1);
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/* Do not assume that the pseudo-regs have also been fetched.
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Fetching all real regs might not account for all pseudo-regs. */
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}
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/* read_register_bytes and write_register_bytes are generally a *BAD*
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idea. They are inefficient because they need to check for partial
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updates, which can only be done by scanning through all of the
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registers and seeing if the bytes that are being read/written fall
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inside of an invalid register. [The main reason this is necessary
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is that register sizes can vary, so a simple index won't suffice.]
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It is far better to call read_register_gen and write_register_gen
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if you want to get at the raw register contents, as it only takes a
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regnum as an argument, and therefore can't do a partial register
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update.
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Prior to the recent fixes to check for partial updates, both read
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and write_register_bytes always checked to see if any registers
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were stale, and then called target_fetch_registers (-1) to update
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the whole set. This caused really slowed things down for remote
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targets. */
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/* Copy INLEN bytes of consecutive data from registers
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starting with the INREGBYTE'th byte of register data
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into memory at MYADDR. */
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void
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read_register_bytes (int in_start, char *in_buf, int in_len)
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{
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int in_end = in_start + in_len;
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int regnum;
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char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
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/* See if we are trying to read bytes from out-of-date registers. If so,
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update just those registers. */
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for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
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{
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int reg_start;
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int reg_end;
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int reg_len;
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int start;
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int end;
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int byte;
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reg_start = REGISTER_BYTE (regnum);
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reg_len = REGISTER_RAW_SIZE (regnum);
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reg_end = reg_start + reg_len;
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if (reg_end <= in_start || in_end <= reg_start)
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/* The range the user wants to read doesn't overlap with regnum. */
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continue;
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if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
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/* Force the cache to fetch the entire register. */
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read_register_gen (regnum, reg_buf);
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else
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/* Legacy note: even though this register is ``invalid'' we
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still need to return something. It would appear that some
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code relies on apparent gaps in the register array also
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being returned. */
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/* FIXME: cagney/2001-08-18: This is just silly. It defeats
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the entire register read/write flow of control. Must
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resist temptation to return 0xdeadbeef. */
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memcpy (reg_buf, registers + reg_start, reg_len);
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/* Legacy note: This function, for some reason, allows a NULL
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input buffer. If the buffer is NULL, the registers are still
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fetched, just the final transfer is skipped. */
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if (in_buf == NULL)
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continue;
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/* start = max (reg_start, in_start) */
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if (reg_start > in_start)
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start = reg_start;
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else
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start = in_start;
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/* end = min (reg_end, in_end) */
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if (reg_end < in_end)
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end = reg_end;
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else
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end = in_end;
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/* Transfer just the bytes common to both IN_BUF and REG_BUF */
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for (byte = start; byte < end; byte++)
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{
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in_buf[byte - in_start] = reg_buf[byte - reg_start];
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}
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}
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}
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/* Read register REGNUM into memory at MYADDR, which must be large
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enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
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register is known to be the size of a CORE_ADDR or smaller,
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read_register can be used instead. */
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static void
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legacy_read_register_gen (int regnum, char *myaddr)
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{
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gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
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if (! ptid_equal (registers_ptid, inferior_ptid))
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{
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registers_changed ();
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registers_ptid = inferior_ptid;
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}
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if (!register_cached (regnum))
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fetch_register (regnum);
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memcpy (myaddr, register_buffer (regnum),
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REGISTER_RAW_SIZE (regnum));
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}
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void
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regcache_read (int rawnum, char *buf)
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{
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gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
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/* For moment, just use underlying legacy code. Ulgh!!! */
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legacy_read_register_gen (rawnum, buf);
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}
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void
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read_register_gen (int regnum, char *buf)
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{
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if (! gdbarch_register_read_p (current_gdbarch))
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{
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legacy_read_register_gen (regnum, buf);
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return;
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}
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gdbarch_register_read (current_gdbarch, regnum, buf);
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}
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/* Write register REGNUM at MYADDR to the target. MYADDR points at
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REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
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static void
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legacy_write_register_gen (int regnum, char *myaddr)
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{
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int size;
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gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
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/* On the sparc, writing %g0 is a no-op, so we don't even want to
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change the registers array if something writes to this register. */
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if (CANNOT_STORE_REGISTER (regnum))
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return;
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if (! ptid_equal (registers_ptid, inferior_ptid))
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{
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registers_changed ();
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registers_ptid = inferior_ptid;
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}
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size = REGISTER_RAW_SIZE (regnum);
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if (real_register (regnum))
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{
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/* If we have a valid copy of the register, and new value == old
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value, then don't bother doing the actual store. */
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if (register_cached (regnum)
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&& memcmp (register_buffer (regnum), myaddr, size) == 0)
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return;
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else
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target_prepare_to_store ();
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}
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memcpy (register_buffer (regnum), myaddr, size);
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set_register_cached (regnum, 1);
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store_register (regnum);
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}
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void
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regcache_write (int rawnum, char *buf)
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{
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gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
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/* For moment, just use underlying legacy code. Ulgh!!! */
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legacy_write_register_gen (rawnum, buf);
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}
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void
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write_register_gen (int regnum, char *buf)
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{
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if (! gdbarch_register_write_p (current_gdbarch))
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{
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legacy_write_register_gen (regnum, buf);
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return;
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}
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gdbarch_register_write (current_gdbarch, regnum, buf);
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}
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/* Copy INLEN bytes of consecutive data from memory at MYADDR
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into registers starting with the MYREGSTART'th byte of register data. */
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void
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write_register_bytes (int myregstart, char *myaddr, int inlen)
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{
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int myregend = myregstart + inlen;
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int regnum;
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target_prepare_to_store ();
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/* Scan through the registers updating any that are covered by the
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range myregstart<=>myregend using write_register_gen, which does
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nice things like handling threads, and avoiding updates when the
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new and old contents are the same. */
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for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
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{
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int regstart, regend;
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regstart = REGISTER_BYTE (regnum);
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regend = regstart + REGISTER_RAW_SIZE (regnum);
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/* Is this register completely outside the range the user is writing? */
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if (myregend <= regstart || regend <= myregstart)
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/* do nothing */ ;
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/* Is this register completely within the range the user is writing? */
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else if (myregstart <= regstart && regend <= myregend)
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write_register_gen (regnum, myaddr + (regstart - myregstart));
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/* The register partially overlaps the range being written. */
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else
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{
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char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
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/* What's the overlap between this register's bytes and
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those the caller wants to write? */
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int overlapstart = max (regstart, myregstart);
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int overlapend = min (regend, myregend);
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/* We may be doing a partial update of an invalid register.
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Update it from the target before scribbling on it. */
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read_register_gen (regnum, regbuf);
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memcpy (registers + overlapstart,
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myaddr + (overlapstart - myregstart),
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overlapend - overlapstart);
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store_register (regnum);
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}
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}
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}
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/* Return the contents of register REGNUM as an unsigned integer. */
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ULONGEST
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read_register (int regnum)
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{
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char *buf = alloca (REGISTER_RAW_SIZE (regnum));
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read_register_gen (regnum, buf);
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return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
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}
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ULONGEST
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read_register_pid (int regnum, ptid_t ptid)
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{
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ptid_t save_ptid;
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int save_pid;
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CORE_ADDR retval;
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if (ptid_equal (ptid, inferior_ptid))
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return read_register (regnum);
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save_ptid = inferior_ptid;
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inferior_ptid = ptid;
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retval = read_register (regnum);
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inferior_ptid = save_ptid;
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return retval;
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}
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/* Return the contents of register REGNUM as a signed integer. */
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LONGEST
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read_signed_register (int regnum)
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{
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void *buf = alloca (REGISTER_RAW_SIZE (regnum));
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read_register_gen (regnum, buf);
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return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
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}
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LONGEST
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read_signed_register_pid (int regnum, ptid_t ptid)
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{
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ptid_t save_ptid;
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LONGEST retval;
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if (ptid_equal (ptid, inferior_ptid))
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return read_signed_register (regnum);
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save_ptid = inferior_ptid;
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inferior_ptid = ptid;
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retval = read_signed_register (regnum);
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inferior_ptid = save_ptid;
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return retval;
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}
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/* Store VALUE into the raw contents of register number REGNUM. */
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void
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write_register (int regnum, LONGEST val)
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{
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void *buf;
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int size;
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size = REGISTER_RAW_SIZE (regnum);
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buf = alloca (size);
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store_signed_integer (buf, size, (LONGEST) val);
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write_register_gen (regnum, buf);
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}
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void
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write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
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{
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ptid_t save_ptid;
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if (ptid_equal (ptid, inferior_ptid))
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{
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write_register (regnum, val);
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return;
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}
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save_ptid = inferior_ptid;
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inferior_ptid = ptid;
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write_register (regnum, val);
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inferior_ptid = save_ptid;
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}
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/* SUPPLY_REGISTER()
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Record that register REGNUM contains VAL. This is used when the
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value is obtained from the inferior or core dump, so there is no
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need to store the value there.
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If VAL is a NULL pointer, then it's probably an unsupported register.
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We just set its value to all zeros. We might want to record this
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fact, and report it to the users of read_register and friends. */
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void
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supply_register (int regnum, char *val)
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{
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#if 1
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if (! ptid_equal (registers_ptid, inferior_ptid))
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{
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registers_changed ();
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registers_ptid = inferior_ptid;
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}
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#endif
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set_register_cached (regnum, 1);
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if (val)
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|
memcpy (register_buffer (regnum), val,
|
|
REGISTER_RAW_SIZE (regnum));
|
|
else
|
|
memset (register_buffer (regnum), '\000',
|
|
REGISTER_RAW_SIZE (regnum));
|
|
|
|
/* On some architectures, e.g. HPPA, there are a few stray bits in
|
|
some registers, that the rest of the code would like to ignore. */
|
|
|
|
/* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
|
|
going to be deprecated. Instead architectures will leave the raw
|
|
register value as is and instead clean things up as they pass
|
|
through the method gdbarch_register_read() clean up the
|
|
values. */
|
|
|
|
#ifdef CLEAN_UP_REGISTER_VALUE
|
|
CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
|
|
#endif
|
|
}
|
|
|
|
/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
|
|
Special handling for registers PC, SP, and FP. */
|
|
|
|
/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
|
|
read_pc_pid(), read_pc(), generic_target_write_pc(),
|
|
write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
|
|
generic_target_write_sp(), write_sp(), generic_target_read_fp(),
|
|
read_fp(), generic_target_write_fp(), write_fp will eventually be
|
|
moved out of the reg-cache into either frame.[hc] or to the
|
|
multi-arch framework. The are not part of the raw register cache. */
|
|
|
|
/* This routine is getting awfully cluttered with #if's. It's probably
|
|
time to turn this into READ_PC and define it in the tm.h file.
|
|
Ditto for write_pc.
|
|
|
|
1999-06-08: The following were re-written so that it assumes the
|
|
existence of a TARGET_READ_PC et.al. macro. A default generic
|
|
version of that macro is made available where needed.
|
|
|
|
Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
|
|
by the multi-arch framework, it will eventually be possible to
|
|
eliminate the intermediate read_pc_pid(). The client would call
|
|
TARGET_READ_PC directly. (cagney). */
|
|
|
|
CORE_ADDR
|
|
generic_target_read_pc (ptid_t ptid)
|
|
{
|
|
#ifdef PC_REGNUM
|
|
if (PC_REGNUM >= 0)
|
|
{
|
|
CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
|
|
return pc_val;
|
|
}
|
|
#endif
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_read_pc");
|
|
return 0;
|
|
}
|
|
|
|
CORE_ADDR
|
|
read_pc_pid (ptid_t ptid)
|
|
{
|
|
ptid_t saved_inferior_ptid;
|
|
CORE_ADDR pc_val;
|
|
|
|
/* In case ptid != inferior_ptid. */
|
|
saved_inferior_ptid = inferior_ptid;
|
|
inferior_ptid = ptid;
|
|
|
|
pc_val = TARGET_READ_PC (ptid);
|
|
|
|
inferior_ptid = saved_inferior_ptid;
|
|
return pc_val;
|
|
}
|
|
|
|
CORE_ADDR
|
|
read_pc (void)
|
|
{
|
|
return read_pc_pid (inferior_ptid);
|
|
}
|
|
|
|
void
|
|
generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
|
|
{
|
|
#ifdef PC_REGNUM
|
|
if (PC_REGNUM >= 0)
|
|
write_register_pid (PC_REGNUM, pc, ptid);
|
|
if (NPC_REGNUM >= 0)
|
|
write_register_pid (NPC_REGNUM, pc + 4, ptid);
|
|
if (NNPC_REGNUM >= 0)
|
|
write_register_pid (NNPC_REGNUM, pc + 8, ptid);
|
|
#else
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_write_pc");
|
|
#endif
|
|
}
|
|
|
|
void
|
|
write_pc_pid (CORE_ADDR pc, ptid_t ptid)
|
|
{
|
|
ptid_t saved_inferior_ptid;
|
|
|
|
/* In case ptid != inferior_ptid. */
|
|
saved_inferior_ptid = inferior_ptid;
|
|
inferior_ptid = ptid;
|
|
|
|
TARGET_WRITE_PC (pc, ptid);
|
|
|
|
inferior_ptid = saved_inferior_ptid;
|
|
}
|
|
|
|
void
|
|
write_pc (CORE_ADDR pc)
|
|
{
|
|
write_pc_pid (pc, inferior_ptid);
|
|
}
|
|
|
|
/* Cope with strage ways of getting to the stack and frame pointers */
|
|
|
|
CORE_ADDR
|
|
generic_target_read_sp (void)
|
|
{
|
|
#ifdef SP_REGNUM
|
|
if (SP_REGNUM >= 0)
|
|
return read_register (SP_REGNUM);
|
|
#endif
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_read_sp");
|
|
}
|
|
|
|
CORE_ADDR
|
|
read_sp (void)
|
|
{
|
|
return TARGET_READ_SP ();
|
|
}
|
|
|
|
void
|
|
generic_target_write_sp (CORE_ADDR val)
|
|
{
|
|
#ifdef SP_REGNUM
|
|
if (SP_REGNUM >= 0)
|
|
{
|
|
write_register (SP_REGNUM, val);
|
|
return;
|
|
}
|
|
#endif
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_write_sp");
|
|
}
|
|
|
|
void
|
|
write_sp (CORE_ADDR val)
|
|
{
|
|
TARGET_WRITE_SP (val);
|
|
}
|
|
|
|
CORE_ADDR
|
|
generic_target_read_fp (void)
|
|
{
|
|
#ifdef FP_REGNUM
|
|
if (FP_REGNUM >= 0)
|
|
return read_register (FP_REGNUM);
|
|
#endif
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_read_fp");
|
|
}
|
|
|
|
CORE_ADDR
|
|
read_fp (void)
|
|
{
|
|
return TARGET_READ_FP ();
|
|
}
|
|
|
|
void
|
|
generic_target_write_fp (CORE_ADDR val)
|
|
{
|
|
#ifdef FP_REGNUM
|
|
if (FP_REGNUM >= 0)
|
|
{
|
|
write_register (FP_REGNUM, val);
|
|
return;
|
|
}
|
|
#endif
|
|
internal_error (__FILE__, __LINE__,
|
|
"generic_target_write_fp");
|
|
}
|
|
|
|
void
|
|
write_fp (CORE_ADDR val)
|
|
{
|
|
TARGET_WRITE_FP (val);
|
|
}
|
|
|
|
/* ARGSUSED */
|
|
static void
|
|
reg_flush_command (char *command, int from_tty)
|
|
{
|
|
/* Force-flush the register cache. */
|
|
registers_changed ();
|
|
if (from_tty)
|
|
printf_filtered ("Register cache flushed.\n");
|
|
}
|
|
|
|
|
|
static void
|
|
build_regcache (void)
|
|
{
|
|
/* We allocate some extra slop since we do a lot of memcpy's around
|
|
`registers', and failing-soft is better than failing hard. */
|
|
int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
|
|
int sizeof_register_valid =
|
|
(NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
|
|
registers = xmalloc (sizeof_registers);
|
|
memset (registers, 0, sizeof_registers);
|
|
register_valid = xmalloc (sizeof_register_valid);
|
|
memset (register_valid, 0, sizeof_register_valid);
|
|
}
|
|
|
|
void
|
|
_initialize_regcache (void)
|
|
{
|
|
build_regcache ();
|
|
|
|
register_gdbarch_swap (®isters, sizeof (registers), NULL);
|
|
register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL);
|
|
register_gdbarch_swap (NULL, 0, build_regcache);
|
|
|
|
add_com ("flushregs", class_maintenance, reg_flush_command,
|
|
"Force gdb to flush its register cache (maintainer command)");
|
|
|
|
/* Initialize the thread/process associated with the current set of
|
|
registers. For now, -1 is special, and means `no current process'. */
|
|
registers_ptid = pid_to_ptid (-1);
|
|
}
|