mirror of
https://github.com/darlinghq/darling-objc4.git
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208 lines
4.4 KiB
C
208 lines
4.4 KiB
C
/*
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* @APPLE_LICENSE_HEADER_START@
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*
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* Copyright (c) 2018 Apple Inc. All Rights Reserved.
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*
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* This file contains Original Code and/or Modifications of Original Code
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* as defined in and that are subject to the Apple Public Source License
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* Version 2.0 (the 'License'). You may not use this file except in
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* compliance with the License. Please obtain a copy of the License at
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* http://www.opensource.apple.com/apsl/ and read it before using this
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* file.
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*
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* The Original Code and all software distributed under the License are
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* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
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* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
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* Please see the License for the specific language governing rights and
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* limitations under the License.
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*
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* @APPLE_LICENSE_HEADER_END@
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*/
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/********************************************************************
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*
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* arm64-asm.h - asm tools for arm64/arm64_32 and ROP/JOP
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*
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********************************************************************/
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#if __arm64__
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#include "objc-config.h"
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#if __LP64__
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// true arm64
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#define SUPPORT_TAGGED_POINTERS 1
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#define PTR .quad
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#define PTRSIZE 8
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#define PTRSHIFT 3 // 1<<PTRSHIFT == PTRSIZE
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// "p" registers are pointer-sized
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#define UXTP UXTX
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#define p0 x0
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#define p1 x1
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#define p2 x2
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#define p3 x3
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#define p4 x4
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#define p5 x5
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#define p6 x6
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#define p7 x7
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#define p8 x8
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#define p9 x9
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#define p10 x10
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#define p11 x11
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#define p12 x12
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#define p13 x13
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#define p14 x14
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#define p15 x15
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#define p16 x16
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#define p17 x17
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// true arm64
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#else
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// arm64_32
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#define SUPPORT_TAGGED_POINTERS 0
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#define PTR .long
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#define PTRSIZE 4
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#define PTRSHIFT 2 // 1<<PTRSHIFT == PTRSIZE
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// "p" registers are pointer-sized
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#define UXTP UXTW
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#define p0 w0
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#define p1 w1
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#define p2 w2
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#define p3 w3
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#define p4 w4
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#define p5 w5
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#define p6 w6
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#define p7 w7
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#define p8 w8
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#define p9 w9
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#define p10 w10
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#define p11 w11
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#define p12 w12
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#define p13 w13
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#define p14 w14
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#define p15 w15
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#define p16 w16
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#define p17 w17
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// arm64_32
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#endif
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#if __has_feature(ptrauth_returns)
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// ROP
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# define SignLR pacibsp
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# define AuthenticateLR autibsp
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#else
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// not ROP
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# define SignLR
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# define AuthenticateLR
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#endif
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#if __has_feature(ptrauth_calls)
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// JOP
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.macro TailCallFunctionPointer
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// $0 = function pointer value
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braaz $0
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.endmacro
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.macro TailCallCachedImp
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// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
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eor $1, $1, $2 // mix SEL into ptrauth modifier
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eor $1, $1, $3 // mix isa into ptrauth modifier
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brab $0, $1
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.endmacro
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.macro TailCallMethodListImp
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// $0 = method list imp, $1 = address of method list imp
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braa $0, $1
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.endmacro
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.macro TailCallBlockInvoke
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// $0 = invoke function, $1 = address of invoke function
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braa $0, $1
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.endmacro
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.macro AuthAndResignAsIMP
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// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
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// note: assumes the imp is not nil
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eor $1, $1, $2 // mix SEL into ptrauth modifier
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eor $1, $1, $3 // mix isa into ptrauth modifier
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autib $0, $1 // authenticate cached imp
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ldr xzr, [$0] // crash if authentication failed
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paciza $0 // resign cached imp as IMP
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.endmacro
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.macro ExtractISA
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and $0, $1, #ISA_MASK
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#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
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xpacd $0
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#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
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mov x10, $2
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movk x10, #ISA_SIGNING_DISCRIMINATOR, LSL #48
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autda $0, x10
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#endif
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.endmacro
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.macro AuthISASuper dst, addr_mutable, discriminator
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#if ISA_SIGNING_AUTH_MODE == ISA_SIGNING_AUTH
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movk \addr_mutable, #\discriminator, LSL #48
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autda \dst, \addr_mutable
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#elif ISA_SIGNING_AUTH_MODE == ISA_SIGNING_STRIP
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xpacd \dst
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#endif
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.endmacro
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.macro SignAsImp
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paciza $0
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.endmacro
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// JOP
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#else
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// not JOP
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.macro TailCallFunctionPointer
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// $0 = function pointer value
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br $0
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.endmacro
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.macro TailCallCachedImp
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// $0 = cached imp, $1 = address of cached imp, $2 = SEL, $3 = isa
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eor $0, $0, $3
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br $0
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.endmacro
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.macro TailCallMethodListImp
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// $0 = method list imp, $1 = address of method list imp
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br $0
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.endmacro
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.macro TailCallBlockInvoke
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// $0 = invoke function, $1 = address of invoke function
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br $0
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.endmacro
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.macro AuthAndResignAsIMP
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// $0 = cached imp, $1 = address of cached imp, $2 = SEL
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eor $0, $0, $3
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.endmacro
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.macro SignAsImp
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.endmacro
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.macro ExtractISA
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and $0, $1, #ISA_MASK
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.endmacro
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// not JOP
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#endif
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#define TailCallBlockInvoke TailCallMethodListImp
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// __arm64__
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#endif
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