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https://github.com/darlinghq/darling-xnu.git
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90 lines
3.6 KiB
C
90 lines
3.6 KiB
C
/* Copyright (c) (2012,2014,2015,2016,2017,2018,2019,2020) Apple Inc. All rights reserved.
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*
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* corecrypto is licensed under Apple Inc.’s Internal Use License Agreement (which
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* is contained in the License.txt file distributed with corecrypto) and only to
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* people who accept that license. IMPORTANT: Any license rights granted to you by
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* Apple Inc. (if any) are limited to internal use within your organization only on
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* devices and computers you own or control, for the sole purpose of verifying the
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* security characteristics and correct functioning of the Apple Software. You may
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* not, directly or indirectly, redistribute the Apple Software or any portions thereof.
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*/
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#ifndef CORECRYPTO_CC_RUNTIME_CONFIG_H_
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#define CORECRYPTO_CC_RUNTIME_CONFIG_H_
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#include <corecrypto/cc_config.h>
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/* Only intel systems have these runtime switches today. */
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#if defined(__x86_64__) || defined(__i386__)
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#if CC_KERNEL
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#include <i386/cpuid.h>
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#define CC_HAS_RDRAND() ((cpuid_features() & CPUID_FEATURE_RDRAND) != 0)
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#define CC_HAS_AESNI() ((cpuid_features() & CPUID_FEATURE_AES) != 0)
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#define CC_HAS_SupplementalSSE3() ((cpuid_features() & CPUID_FEATURE_SSSE3) != 0)
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#define CC_HAS_AVX1() ((cpuid_features() & CPUID_FEATURE_AVX1_0) != 0)
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#define CC_HAS_AVX2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX2) != 0)
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#define CC_HAS_AVX512_AND_IN_KERNEL() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX512F) !=0)
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#define CC_HAS_BMI2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_BMI2) != 0)
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#define CC_HAS_ADX() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_ADX) != 0)
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#elif CC_XNU_KERNEL_AVAILABLE && CC_INTERNAL_SDK
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#include <System/i386/cpu_capabilities.h>
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#define CC_HAS_RDRAND() (_get_cpu_capabilities() & kHasRDRAND)
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#define CC_HAS_AESNI() (_get_cpu_capabilities() & kHasAES)
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#define CC_HAS_SupplementalSSE3() (_get_cpu_capabilities() & kHasSupplementalSSE3)
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#define CC_HAS_AVX1() (_get_cpu_capabilities() & kHasAVX1_0)
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#define CC_HAS_AVX2() (_get_cpu_capabilities() & kHasAVX2_0)
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#define CC_HAS_AVX512_AND_IN_KERNEL() 0
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#define CC_HAS_BMI2() (_get_cpu_capabilities() & kHasBMI2)
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#define CC_HAS_ADX() (_get_cpu_capabilities() & kHasADX)
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#elif CC_SGX
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// SGX has no cpuid function, so these will fail
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#define CC_HAS_AESNI() 0
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#define CC_HAS_SupplementalSSE3() 0
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#define CC_HAS_AVX1() 0
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#define CC_HAS_AVX2() 0
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#define CC_HAS_AVX512_AND_IN_KERNEL() 0
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#define CC_HAS_BMI2() 0
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#define CC_HAS_RDRAND() 0
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#define CC_HAS_ADX() 0
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#else
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#define CC_HAS_AESNI() __builtin_cpu_supports("aes")
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#define CC_HAS_SupplementalSSE3() __builtin_cpu_supports("ssse3")
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#define CC_HAS_AVX1() __builtin_cpu_supports("avx")
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#define CC_HAS_AVX2() __builtin_cpu_supports("avx2")
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#define CC_HAS_AVX512_AND_IN_KERNEL() 0
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#define CC_HAS_BMI2() __builtin_cpu_supports("bmi2")
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#if CC_LINUX || !CC_INTERNAL_SDK
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#include <cpuid.h>
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#include <stdbool.h>
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CC_INLINE bool _cpu_supports_rdrand()
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{
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unsigned int eax, ebx, ecx, edx;
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__cpuid(1, eax, ebx, ecx, edx);
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return ecx & bit_RDRND;
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}
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CC_INLINE bool _cpu_supports_adx()
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{
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unsigned int eax, ebx, ecx, edx;
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__cpuid_count(7, 0, eax, ebx, ecx, edx);
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return ebx & bit_ADX;
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}
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#define CC_HAS_RDRAND() _cpu_supports_rdrand()
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#define CC_HAS_ADX() _cpu_supports_adx()
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#else
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#define CC_HAS_RDRAND() 0
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#define CC_HAS_ADX() 0
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#endif
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#endif
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#endif // defined(__x86_64__) || defined(__i386__)
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#endif /* CORECRYPTO_CC_RUNTIME_CONFIG_H_ */
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