From 30f97723db65c6be5329cf328d444917de1cf078 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 28 Oct 2014 08:50:25 -0400 Subject: [PATCH] Core: Fix potentially uninitialized variable warnings --- Source/Core/Core/HW/GPFifo.cpp | 2 +- .../Core/Core/PowerPC/JitILCommon/JitILBase_Branch.cpp | 2 +- Source/Core/Core/PowerPC/JitInterface.cpp | 10 +++------- Source/Core/Core/PowerPC/JitInterface.h | 4 ++-- 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/Source/Core/Core/HW/GPFifo.cpp b/Source/Core/Core/HW/GPFifo.cpp index 4676cc4942..54099b227a 100644 --- a/Source/Core/Core/HW/GPFifo.cpp +++ b/Source/Core/Core/HW/GPFifo.cpp @@ -86,7 +86,7 @@ void CheckGatherPipe() memmove(m_gatherPipe, m_gatherPipe + cnt, m_gatherPipeCount); // Profile where the FIFO writes are occurring. - JitInterface::CompileExceptionCheck(JitInterface::EXCEPTIONS_FIFO_WRITE); + JitInterface::CompileExceptionCheck(JitInterface::ExceptionType::EXCEPTIONS_FIFO_WRITE); } } diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Branch.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Branch.cpp index 88a2eb3cc3..e694fc23c2 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Branch.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Branch.cpp @@ -66,7 +66,7 @@ void JitILBase::bx(UGeckoInstruction inst) static IREmitter::InstLoc EmitCRTest(IREmitter::IRBuilder& ibuild, UGeckoInstruction inst) { IREmitter::InstLoc CRReg = ibuild.EmitLoadCR(inst.BI >> 2); - IREmitter::InstLoc CRTest; + IREmitter::InstLoc CRTest = nullptr; switch (3 - (inst.BI & 3)) { case CR_SO_BIT: diff --git a/Source/Core/Core/PowerPC/JitInterface.cpp b/Source/Core/Core/PowerPC/JitInterface.cpp index fd7392f6b3..bf4a41fcd0 100644 --- a/Source/Core/Core/PowerPC/JitInterface.cpp +++ b/Source/Core/Core/PowerPC/JitInterface.cpp @@ -237,23 +237,19 @@ namespace JitInterface return inst; } - void CompileExceptionCheck(int type) + void CompileExceptionCheck(ExceptionType type) { if (!jit) return; - std::unordered_set *exception_addresses; + std::unordered_set* exception_addresses = nullptr; switch (type) { - case EXCEPTIONS_FIFO_WRITE: - { + case ExceptionType::EXCEPTIONS_FIFO_WRITE: exception_addresses = &jit->js.fifoWriteAddresses; break; } - default: - ERROR_LOG(POWERPC, "Unknown exception check type"); - } if (PC != 0 && (exception_addresses->find(PC)) == (exception_addresses->end())) { diff --git a/Source/Core/Core/PowerPC/JitInterface.h b/Source/Core/Core/PowerPC/JitInterface.h index 3ed62edd40..cfa239d966 100644 --- a/Source/Core/Core/PowerPC/JitInterface.h +++ b/Source/Core/Core/PowerPC/JitInterface.h @@ -11,7 +11,7 @@ namespace JitInterface { - enum + enum class ExceptionType { EXCEPTIONS_FIFO_WRITE }; @@ -39,7 +39,7 @@ namespace JitInterface // If "forced" is true, a recompile is being requested on code that hasn't been modified. void InvalidateICache(u32 address, u32 size, bool forced); - void CompileExceptionCheck(int type); + void CompileExceptionCheck(ExceptionType type); void Shutdown(); }