dolphin-emu/dolphin
1
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2024-10-08 00:03:36 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

x64Emitter: short MOV for 64bit immediates (1)

Browse Source 
Prior to this commit, the emitter would unconditionally emit a 10-byte
instruction known as MOVABS when loading a 64-bit immediate to a
register.

0:  48 b8 ef be ad de ff    movabs rax,0xffffffffdeadbeef
7:  ff ff ff

With this change, it will instead emit a 7-byte instruction when it is
possible to express the 64-bit immediate using a signed 32-bit value.

0:  48 c7 c0 ef be ad de    mov    rax,0xffffffffdeadbeef
This commit is contained in:
Sintendo 2018-09-14 21:56:29 +02:00
parent ce9e9186f7
commit 575f1b309a
1 changed files with 14 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
Source/Core/Common/x64Emitter.cpp
View File

@ -1469,11 +1469,21 @@ void OpArg::WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& o
// mov reg64, imm64
else if (op == NormalOp::MOV)
{
emit->Write8(0xB8 + (offsetOrBaseReg & 7));
emit->Write64((u64)operand.offset);
return;
// movabs reg64, imm64 (10 bytes)
if (static_cast<s64>(operand.offset) != static_cast<s32>(operand.offset))
{
emit->Write8(0xB8 + (offsetOrBaseReg & 7));
emit->Write64(operand.offset);
return;
}
// mov reg64, simm32 (7 bytes)
emit->Write8(op_def.imm32);
immToWrite = 32;
}
else
{
ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Only MOV can take 64-bit imm");
}
ASSERT_MSG(DYNA_REC, 0, "WriteNormalOp - Only MOV can take 64-bit imm");
}
else
{