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bnxt_en: Add backing store V2 support
Add backing store V2 support. Thor2 controllers supports only the V2 support. MFC-After: 3 days Reviewed-by: Warner Losh <[email protected]> Differential-Revision: https://reviews.freebsd.org/D49727
This commit is contained in:
Sreekanth Reddy authored and Warner Losh committed
1 parent
bb90baed6c
commit
d5ce906da7
3 files changed
+153
-18
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@@ -727,11 +727,11 @@ struct bnxt_ctx_pg_info {
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#define BNXT_SET_CTX_PAGE_ATTR(attr) \
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do { \
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if (BNXT_PAGE_SIZE == 0x2000) \
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attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_SRQ_PG_SIZE_PG_8K; \
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attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_8K; \
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else if (BNXT_PAGE_SIZE == 0x10000) \
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attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_QPC_PG_SIZE_PG_64K; \
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attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_64K; \
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else \
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attr = HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_QPC_PG_SIZE_PG_4K; \
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attr = HWRM_FUNC_BACKING_STORE_CFG_INPUT_SRQ_PG_SIZE_PG_4K; \
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} while (0)
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struct bnxt_ctx_mem_type {
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@@ -746,6 +746,8 @@ struct bnxt_ctx_mem_type {
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#define BNXT_CTX_INIT_INVALID_OFFSET 0xffff
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u32 max_entries;
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u32 min_entries;
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u8 last:1;
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u8 mem_valid:1;
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u8 split_entry_cnt;
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#define BNXT_MAX_SPLIT_ENTRY 4
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union {
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@@ -781,9 +783,15 @@ struct bnxt_ctx_mem_type {
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#define BNXT_CTX_RQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_RQ_DB_SHADOW
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#define BNXT_CTX_SRQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_SRQ_DB_SHADOW
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#define BNXT_CTX_CQDBS HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_CQ_DB_SHADOW
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#define BNXT_CTX_QTKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_TKC
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#define BNXT_CTX_QRKC HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_QUIC_RKC
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#define BNXT_CTX_MAX (BNXT_CTX_TIM + 1)
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#define BNXT_CTX_L2_MAX (BNXT_CTX_FTQM + 1)
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#define BNXT_CTX_V2_MAX (HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_ROCE_HWRM_TRACE + 1)
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#define BNXT_CTX_SRT_TRACE HWRM_FUNC_BACKING_STORE_QCFG_V2_OUTPUT_TYPE_SRT_TRACE
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#define BNXT_CTX_ROCE_HWRM_TRACE HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_TYPE_ROCE_HWRM_TRACE
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#define BNXT_CTX_INV ((u16)-1)
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struct bnxt_ctx_mem_info {
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u8 tqm_fp_rings_count;
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@@ -350,12 +350,12 @@ qportcfg_exit:
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return rc;
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}
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static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc)
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static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc, int ctx_max)
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{
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struct bnxt_ctx_mem_info *ctx = softc->ctx_mem;
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u16 type;
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for (type = 0; type < BNXT_CTX_MAX; type++) {
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for (type = 0; type < ctx_max; type++) {
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struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];
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int n = 1;
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@@ -364,7 +364,7 @@ static int bnxt_alloc_all_ctx_pg_info(struct bnxt_softc *softc)
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if (ctxm->instance_bmap)
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n = hweight32(ctxm->instance_bmap);
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ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_KERNEL);
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ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_ATOMIC);
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if (!ctxm->pg_info)
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return -ENOMEM;
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}
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@@ -383,6 +383,69 @@ static void bnxt_init_ctx_initializer(struct bnxt_ctx_mem_type *ctxm,
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ctxm->init_value = 0;
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}
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#define BNXT_CTX_INIT_VALID(flags) \
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(!!((flags) & \
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HWRM_FUNC_BACKING_STORE_QCAPS_V2_OUTPUT_FLAGS_ENABLE_CTX_KIND_INIT))
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static int
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bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt_softc *softc)
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{
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struct hwrm_func_backing_store_qcaps_v2_input req = {0};
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struct hwrm_func_backing_store_qcaps_v2_output *resp =
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(void *)softc->hwrm_cmd_resp.idi_vaddr;
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struct bnxt_ctx_mem_info *ctx = NULL;
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u16 type;
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int rc;
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bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_BACKING_STORE_QCAPS_V2);
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ctx = malloc(sizeof(*ctx), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (!ctx)
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return -ENOMEM;
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softc->ctx_mem = ctx;
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BNXT_HWRM_LOCK(softc);
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for (type = 0; type < BNXT_CTX_V2_MAX; ) {
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struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];
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u8 init_val, init_off, i;
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__le32 *p;
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u32 flags;
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req.type = cpu_to_le16(type);
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rc = _hwrm_send_message(softc, &req, sizeof(req));
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if (rc)
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goto ctx_done;
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flags = le32_to_cpu(resp->flags);
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type = le16_to_cpu(resp->next_valid_type);
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if (!(flags & HWRM_FUNC_BACKING_STORE_QCAPS_V2_OUTPUT_FLAGS_TYPE_VALID))
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continue;
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ctxm->type = le16_to_cpu(resp->type);
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ctxm->flags = flags;
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ctxm->entry_size = le16_to_cpu(resp->entry_size);
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ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map);
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ctxm->entry_multiple = resp->entry_multiple;
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ctxm->max_entries = le32_to_cpu(resp->max_num_entries);
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ctxm->min_entries = le32_to_cpu(resp->min_num_entries);
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init_val = resp->ctx_init_value;
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init_off = resp->ctx_init_offset;
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bnxt_init_ctx_initializer(ctxm, init_val, init_off,
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BNXT_CTX_INIT_VALID(flags));
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ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt,
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BNXT_MAX_SPLIT_ENTRY);
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for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt;
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i++, p++)
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ctxm->split[i] = le32_to_cpu(*p);
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}
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rc = bnxt_alloc_all_ctx_pg_info(softc, BNXT_CTX_V2_MAX);
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ctx_done:
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BNXT_HWRM_UNLOCK(softc);
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return rc;
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}
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int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
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{
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struct hwrm_func_backing_store_qcaps_input req = {0};
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@@ -393,6 +456,11 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
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if (softc->hwrm_spec_code < 0x10902 || softc->ctx_mem)
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return 0;
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if (BNXT_CHIP_P7(softc)) {
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if (softc->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
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return bnxt_hwrm_func_backing_store_qcaps_v2(softc);
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}
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if (BNXT_VF(softc))
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return 0;
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@@ -493,7 +561,7 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt_softc *softc)
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memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm));
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ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1;
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rc = bnxt_alloc_all_ctx_pg_info(softc);
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rc = bnxt_alloc_all_ctx_pg_info(softc, BNXT_CTX_MAX);
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} else {
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rc = 0;
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}
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@@ -512,14 +580,11 @@ ctx_err:
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static void bnxt_hwrm_set_pg_attr(struct bnxt_ring_mem_info *rmem, uint8_t *pg_attr,
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uint64_t *pg_dir)
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{
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uint8_t pg_size = 0;
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if (!rmem->nr_pages)
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return;
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if (BNXT_PAGE_SHIFT == 13)
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pg_size = 1 << 4;
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else if (BNXT_PAGE_SIZE == 16)
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pg_size = 2 << 4;
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BNXT_SET_CTX_PAGE_ATTR(*pg_attr);
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*pg_attr = pg_size;
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if (rmem->depth >= 1) {
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if (rmem->depth == 2)
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*pg_attr |= HWRM_FUNC_BACKING_STORE_CFG_INPUT_QPC_LVL_LVL_2;
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@@ -720,8 +785,10 @@ int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt_softc *softc,
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bnxt_hwrm_cmd_hdr_init(softc, &req, HWRM_FUNC_BACKING_STORE_CFG_V2);
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BNXT_HWRM_LOCK(softc);
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req.type = cpu_to_le16(ctxm->type);
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req.entry_size = cpu_to_le16(ctxm->entry_size);
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req.subtype_valid_cnt = ctxm->split_entry_cnt;
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for (i = 0, p = &req.split_entry_0; i < ctxm->split_entry_cnt; i++)
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p[i] = cpu_to_le32(ctxm->split[i]);
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for (i = 0, j = 0; j < n && !rc; i++) {
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@@ -737,11 +804,12 @@ int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt_softc *softc,
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
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&req.page_size_pbl_level,
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&req.page_dir);
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if (last && j == (n - 1))
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if (last && j == n)
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req.flags =
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cpu_to_le32(HWRM_FUNC_BACKING_STORE_CFG_V2_INPUT_FLAGS_BS_CFG_ALL_DONE);
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rc = hwrm_send_message(softc, &req, sizeof(req));
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rc = _hwrm_send_message(softc, &req, sizeof(req));
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}
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BNXT_HWRM_UNLOCK(softc);
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return rc;
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}
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@@ -1053,6 +1053,8 @@ static int bnxt_setup_ctxm_pg_tbls(struct bnxt_softc *softc,
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rc = bnxt_alloc_ctx_pg_tbls(softc, &ctx_pg[i], mem_size, pg_lvl,
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ctxm->init_value ? ctxm : NULL);
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}
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if (!rc)
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ctxm->mem_valid = 1;
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return rc;
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}
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@@ -1085,6 +1087,54 @@ static void bnxt_free_ctx_mem(struct bnxt_softc *softc)
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softc->ctx_mem = NULL;
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}
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static int
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bnxt_backing_store_cfg_v2(struct bnxt_softc *softc, u32 ena)
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{
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struct bnxt_ctx_mem_info *ctx = softc->ctx_mem;
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struct bnxt_ctx_mem_type *ctxm;
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u16 last_type = BNXT_CTX_INV;
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int rc = 0;
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u16 type;
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if (BNXT_PF(softc)) {
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for (type = BNXT_CTX_SRT_TRACE; type <= BNXT_CTX_ROCE_HWRM_TRACE; type++) {
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ctxm = &ctx->ctx_arr[type];
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if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID))
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continue;
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rc = bnxt_setup_ctxm_pg_tbls(softc, ctxm, ctxm->max_entries, 1);
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if (rc) {
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device_printf(softc->dev, "Unable to setup ctx page for type:0x%x.\n", type);
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rc = 0;
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continue;
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}
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/* ckp TODO: this is trace buffer related stuff, so keeping it diabled now. needs revisit */
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//bnxt_bs_trace_init(bp, ctxm, type - BNXT_CTX_SRT_TRACE);
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last_type = type;
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}
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}
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if (last_type == BNXT_CTX_INV) {
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if (!ena)
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return 0;
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else if (ena & HWRM_FUNC_BACKING_STORE_CFG_INPUT_ENABLES_TIM)
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last_type = BNXT_CTX_MAX - 1;
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else
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last_type = BNXT_CTX_L2_MAX - 1;
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}
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ctx->ctx_arr[last_type].last = 1;
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for (type = 0 ; type < BNXT_CTX_V2_MAX; type++) {
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ctxm = &ctx->ctx_arr[type];
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if (!ctxm->mem_valid)
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continue;
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rc = bnxt_hwrm_func_backing_store_cfg_v2(softc, ctxm, ctxm->last);
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if (rc)
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return rc;
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}
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return 0;
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}
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static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
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{
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struct bnxt_ctx_pg_info *ctx_pg;
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@@ -1112,6 +1162,10 @@ static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
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if (!ctx || (ctx->flags & BNXT_CTX_FLAG_INITED))
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return 0;
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ena = 0;
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if (BNXT_VF(softc))
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goto skip_legacy;
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ctxm = &ctx->ctx_arr[BNXT_CTX_QP];
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l2_qps = ctxm->qp_l2_entries;
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qp1_qps = ctxm->qp_qp1_entries;
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@@ -1152,7 +1206,6 @@ static int bnxt_alloc_ctx_mem(struct bnxt_softc *softc)
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if (rc)
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return rc;
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ena = 0;
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if (!(softc->flags & BNXT_FLAG_ROCE_CAP))
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goto skip_rdma;
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@@ -1201,10 +1254,16 @@ skip_rdma:
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}
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ena |= HWRM_FUNC_BACKING_STORE_CFG_INPUT_DFLT_ENABLES;
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rc = bnxt_hwrm_func_backing_store_cfg(softc, ena);
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skip_legacy:
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if (BNXT_CHIP_P7(softc)) {
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if (softc->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
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rc = bnxt_backing_store_cfg_v2(softc, ena);
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} else {
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rc = bnxt_hwrm_func_backing_store_cfg(softc, ena);
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}
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if (rc) {
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device_printf(softc->dev, "Failed configuring context mem, rc = %d.\n",
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rc);
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rc);
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return rc;
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}
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ctx->flags |= BNXT_CTX_FLAG_INITED;
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