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A native route Netlink interface will replace this stack. Requested by: glebius This reverts commit1ccf543b21. This reverts commit2c04cfa148. This reverts commit2d6114f6d2. This reverts commitd15f2551b2. This reverts commitceb282bbd6. This reverts commitc30021fe0d. This reverts commitfb1820d23a. This reverts commit8696cc600f.
131 lines
5.3 KiB
C
131 lines
5.3 KiB
C
/******************************************************************************
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Copyright (c) 2001-2020, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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#ifndef _IXGBE_SRIOV_H_
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#define _IXGBE_SRIOV_H_
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#ifdef PCI_IOV
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#include <sys/nv.h>
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#include <sys/iov_schema.h>
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#include <dev/pci/pci_iov.h>
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#include <net/iflib.h>
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#include "ixgbe_mbx.h"
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#define IXGBE_VF_CTS (1U << 0) /* VF is clear to send. */
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#define IXGBE_VF_CAP_MAC (1U << 1) /* VF is permitted to change MAC. */
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#define IXGBE_VF_CAP_VLAN (1U << 2) /* VF is permitted to join vlans. */
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#define IXGBE_VF_ACTIVE (1U << 3) /* VF is active. */
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#define IXGBE_VF_ANTI_SPOOF (1U << 4) /* Enforce source identity. */
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#define IXGBE_VF_ALLOW_PROMISC (1U << 5) /* VF may request promiscuity. */
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#define IXGBE_VF_MBX_CLEANUP (1U << 6) /* Reset cleanup pending. */
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#define IXGBE_VF_INIT_DONE (1U << 7) /* Hardware state is ready. */
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#define IXGBE_VF_DMA_ABORT_PENDING (1U << 8) /* VF awaits a forced FLR. */
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#define IXGBE_VF_PCI_STATE_SAVED (1U << 9) /* Preserve state for retry. */
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#define IXGBE_VF_QUARANTINED (1U << 10) /* VF exceeded fault limit. */
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#define IXGBE_VF_MDD_BLOCKED (1U << 11) /* VF is gated after MDD. */
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#define IXGBE_VF_MDD_NOTIFY_PENDING (1U << 12) /* Retry reset notice. */
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#define IXGBE_VF_IO_DISABLED \
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(IXGBE_VF_DMA_ABORT_PENDING | IXGBE_VF_QUARANTINED)
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#define IXGBE_VF_TRAFFIC_DISABLED \
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(IXGBE_VF_IO_DISABLED | IXGBE_VF_MDD_BLOCKED)
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#define IXGBE_VF_INDEX(vmdq) ((vmdq) / 32)
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#define IXGBE_VF_BIT(vmdq) (1U << ((vmdq) % 32))
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#define IXGBE_VT_MSG_MASK 0xFFFF
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#define IXGBE_VT_MSGINFO(msg) \
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(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
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#define IXGBE_VF_GET_QUEUES_RESP_LEN 5
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#define IXGBE_API_VER_1_0 0
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#define IXGBE_API_VER_2_0 1 /* Solaris API. Not supported. */
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#define IXGBE_API_VER_1_1 2
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#define IXGBE_API_VER_1_2 3
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#define IXGBE_API_VER_1_3 4
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#define IXGBE_API_VER_UNKNOWN UINT16_MAX
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#define IXGBE_NO_VM 0
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#define IXGBE_32_VM 32
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#define IXGBE_64_VM 64
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#define IXGBE_MAX_PF_MAC_FILTERS 15
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#define IXGBE_MAX_VF_MAC_FILTERS 3
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int ixgbe_if_iov_vf_add(if_ctx_t, u16, const nvlist_t *);
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int ixgbe_if_iov_init(if_ctx_t, u16, const nvlist_t *);
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int ixgbe_iov_validate(struct ixgbe_softc *, u16);
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void ixgbe_if_iov_uninit(if_ctx_t);
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void ixgbe_initialize_iov(struct ixgbe_softc *);
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void ixgbe_activate_vfs(struct ixgbe_softc *);
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void ixgbe_quiesce_vfs(struct ixgbe_softc *);
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void ixgbe_recalculate_max_frame(struct ixgbe_softc *);
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void ixgbe_ping_all_vfs(struct ixgbe_softc *);
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void ixgbe_init_iov_recovery(struct ixgbe_softc *);
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void ixgbe_schedule_iov_recovery(struct ixgbe_softc *);
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u_int ixgbe_iov_rebuild_mta(struct ixgbe_softc *);
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void ixgbe_define_iov_schemas(device_t, int *);
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void ixgbe_align_all_queue_indices(struct ixgbe_softc *);
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int ixgbe_vf_que_index(int, int, int);
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u32 ixgbe_get_mtqc(int);
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u32 ixgbe_get_mrqc(int);
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/******************************************************************************/
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#else /* PCI_IOV */
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/******************************************************************************/
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#define ixgbe_add_vf(_a,_b,_c)
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#define ixgbe_init_iov(_a,_b,_c)
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#define ixgbe_uninit_iov(_a)
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#define ixgbe_initialize_iov(_a)
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#define ixgbe_activate_vfs(_a)
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#define ixgbe_quiesce_vfs(_a)
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#define ixgbe_recalculate_max_frame(_a)
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#define ixgbe_ping_all_vfs(_a)
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#define ixgbe_init_iov_recovery(_a)
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#define ixgbe_schedule_iov_recovery(_a)
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#define ixgbe_define_iov_schemas(_a,_b)
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#define ixgbe_align_all_queue_indices(_a)
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#define ixgbe_vf_que_index(_a, _b, _c) (_c)
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#define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
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#define ixgbe_get_mrqc(_a) IXGBE_MRQC_RSSEN
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#endif /* PCI_IOV */
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void ixgbe_if_init(if_ctx_t ctx);
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void ixgbe_handle_mbx(void *);
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bool ixgbe_mbx_pending(struct ixgbe_softc *);
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#endif
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