clocksource: sunxi: Rename sunxi to sun4i

During the introduction of the Allwinner SoC platforms, sunxi was
initially meant as a generic name for all the variants of the Allwinner
SoC.

It was ok at the time of the support of only the A10 and A13 that
looks pretty much the same, but it's beginning to be troublesome with
the future addition of the Allwinner A31 (sun6i) that is quite
different, and would introduce some weird logic, where sunxi would
actually mean in some case sun4i and sun5i but without sun6i...

Moreover, it makes the compatible strings naming scheme not consistent
with other architectures, where usually for this kind of compability, we
just use the oldest SoC name that has this IP, so let's do just this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard 2013-03-24 11:49:25 +01:00
parent ea71d9a600
commit 119fd635e3
5 changed files with 23 additions and 23 deletions

View File

@ -2,7 +2,7 @@ Allwinner A1X SoCs Timer Controller
Required properties:
- compatible : should be "allwinner,sunxi-timer"
- compatible : should be "allwinner,sun4i-timer"
- reg : Specifies base physical address and size of the registers.
- interrupts : The interrupt of the first timer
- clocks: phandle to the source clock (usually a 24 MHz fixed clock)
@ -10,7 +10,7 @@ Required properties:
Example:
timer {
compatible = "allwinner,sunxi-timer";
compatible = "allwinner,sun4i-timer";
reg = <0x01c20c00 0x400>;
interrupts = <22>;
clocks = <&osc>;

View File

@ -7,5 +7,5 @@ config ARCH_SUNXI
select GENERIC_IRQ_CHIP
select PINCTRL
select SPARSE_IRQ
select SUNXI_TIMER
select SUN4I_TIMER
select PINCTRL_SUNXI

View File

@ -25,7 +25,7 @@ config DW_APB_TIMER_OF
config ARMADA_370_XP_TIMER
bool
config SUNXI_TIMER
config SUN4I_TIMER
bool
config VT8500_TIMER

View File

@ -16,7 +16,7 @@ obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o
obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o

View File

@ -37,7 +37,7 @@
static void __iomem *timer_base;
static void sunxi_clkevt_mode(enum clock_event_mode mode,
static void sun4i_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
u32 u = readl(timer_base + TIMER_CTL_REG(0));
@ -59,7 +59,7 @@ static void sunxi_clkevt_mode(enum clock_event_mode mode,
}
}
static int sunxi_clkevt_next_event(unsigned long evt,
static int sun4i_clkevt_next_event(unsigned long evt,
struct clock_event_device *unused)
{
u32 u = readl(timer_base + TIMER_CTL_REG(0));
@ -70,16 +70,16 @@ static int sunxi_clkevt_next_event(unsigned long evt,
return 0;
}
static struct clock_event_device sunxi_clockevent = {
.name = "sunxi_tick",
static struct clock_event_device sun4i_clockevent = {
.name = "sun4i_tick",
.rating = 300,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = sunxi_clkevt_mode,
.set_next_event = sunxi_clkevt_next_event,
.set_mode = sun4i_clkevt_mode,
.set_next_event = sun4i_clkevt_next_event,
};
static irqreturn_t sunxi_timer_interrupt(int irq, void *dev_id)
static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = (struct clock_event_device *)dev_id;
@ -89,14 +89,14 @@ static irqreturn_t sunxi_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static struct irqaction sunxi_timer_irq = {
.name = "sunxi_timer0",
static struct irqaction sun4i_timer_irq = {
.name = "sun4i_timer0",
.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
.handler = sunxi_timer_interrupt,
.dev_id = &sunxi_clockevent,
.handler = sun4i_timer_interrupt,
.dev_id = &sun4i_clockevent,
};
static void __init sunxi_timer_init(struct device_node *node)
static void __init sun4i_timer_init(struct device_node *node)
{
unsigned long rate = 0;
struct clk *clk;
@ -131,7 +131,7 @@ static void __init sunxi_timer_init(struct device_node *node)
val = readl(timer_base + TIMER_CTL_REG(0));
writel(val | TIMER_CTL_AUTORELOAD, timer_base + TIMER_CTL_REG(0));
ret = setup_irq(irq, &sunxi_timer_irq);
ret = setup_irq(irq, &sun4i_timer_irq);
if (ret)
pr_warn("failed to setup irq %d\n", irq);
@ -139,10 +139,10 @@ static void __init sunxi_timer_init(struct device_node *node)
val = readl(timer_base + TIMER_IRQ_EN_REG);
writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
sunxi_clockevent.cpumask = cpumask_of(0);
sun4i_clockevent.cpumask = cpumask_of(0);
clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
clockevents_config_and_register(&sun4i_clockevent, rate / TIMER_SCAL,
0x1, 0xff);
}
CLOCKSOURCE_OF_DECLARE(sunxi, "allwinner,sunxi-timer",
sunxi_timer_init);
CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-timer",
sun4i_timer_init);