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https://github.com/joel16/android_kernel_sony_msm8994.git
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crypto: padlock-aes - work around Nano CPU errata in CBC mode
Extend previous workarounds for the prefetch bug to cover CBC mode, clean up the code a bit. Signed-off-by: Chuck Ebbert <cebbert@redhat.com> Acked-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -22,11 +22,16 @@
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#include <asm/i387.h>
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#include "padlock.h"
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/* number of data blocks actually fetched for each xcrypt insn */
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/*
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* Number of data blocks actually fetched for each xcrypt insn.
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* Processors with prefetch errata will fetch extra blocks.
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*/
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static unsigned int ecb_fetch_blocks = 2;
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static unsigned int cbc_fetch_blocks = 1;
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#define MAX_ECB_FETCH_BLOCKS (8)
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#define ecb_fetch_bytes (ecb_fetch_blocks * AES_BLOCK_SIZE)
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static unsigned int cbc_fetch_blocks = 1;
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#define MAX_CBC_FETCH_BLOCKS (4)
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#define cbc_fetch_bytes (cbc_fetch_blocks * AES_BLOCK_SIZE)
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/* Control word. */
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@ -180,7 +185,7 @@ static inline void padlock_store_cword(struct cword *cword)
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* should be used only inside the irq_ts_save/restore() context
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*/
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static inline void padlock_xcrypt(const u8 *input, u8 *output, void *key,
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static inline void rep_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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struct cword *control_word, int count)
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{
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asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
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@ -188,32 +193,65 @@ static inline void padlock_xcrypt(const u8 *input, u8 *output, void *key,
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: "d"(control_word), "b"(key), "c"(count));
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}
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static void aes_crypt_copy(const u8 *in, u8 *out, u32 *key,
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static inline u8 *rep_xcrypt_cbc(const u8 *input, u8 *output, void *key,
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u8 *iv, struct cword *control_word, int count)
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{
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asm volatile (".byte 0xf3,0x0f,0xa7,0xd0" /* rep xcryptcbc */
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: "+S" (input), "+D" (output), "+a" (iv)
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: "d" (control_word), "b" (key), "c" (count));
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return iv;
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}
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static void ecb_crypt_copy(const u8 *in, u8 *out, u32 *key,
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struct cword *cword, int count)
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{
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/*
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* Padlock prefetches extra data so we must provide mapped input buffers.
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* Assume there are at least 16 bytes of stack already in use.
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*/
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u8 buf[AES_BLOCK_SIZE * 7 + PADLOCK_ALIGNMENT - 1];
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u8 buf[AES_BLOCK_SIZE * (MAX_ECB_FETCH_BLOCKS - 1) + PADLOCK_ALIGNMENT - 1];
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u8 *tmp = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);
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memcpy(tmp, in, count * AES_BLOCK_SIZE);
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padlock_xcrypt(tmp, out, key, cword, count);
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rep_xcrypt_ecb(tmp, out, key, cword, count);
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}
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static inline void aes_crypt(const u8 *in, u8 *out, u32 *key,
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static u8 *cbc_crypt_copy(const u8 *in, u8 *out, u32 *key,
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u8 *iv, struct cword *cword, int count)
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{
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/*
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* Padlock prefetches extra data so we must provide mapped input buffers.
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* Assume there are at least 16 bytes of stack already in use.
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*/
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u8 buf[AES_BLOCK_SIZE * (MAX_CBC_FETCH_BLOCKS - 1) + PADLOCK_ALIGNMENT - 1];
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u8 *tmp = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);
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memcpy(tmp, in, count * AES_BLOCK_SIZE);
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return rep_xcrypt_cbc(tmp, out, key, iv, cword, count);
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}
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static inline void ecb_crypt(const u8 *in, u8 *out, u32 *key,
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struct cword *cword, int count)
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{
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/* Padlock in ECB mode fetches at least ecb_fetch_bytes of data.
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* We could avoid some copying here but it's probably not worth it.
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*/
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if (unlikely(((unsigned long)in & PAGE_SIZE) + ecb_fetch_bytes > PAGE_SIZE)) {
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aes_crypt_copy(in, out, key, cword, count);
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ecb_crypt_copy(in, out, key, cword, count);
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return;
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}
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padlock_xcrypt(in, out, key, cword, count);
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rep_xcrypt_ecb(in, out, key, cword, count);
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}
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static inline u8 *cbc_crypt(const u8 *in, u8 *out, u32 *key,
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u8 *iv, struct cword *cword, int count)
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{
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/* Padlock in CBC mode fetches at least cbc_fetch_bytes of data. */
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if (unlikely(((unsigned long)in & PAGE_SIZE) + cbc_fetch_bytes > PAGE_SIZE))
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return cbc_crypt_copy(in, out, key, iv, cword, count);
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return rep_xcrypt_cbc(in, out, key, iv, cword, count);
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}
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static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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@ -222,7 +260,7 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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u32 initial = count & (ecb_fetch_blocks - 1);
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if (count < ecb_fetch_blocks) {
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aes_crypt(input, output, key, control_word, count);
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ecb_crypt(input, output, key, control_word, count);
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return;
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}
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@ -239,10 +277,19 @@ static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
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u8 *iv, void *control_word, u32 count)
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{
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/* rep xcryptcbc */
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asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"
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u32 initial = count & (cbc_fetch_blocks - 1);
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if (count < cbc_fetch_blocks)
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return cbc_crypt(input, output, key, iv, control_word, count);
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if (initial)
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asm volatile (".byte 0xf3,0x0f,0xa7,0xd0" /* rep xcryptcbc */
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: "+S" (input), "+D" (output), "+a" (iv)
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: "d" (control_word), "b" (key), "c" (count));
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asm volatile (".byte 0xf3,0x0f,0xa7,0xd0" /* rep xcryptcbc */
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: "+S" (input), "+D" (output), "+a" (iv)
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: "d" (control_word), "b" (key), "c" (count));
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: "d" (control_word), "b" (key), "c" (count-initial));
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return iv;
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}
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@ -253,7 +300,7 @@ static void aes_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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padlock_reset_key(&ctx->cword.encrypt);
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ts_state = irq_ts_save();
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aes_crypt(in, out, ctx->E, &ctx->cword.encrypt, 1);
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ecb_crypt(in, out, ctx->E, &ctx->cword.encrypt, 1);
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irq_ts_restore(ts_state);
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padlock_store_cword(&ctx->cword.encrypt);
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}
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@ -265,7 +312,7 @@ static void aes_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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padlock_reset_key(&ctx->cword.encrypt);
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ts_state = irq_ts_save();
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aes_crypt(in, out, ctx->D, &ctx->cword.decrypt, 1);
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ecb_crypt(in, out, ctx->D, &ctx->cword.decrypt, 1);
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irq_ts_restore(ts_state);
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padlock_store_cword(&ctx->cword.encrypt);
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}
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@ -482,8 +529,8 @@ static int __init padlock_init(void)
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printk(KERN_NOTICE PFX "Using VIA PadLock ACE for AES algorithm.\n");
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if (c->x86 == 6 && c->x86_model == 15 && c->x86_mask == 2) {
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ecb_fetch_blocks = 8;
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cbc_fetch_blocks = 4; /* NOTE: notused */
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ecb_fetch_blocks = MAX_ECB_FETCH_BLOCKS;
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cbc_fetch_blocks = MAX_CBC_FETCH_BLOCKS;
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printk(KERN_NOTICE PFX "VIA Nano stepping 2 detected: enabling workaround.\n");
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}
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