mirror of
https://github.com/joel16/android_kernel_sony_msm8994.git
synced 2024-11-28 14:42:16 +00:00
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] IOSAPIC bogus error cleanup [IA64] Update printing of feature set bits [IA64] Fix IOSAPIC delivery mode setting [IA64] XPC heartbeat timer function must run on CPU 0 [IA64] Clean up /proc/interrupts output [IA64] Disable/re-enable CPE interrupts on Altix [IA64] Clean-up McKinley Errata message [IA64] Add gate.lds to list of files ignored by Git [IA64] Fix section mismatch in contig.c version of per_cpu_init() [IA64] Wrong args to memset in efi_gettimeofday() [IA64] Remove duplicate includes from ia32priv.h [IA64] fix number of bytes zeroed by sys_fw_init() in arch/ia64/hp/sim/boot/fw-emu.c [IA64] Fix perfmon sysctl directory modes
This commit is contained in:
commit
8fc543c8f0
@ -285,7 +285,7 @@ sys_fw_init (const char *args, int arglen)
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}
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cmd_line[arglen] = '\0';
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memset(efi_systab, 0, sizeof(efi_systab));
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memset(efi_systab, 0, sizeof(*efi_systab));
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efi_systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
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efi_systab->hdr.revision = ((1 << 16) | 00);
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efi_systab->hdr.headersize = sizeof(efi_systab->hdr);
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@ -290,7 +290,6 @@ struct old_linux32_dirent {
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#define _ASM_IA64_ELF_H /* Don't include elf.h */
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#include <linux/sched.h>
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#include <asm/processor.h>
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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1
arch/ia64/kernel/.gitignore
vendored
Normal file
1
arch/ia64/kernel/.gitignore
vendored
Normal file
@ -0,0 +1 @@
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gate.lds
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@ -678,9 +678,11 @@ int __init acpi_boot_init(void)
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/* I/O APIC */
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if (acpi_table_parse_madt
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(ACPI_MADT_TYPE_IO_SAPIC, acpi_parse_iosapic, NR_IOSAPICS) < 1)
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printk(KERN_ERR PREFIX
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"Error parsing MADT - no IOSAPIC entries\n");
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(ACPI_MADT_TYPE_IO_SAPIC, acpi_parse_iosapic, NR_IOSAPICS) < 1) {
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if (!ia64_platform_is("sn2"))
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printk(KERN_ERR PREFIX
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"Error parsing MADT - no IOSAPIC entries\n");
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}
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/* System-Level Interrupt Routing */
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@ -218,9 +218,10 @@ efi_gettimeofday (struct timespec *ts)
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{
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efi_time_t tm;
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memset(ts, 0, sizeof(ts));
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if ((*efi.get_time)(&tm, NULL) != EFI_SUCCESS)
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if ((*efi.get_time)(&tm, NULL) != EFI_SUCCESS) {
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memset(ts, 0, sizeof(*ts));
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return;
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}
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ts->tv_sec = mktime(tm.year, tm.month, tm.day, tm.hour, tm.minute, tm.second);
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ts->tv_nsec = tm.nanosecond;
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@ -748,6 +748,15 @@ skip_numa_setup:
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#endif
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}
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static inline unsigned char choose_dmode(void)
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{
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#ifdef CONFIG_SMP
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if (smp_int_redirect & SMP_IRQ_REDIRECTION)
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return IOSAPIC_LOWEST_PRIORITY;
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#endif
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return IOSAPIC_FIXED;
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}
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/*
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* ACPI can describe IOSAPIC interrupts via static tables and namespace
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* methods. This provides an interface to register those interrupts and
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@ -762,6 +771,7 @@ iosapic_register_intr (unsigned int gsi,
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unsigned long flags;
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struct iosapic_rte_info *rte;
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u32 low32;
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unsigned char dmode;
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/*
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* If this GSI has already been registered (i.e., it's a
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@ -791,8 +801,8 @@ iosapic_register_intr (unsigned int gsi,
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spin_lock(&irq_desc[irq].lock);
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dest = get_target_cpu(gsi, irq);
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err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY,
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polarity, trigger);
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dmode = choose_dmode();
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err = register_intr(gsi, irq, dmode, polarity, trigger);
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if (err < 0) {
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spin_unlock(&irq_desc[irq].lock);
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irq = err;
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@ -961,10 +971,12 @@ iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
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{
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int vector, irq;
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unsigned int dest = cpu_physical_id(smp_processor_id());
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unsigned char dmode;
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irq = vector = isa_irq_to_vector(isa_irq);
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BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
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register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, polarity, trigger);
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dmode = choose_dmode();
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register_intr(gsi, irq, dmode, polarity, trigger);
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DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
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isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
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@ -61,9 +61,11 @@ int show_interrupts(struct seq_file *p, void *v)
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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char cpuname[16];
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seq_printf(p, " ");
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for_each_online_cpu(j) {
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seq_printf(p, "CPU%d ",j);
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snprintf(cpuname, 10, "CPU%d", j);
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seq_printf(p, "%10s ", cpuname);
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}
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seq_putc(p, '\n');
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}
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@ -571,7 +571,7 @@ out:
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* Outputs
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* None
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*/
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static void __init
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void
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ia64_mca_register_cpev (int cpev)
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{
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/* Register the CPE interrupt vector with SAL */
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@ -470,7 +470,7 @@ register_info(char *page)
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return p - page;
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}
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static const char *proc_features[]={
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static char *proc_features_0[]={ /* Feature set 0 */
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NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
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NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL,
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NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
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@ -502,25 +502,92 @@ static const char *proc_features[]={
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"Enable BERR promotion"
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};
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static char *proc_features_16[]={ /* Feature set 16 */
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"Disable ETM",
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"Enable ETM",
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"Enable MCA on half-way timer",
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"Enable snoop WC",
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NULL,
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"Enable Fast Deferral",
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"Disable MCA on memory aliasing",
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"Enable RSB",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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"DP system processor",
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"Low Voltage",
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"HT supported",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL
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};
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static char **proc_features[]={
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proc_features_0,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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proc_features_16,
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NULL, NULL, NULL, NULL,
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};
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static char *
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feature_set_info(char *page, u64 avail, u64 status, u64 control, u64 set)
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{
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char *p = page;
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char **vf, **v;
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int i;
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vf = v = proc_features[set];
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for(i=0; i < 64; i++, avail >>=1, status >>=1, control >>=1) {
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if (!(control)) /* No remaining bits set */
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break;
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if (!(avail & 0x1)) /* Print only bits that are available */
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continue;
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if (vf)
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v = vf + i;
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if ( v && *v ) {
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p += sprintf(p, "%-40s : %s %s\n", *v,
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avail & 0x1 ? (status & 0x1 ?
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"On " : "Off"): "",
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avail & 0x1 ? (control & 0x1 ?
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"Ctrl" : "NoCtrl"): "");
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} else {
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p += sprintf(p, "Feature set %2ld bit %2d\t\t\t"
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" : %s %s\n",
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set, i,
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avail & 0x1 ? (status & 0x1 ?
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"On " : "Off"): "",
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avail & 0x1 ? (control & 0x1 ?
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"Ctrl" : "NoCtrl"): "");
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}
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}
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return p;
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}
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static int
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processor_info(char *page)
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{
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char *p = page;
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const char **v = proc_features;
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u64 avail=1, status=1, control=1;
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int i;
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u64 avail=1, status=1, control=1, feature_set=0;
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s64 ret;
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if ((ret=ia64_pal_proc_get_features(&avail, &status, &control)) != 0) return 0;
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do {
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ret = ia64_pal_proc_get_features(&avail, &status, &control,
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feature_set);
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if (ret < 0) {
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return p - page;
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}
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if (ret == 1) {
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feature_set++;
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continue;
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}
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p = feature_set_info(p, avail, status, control, feature_set);
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feature_set++;
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} while(1);
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for(i=0; i < 64; i++, v++,avail >>=1, status >>=1, control >>=1) {
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if ( ! *v ) continue;
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p += sprintf(p, "%-40s : %s%s %s\n", *v,
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avail & 0x1 ? "" : "NotImpl",
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avail & 0x1 ? (status & 0x1 ? "On" : "Off"): "",
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avail & 0x1 ? (control & 0x1 ? "Ctrl" : "NoCtrl"): "");
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}
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return p - page;
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}
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@ -129,9 +129,6 @@ ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)
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first_time = 0;
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if (need_workaround)
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printk(KERN_INFO "Leaving McKinley Errata 9 workaround enabled\n");
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else
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printk(KERN_INFO "McKinley Errata 9 workaround not needed; "
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"disabling it\n");
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}
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if (need_workaround)
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return;
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@ -558,7 +558,7 @@ static ctl_table pfm_sysctl_dir[] = {
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{
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.ctl_name = CTL_UNNUMBERED,
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.procname = "perfmon",
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.mode = 0755,
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.mode = 0555,
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.child = pfm_ctl_table,
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},
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{}
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@ -567,7 +567,7 @@ static ctl_table pfm_sysctl_root[] = {
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{
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.ctl_name = CTL_KERN,
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.procname = "kernel",
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.mode = 0755,
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.mode = 0555,
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.child = pfm_sysctl_dir,
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},
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{}
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@ -146,6 +146,46 @@ find_bootmap_location (unsigned long start, unsigned long end, void *arg)
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return 0;
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}
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#ifdef CONFIG_SMP
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static void *cpu_data;
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/**
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* per_cpu_init - setup per-cpu variables
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*
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* Allocate and setup per-cpu data areas.
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*/
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void * __cpuinit
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per_cpu_init (void)
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{
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int cpu;
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static int first_time=1;
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/*
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* get_free_pages() cannot be used before cpu_init() done. BSP
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* allocates "NR_CPUS" pages for all CPUs to avoid that AP calls
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* get_zeroed_page().
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*/
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if (first_time) {
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first_time=0;
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start);
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__per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start;
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cpu_data += PERCPU_PAGE_SIZE;
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per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
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}
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}
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return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
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}
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static inline void
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alloc_per_cpu_data(void)
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{
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cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
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PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
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}
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#else
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#define alloc_per_cpu_data() do { } while (0)
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#endif /* CONFIG_SMP */
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/**
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* find_memory - setup memory map
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*
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@ -182,41 +222,9 @@ find_memory (void)
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find_initrd();
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alloc_per_cpu_data();
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}
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#ifdef CONFIG_SMP
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/**
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* per_cpu_init - setup per-cpu variables
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*
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* Allocate and setup per-cpu data areas.
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*/
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void * __cpuinit
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per_cpu_init (void)
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{
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void *cpu_data;
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int cpu;
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static int first_time=1;
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/*
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* get_free_pages() cannot be used before cpu_init() done. BSP
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* allocates "NR_CPUS" pages for all CPUs to avoid that AP calls
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* get_zeroed_page().
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*/
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if (first_time) {
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first_time=0;
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cpu_data = __alloc_bootmem(PERCPU_PAGE_SIZE * NR_CPUS,
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PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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memcpy(cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start);
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__per_cpu_offset[cpu] = (char *) cpu_data - __per_cpu_start;
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cpu_data += PERCPU_PAGE_SIZE;
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per_cpu(local_per_cpu_offset, cpu) = __per_cpu_offset[cpu];
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}
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}
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return __per_cpu_start + __per_cpu_offset[smp_processor_id()];
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}
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#endif /* CONFIG_SMP */
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static int
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count_pages (u64 start, u64 end, void *arg)
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{
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|
@ -5,7 +5,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
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*/
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#include <linux/irq.h>
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@ -85,12 +85,18 @@ static void sn_shutdown_irq(unsigned int irq)
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{
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}
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extern void ia64_mca_register_cpev(int);
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static void sn_disable_irq(unsigned int irq)
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{
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if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
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ia64_mca_register_cpev(0);
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}
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static void sn_enable_irq(unsigned int irq)
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{
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if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
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ia64_mca_register_cpev(irq);
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}
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static void sn_ack_irq(unsigned int irq)
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|
@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
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||||
* Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved.
|
||||
*/
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@ -257,7 +257,9 @@ xpc_hb_checker(void *ignore)
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set_cpus_allowed(current, cpumask_of_cpu(XPC_HB_CHECK_CPU));
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/* set our heartbeating to other partitions into motion */
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xpc_hb_check_timeout = jiffies + (xpc_hb_check_interval * HZ);
|
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xpc_hb_beater(0);
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while (!(volatile int) xpc_exiting) {
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@ -1338,16 +1340,8 @@ xpc_init(void)
|
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dev_warn(xpc_part, "can't register die notifier\n");
|
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}
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|
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|
||||
/*
|
||||
* Set the beating to other partitions into motion. This is
|
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* the last requirement for other partitions' discovery to
|
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* initiate communications with us.
|
||||
*/
|
||||
init_timer(&xpc_hb_timer);
|
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xpc_hb_timer.function = xpc_hb_beater;
|
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xpc_hb_beater(0);
|
||||
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||||
|
||||
/*
|
||||
* The real work-horse behind xpc. This processes incoming
|
||||
|
@ -1379,10 +1379,11 @@ struct pal_features_s;
|
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static inline s64
|
||||
ia64_pal_proc_get_features (u64 *features_avail,
|
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u64 *features_status,
|
||||
u64 *features_control)
|
||||
u64 *features_control,
|
||||
u64 features_set)
|
||||
{
|
||||
struct ia64_pal_retval iprv;
|
||||
PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, 0, 0);
|
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PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, features_set, 0);
|
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if (iprv.status == 0) {
|
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*features_avail = iprv.v0;
|
||||
*features_status = iprv.v1;
|
||||
|
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