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https://github.com/joel16/android_kernel_sony_msm8994.git
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m68knommu: remove RPXCLASSIC from the m68k tree
This ifdefs are leftovers from the time as the driver was running on a ppc. Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -43,17 +43,9 @@
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#include <asm/pgtable.h>
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#include <asm/cacheflush.h>
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
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defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
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defined(CONFIG_M520x) || defined(CONFIG_M532x)
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include "fec.h"
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#else
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#include <asm/8xx_immap.h>
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#include <asm/mpc8xx.h>
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#include "commproc.h"
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#endif
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#if defined(CONFIG_FEC2)
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#define FEC_MAX_PORTS 2
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@ -1229,14 +1221,9 @@ static phy_info_t const * const phy_info[] = {
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/* ------------------------------------------------------------------------- */
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#ifdef HAVE_mii_link_interrupt
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#ifdef CONFIG_RPXCLASSIC
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static void
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mii_link_interrupt(void *dev_id);
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#else
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static irqreturn_t
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mii_link_interrupt(int irq, void * dev_id);
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#endif
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#endif
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#if defined(CONFIG_M5272)
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/*
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@ -1789,20 +1776,6 @@ static void __inline__ fec_request_intrs(struct net_device *dev)
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if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0)
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panic("Could not allocate FEC IRQ!");
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#ifdef CONFIG_RPXCLASSIC
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/* Make Port C, bit 15 an input that causes interrupts.
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*/
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immap->im_ioport.iop_pcpar &= ~0x0001;
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immap->im_ioport.iop_pcdir &= ~0x0001;
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immap->im_ioport.iop_pcso &= ~0x0001;
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immap->im_ioport.iop_pcint |= 0x0001;
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cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev);
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/* Make LEDS reflect Link status.
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*/
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*((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE;
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#endif
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}
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static void __inline__ fec_get_mac(struct net_device *dev)
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@ -1811,16 +1784,6 @@ static void __inline__ fec_get_mac(struct net_device *dev)
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bd = (bd_t *)__res;
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memcpy(dev->dev_addr, bd->bi_enetaddr, ETH_ALEN);
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#ifdef CONFIG_RPXCLASSIC
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/* The Embedded Planet boards have only one MAC address in
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* the EEPROM, but can have two Ethernet ports. For the
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* FEC port, we create another address by setting one of
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* the address bits above something that would have (up to
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* now) been allocated.
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*/
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dev->dev_adrd[3] |= 0x80;
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#endif
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}
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static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep)
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@ -2099,13 +2062,8 @@ mii_discover_phy(uint mii_reg, struct net_device *dev)
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/* This interrupt occurs when the PHY detects a link change.
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*/
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#ifdef HAVE_mii_link_interrupt
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#ifdef CONFIG_RPXCLASSIC
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static void
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mii_link_interrupt(void *dev_id)
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#else
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static irqreturn_t
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mii_link_interrupt(int irq, void * dev_id)
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#endif
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{
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struct net_device *dev = dev_id;
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struct fec_enet_private *fep = netdev_priv(dev);
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@ -519,25 +519,6 @@ typedef struct scc_enet {
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#define SICR_ENET_CLKRT ((uint)0x00002c00)
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#endif
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#ifdef CONFIG_RPXCLASSIC
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/* Bits in parallel I/O port registers that have to be set/cleared
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* to configure the pins for SCC1 use.
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*/
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#define PA_ENET_RXD ((ushort)0x0001)
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#define PA_ENET_TXD ((ushort)0x0002)
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#define PA_ENET_TCLK ((ushort)0x0200)
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#define PA_ENET_RCLK ((ushort)0x0800)
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#define PB_ENET_TENA ((uint)0x00001000)
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#define PC_ENET_CLSN ((ushort)0x0010)
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#define PC_ENET_RENA ((ushort)0x0020)
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/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
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* SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
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*/
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#define SICR_ENET_MASK ((uint)0x000000ff)
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#define SICR_ENET_CLKRT ((uint)0x0000003d)
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#endif
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/* SCC Event register as used by Ethernet.
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*/
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#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
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