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https://github.com/joel16/android_kernel_sony_msm8994.git
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[PATCH] sh: Move CPU subtype configuration to its own Kconfig
Currently the CPU subtype options are cluttering up arch/sh/Kconfig somewhat. Given that, this moves all of that in to its own arch/sh/mm/Kconfig. Things like cache configuration are also moved to this new location. This also adds support for strict CPU tuning on newer cores, which requires the addition of as-option. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
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7
Makefile
7
Makefile
@ -263,6 +263,13 @@ export quiet Q KBUILD_VERBOSE
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# cc support functions to be used (only) in arch/$(ARCH)/Makefile
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# See documentation in Documentation/kbuild/makefiles.txt
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# as-option
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# Usage: cflags-y += $(call as-option, -Wa$(comma)-isa=foo,)
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as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
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-xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
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else echo "$(2)"; fi ;)
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# cc-option
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# Usage: cflags-y += $(call cc-option, -march=winchip-c6, -march=i586)
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581
arch/sh/Kconfig
581
arch/sh/Kconfig
@ -33,9 +33,11 @@ config GENERIC_CALIBRATE_DELAY
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bool
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default y
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config GENERIC_IOMAP
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bool
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config ARCH_MAY_HAVE_PC_FDC
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bool
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default y
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source "init/Kconfig"
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@ -53,24 +55,28 @@ config SH_SOLUTION_ENGINE
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config SH_7751_SOLUTION_ENGINE
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bool "SolutionEngine7751"
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select CPU_SUBTYPE_SH7751
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help
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Select 7751 SolutionEngine if configuring for a Hitachi SH7751
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evaluation board.
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config SH_7300_SOLUTION_ENGINE
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bool "SolutionEngine7300"
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select CPU_SUBTYPE_SH7300
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help
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Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
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evaluation board.
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config SH_73180_SOLUTION_ENGINE
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bool "SolutionEngine73180"
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select CPU_SUBTYPE_SH73180
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help
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Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
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evaluation board.
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config SH_7751_SYSTEMH
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bool "SystemH7751R"
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select CPU_SUBTYPE_SH7751R
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help
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Select SystemH if you are configuring for a Renesas SystemH
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7751R evaluation board.
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@ -81,27 +87,13 @@ config SH_STB1_HARP
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config SH_STB1_OVERDRIVE
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bool "STB1_Overdrive"
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config SH_HP620
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bool "HP620"
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config SH_HP6XX
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bool "HP6XX"
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help
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Select HP620 if configuring for a HP jornada HP620.
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Select HP6XX if configuring for a HP jornada HP6xx.
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More information (hardware only) at
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<http://www.hp.com/jornada/>.
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config SH_HP680
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bool "HP680"
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help
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Select HP680 if configuring for a HP Jornada HP680.
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More information (hardware only) at
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<http://www.hp.com/jornada/products/680/>.
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config SH_HP690
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bool "HP690"
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help
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Select HP690 if configuring for a HP Jornada HP690.
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More information (hardware only)
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at <http://www.hp.com/jornada/products/680/>.
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config SH_CQREEK
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bool "CqREEK"
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help
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@ -123,11 +115,13 @@ config SH_EC3104
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config SH_SATURN
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bool "Saturn"
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select CPU_SUBTYPE_SH7604
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help
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Select Saturn if configuring for a SEGA Saturn.
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config SH_DREAMCAST
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bool "Dreamcast"
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select CPU_SUBTYPE_SH7091
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help
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Select Dreamcast if configuring for a SEGA Dreamcast.
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More information at
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@ -142,6 +136,7 @@ config SH_BIGSUR
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config SH_SH2000
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bool "SH2000"
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select CPU_SUBTYPE_SH7709
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help
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SH-2000 is a single-board computer based around SH7709A chip
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intended for embedded applications.
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@ -153,20 +148,22 @@ config SH_ADX
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bool "ADX"
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config SH_MPC1211
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bool "MPC1211"
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bool "Interface MPC1211"
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help
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CTP/PCI-SH02 is a CPU module computer that is produced
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by Interface Corporation.
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More information at <http://www.interface.co.jp>
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config SH_SH03
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bool "SH03"
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bool "Interface CTP/PCI-SH03"
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help
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CTP/PCI-SH03 is a CPU module computer that produced
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CTP/PCI-SH03 is a CPU module computer that is produced
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by Interface Corporation.
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It is compact and excellent in durability.
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It will play an active part in your factory or laboratory
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as a FA computer.
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More information at <http://www.interface.co.jp>
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config SH_SECUREEDGE5410
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bool "SecureEdge5410"
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select CPU_SUBTYPE_SH7751R
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help
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Select SecureEdge5410 if configuring for a SnapGear SH board.
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This includes both the OEM SecureEdge products as well as the
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@ -174,25 +171,49 @@ config SH_SECUREEDGE5410
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config SH_HS7751RVOIP
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bool "HS7751RVOIP"
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select CPU_SUBTYPE_SH7751R
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help
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Select HS7751RVOIP if configuring for a Renesas Technology
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Sales VoIP board.
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config SH_RTS7751R2D
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bool "RTS7751R2D"
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select CPU_SUBTYPE_SH7751R
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help
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Select RTS7751R2D if configuring for a Renesas Technology
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Sales SH-Graphics board.
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config SH_R7780RP
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bool "R7780RP-1"
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select CPU_SUBTYPE_SH7780
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help
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Select R7780RP-1 if configuring for a Renesas Solutions
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HIGHLANDER board.
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config SH_EDOSK7705
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bool "EDOSK7705"
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select CPU_SUBTYPE_SH7705
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config SH_SH4202_MICRODEV
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bool "SH4-202 MicroDev"
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select CPU_SUBTYPE_SH4_202
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help
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Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
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with an SH4-202 CPU.
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config SH_LANDISK
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bool "LANDISK"
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select CPU_SUBTYPE_SH7751R
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help
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I-O DATA DEVICE, INC. "LANDISK Series" support.
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config SH_TITAN
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bool "TITAN"
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select CPU_SUBTYPE_SH7751R
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help
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Select Titan if you are configuring for a Nimble Microsystems
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NetEngine NP51R.
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config SH_UNKNOWN
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bool "BareCPU"
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help
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@ -207,168 +228,27 @@ config SH_UNKNOWN
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endchoice
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choice
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prompt "Processor family"
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default CPU_SH4
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help
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This option determines the CPU family to compile for. Supported
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targets are SH-2, SH-3, and SH-4. These options are independent of
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CPU functionality. As such, SH-DSP users will still want to select
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their respective processor family in addition to the DSP support
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option.
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source "arch/sh/mm/Kconfig"
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config CPU_SH2
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bool "SH-2"
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select SH_WRITETHROUGH
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config CPU_SH3
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bool "SH-3"
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config CPU_SH4
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bool "SH-4"
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endchoice
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choice
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prompt "Processor subtype"
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config CPU_SUBTYPE_SH7604
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bool "SH7604"
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depends on CPU_SH2
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help
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Select SH7604 if you have SH7604
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config CPU_SUBTYPE_SH7300
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bool "SH7300"
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depends on CPU_SH3
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config CPU_SUBTYPE_SH7705
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bool "SH7705"
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depends on CPU_SH3
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config CPU_SUBTYPE_SH7707
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bool "SH7707"
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depends on CPU_SH3
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help
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Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
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config CPU_SUBTYPE_SH7708
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bool "SH7708"
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depends on CPU_SH3
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help
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Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
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if you have a 100 Mhz SH-3 HD6417708R CPU.
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config CPU_SUBTYPE_SH7709
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bool "SH7709"
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depends on CPU_SH3
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help
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Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
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config CPU_SUBTYPE_SH7750
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bool "SH7750"
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depends on CPU_SH4
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help
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Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
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config CPU_SUBTYPE_SH7751
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bool "SH7751/SH7751R"
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depends on CPU_SH4
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help
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Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
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or if you have a HD6417751R CPU.
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config CPU_SUBTYPE_SH7760
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bool "SH7760"
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depends on CPU_SH4
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config CPU_SUBTYPE_SH73180
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bool "SH73180"
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depends on CPU_SH4
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config CPU_SUBTYPE_ST40STB1
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bool "ST40STB1 / ST40RA"
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depends on CPU_SH4
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help
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Select ST40STB1 if you have a ST40RA CPU.
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This was previously called the ST40STB1, hence the option name.
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config CPU_SUBTYPE_ST40GX1
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bool "ST40GX1"
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depends on CPU_SH4
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help
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Select ST40GX1 if you have a ST40GX1 CPU.
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config CPU_SUBTYPE_SH4_202
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bool "SH4-202"
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depends on CPU_SH4
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endchoice
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config SH7705_CACHE_32KB
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bool "Enable 32KB cache size for SH7705"
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depends on CPU_SUBTYPE_SH7705
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default y
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config MMU
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bool "Support for memory management hardware"
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depends on !CPU_SH2
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default y
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help
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Early SH processors (such as the SH7604) lack an MMU. In order to
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boot on these systems, this option must not be set.
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On other systems (such as the SH-3 and 4) where an MMU exists,
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turning this off will boot the kernel on these machines with the
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MMU implicitly switched off.
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choice
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prompt "HugeTLB page size"
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depends on HUGETLB_PAGE && CPU_SH4 && MMU
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default HUGETLB_PAGE_SIZE_64K
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config HUGETLB_PAGE_SIZE_64K
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bool "64K"
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config HUGETLB_PAGE_SIZE_1MB
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bool "1MB"
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endchoice
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config CMDLINE_BOOL
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bool "Default bootloader kernel arguments"
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config CMDLINE
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string "Initial kernel command string"
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depends on CMDLINE_BOOL
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default "console=ttySC1,115200"
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# Platform-specific memory start and size definitions
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config MEMORY_START
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hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE
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default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV
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default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705)
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hex "Physical memory start address"
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default "0x08000000"
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---help---
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Computers built with Hitachi SuperH processors always
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map the ROM starting at address zero. But the processor
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does not specify the range that RAM takes.
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The physical memory (RAM) start address will be automatically
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set to 08000000, unless you selected one of the following
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processor types: SolutionEngine, Overdrive, HP620, HP680, HP690,
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in which case the start address will be set to 0c000000.
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set to 08000000. Other platforms, such as the Solution Engine
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boards typically map RAM at 0C000000.
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Tweak this only when porting to a new machine which is not already
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known by the config system. Changing it from the known correct
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Tweak this only when porting to a new machine which does not
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already have a defconfig. Changing it from the known correct
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value on any of the known systems will only lead to disaster.
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config MEMORY_SIZE
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hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE
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default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000)
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default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705
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default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
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default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV)
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default "0x08000000" if SH_MPC1211 || SH_SH03
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hex "Physical memory size"
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default "0x00400000"
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help
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This sets the default memory size assumed by your SH kernel. It can
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be overridden as normal by the 'mem=' argument on the kernel command
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@ -376,21 +256,6 @@ config MEMORY_SIZE
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as 0x00400000 which was the default value before this became
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configurable.
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config MEMORY_SET
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bool
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depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705)
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default y
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help
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This is an option about which you will never be asked a question.
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Therefore, I conclude that you do not exist - go away.
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There is a grue here.
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# If none of the above have set memory start/size, ask the user.
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config MEMORY_OVERRIDE
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bool "Override default load address and memory size"
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# XXX: break these out into the board-specific configs below
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config CF_ENABLER
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bool "Compact Flash Enabler support"
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depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
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@ -434,10 +299,21 @@ config CF_BASE_ADDR
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default "0xb8000000" if CF_AREA6
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default "0xb4000000" if CF_AREA5
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menu "Processor features"
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config CPU_LITTLE_ENDIAN
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bool "Little Endian"
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help
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Some SuperH machines can be configured for either little or big
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endian byte order. These modes require different kernels. Say Y if
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your machine is little endian, N if it's a big endian machine.
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# The SH7750 RTC module is disabled in the Dreamcast
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config SH_RTC
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bool
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depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE
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depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && \
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!SH_73180_SOLUTION_ENGINE && !SH_LANDISK && \
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!SH_R7780RP
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default y
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help
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||||
Selecting this option will allow the Linux kernel to emulate
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@ -476,98 +352,6 @@ config SH_ADC
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||||
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||||
If unsure, say N.
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||||
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config SH_HP600
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bool
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depends on SH_HP620 || SH_HP680 || SH_HP690
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default y
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config CPU_SUBTYPE_ST40
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bool
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depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1
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default y
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source "mm/Kconfig"
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config ZERO_PAGE_OFFSET
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hex "Zero page offset"
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default "0x00001000" if !(SH_MPC1211 || SH_SH03)
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default "0x00004000" if SH_MPC1211 || SH_SH03
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||||
help
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||||
This sets the default offset of zero page.
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|
||||
# XXX: needs to lose subtype for system type
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config ST40_LMI_MEMORY
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bool "Memory on LMI"
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depends on CPU_SUBTYPE_ST40STB1
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config MEMORY_START
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hex
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depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
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default "0x08000000"
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||||
config MEMORY_SIZE
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hex
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depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
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||||
default "0x00400000"
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config MEMORY_SET
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bool
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depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
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default y
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||||
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||||
config BOOT_LINK_OFFSET
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hex "Link address offset for booting"
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default "0x00800000"
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||||
help
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||||
This option allows you to set the link address offset of the zImage.
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||||
This can be useful if you are on a board which has a small amount of
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memory.
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||||
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||||
config CPU_LITTLE_ENDIAN
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||||
bool "Little Endian"
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||||
help
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||||
Some SuperH machines can be configured for either little or big
|
||||
endian byte order. These modes require different kernels. Say Y if
|
||||
your machine is little endian, N if it's a big endian machine.
|
||||
|
||||
config PREEMPT
|
||||
bool "Preemptible Kernel (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
|
||||
config UBC_WAKEUP
|
||||
bool "Wakeup UBC on startup"
|
||||
help
|
||||
Selecting this option will wakeup the User Break Controller (UBC) on
|
||||
startup. Although the UBC is left in an awake state when the processor
|
||||
comes up, some boot loaders misbehave by putting the UBC to sleep in a
|
||||
power saving state, which causes issues with things like ptrace().
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config SH_WRITETHROUGH
|
||||
bool "Use write-through caching"
|
||||
default y if CPU_SH2
|
||||
help
|
||||
Selecting this option will configure the caches in write-through
|
||||
mode, as opposed to the default write-back configuration.
|
||||
|
||||
Since there's sill some aliasing issues on SH-4, this option will
|
||||
unfortunately still require the majority of flushing functions to
|
||||
be implemented to deal with aliasing.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config SH_OCRAM
|
||||
bool "Operand Cache RAM (OCRAM) support"
|
||||
help
|
||||
Selecting this option will automatically tear down the number of
|
||||
sets in the dcache by half, which in turn exposes a memory range.
|
||||
|
||||
The addresses for the OC RAM base will vary according to the
|
||||
processor version. Consult vendor documentation for specifics.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config SH_STORE_QUEUES
|
||||
bool "Support for Store Queues"
|
||||
depends on CPU_SH4
|
||||
@ -575,6 +359,125 @@ config SH_STORE_QUEUES
|
||||
Selecting this option will enable an in-kernel API for manipulating
|
||||
the store queues integrated in the SH-4 processors.
|
||||
|
||||
config CPU_HAS_INTEVT
|
||||
bool
|
||||
|
||||
config CPU_HAS_PINT_IRQ
|
||||
bool
|
||||
|
||||
config CPU_HAS_INTC2_IRQ
|
||||
bool
|
||||
|
||||
config CPU_HAS_SR_RB
|
||||
bool "CPU has SR.RB"
|
||||
depends on CPU_SH3 || CPU_SH4
|
||||
default y
|
||||
help
|
||||
This will enable the use of SR.RB register bank usage. Processors
|
||||
that are lacking this bit must have another method in place for
|
||||
accomplishing what is taken care of by the banked registers.
|
||||
|
||||
See <file:Documentation/sh/register-banks.txt> for further
|
||||
information on SR.RB and register banking in the kernel in general.
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Timer support"
|
||||
|
||||
config SH_TMU
|
||||
bool "TMU timer support"
|
||||
default y
|
||||
help
|
||||
This enables the use of the TMU as the system timer.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
|
||||
|
||||
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
|
||||
|
||||
config SH_PCLK_FREQ_BOOL
|
||||
bool "Set default pclk frequency"
|
||||
default y if !SH_RTC
|
||||
default n
|
||||
|
||||
config SH_PCLK_FREQ
|
||||
int "Peripheral clock frequency (in Hz)"
|
||||
depends on SH_PCLK_FREQ_BOOL
|
||||
default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
|
||||
default "60000000" if CPU_SUBTYPE_SH7751
|
||||
default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7760
|
||||
default "27000000" if CPU_SUBTYPE_SH73180
|
||||
default "66000000" if CPU_SUBTYPE_SH4_202
|
||||
help
|
||||
This option is used to specify the peripheral clock frequency.
|
||||
This is necessary for determining the reference clock value on
|
||||
platforms lacking an RTC.
|
||||
|
||||
menu "CPU Frequency scaling"
|
||||
|
||||
source "drivers/cpufreq/Kconfig"
|
||||
|
||||
config SH_CPU_FREQ
|
||||
tristate "SuperH CPU Frequency driver"
|
||||
depends on CPU_FREQ
|
||||
select CPU_FREQ_TABLE
|
||||
help
|
||||
This adds the cpufreq driver for SuperH. At present, only
|
||||
the SH-4 is supported.
|
||||
|
||||
For details, take a look at <file:Documentation/cpu-freq>.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/sh/drivers/dma/Kconfig"
|
||||
|
||||
source "arch/sh/cchips/Kconfig"
|
||||
|
||||
config HEARTBEAT
|
||||
bool "Heartbeat LED"
|
||||
depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || \
|
||||
SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || \
|
||||
SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
|
||||
SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
|
||||
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
|
||||
help
|
||||
Use the power-on LED on your machine as a load meter. The exact
|
||||
behavior is platform-dependent, but normally the flash frequency is
|
||||
a hyperbolic function of the 5-minute load average.
|
||||
|
||||
endmenu
|
||||
|
||||
config ISA_DMA_API
|
||||
bool
|
||||
depends on MPC1211
|
||||
default y
|
||||
|
||||
menu "Kernel features"
|
||||
|
||||
config KEXEC
|
||||
bool "kexec system call (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
help
|
||||
kexec is a system call that implements the ability to shutdown your
|
||||
current kernel, and to start another kernel. It is like a reboot
|
||||
but it is indepedent of the system firmware. And like a reboot
|
||||
you can start any kernel with it, not just Linux.
|
||||
|
||||
The name comes from the similiarity to the exec system call.
|
||||
|
||||
It is an ongoing process to be certain the hardware in a machine
|
||||
is properly shutdown, so do not be surprised if this code does not
|
||||
initially work for you. It may help to enable device hotplugging
|
||||
support. As of this writing the exact hardware interface is
|
||||
strongly in flux, so no good recommendation can be made.
|
||||
|
||||
config PREEMPT
|
||||
bool "Preemptible Kernel (EXPERIMENTAL)"
|
||||
depends on EXPERIMENTAL
|
||||
|
||||
config SMP
|
||||
bool "Symmetric multi-processing support"
|
||||
---help---
|
||||
@ -610,87 +513,58 @@ config NR_CPUS
|
||||
This is purely to save memory - each supported CPU adds
|
||||
approximately eight kilobytes to the kernel image.
|
||||
|
||||
config HS7751RVOIP_CODEC
|
||||
bool "Support VoIP Codec section"
|
||||
depends on SH_HS7751RVOIP
|
||||
help
|
||||
Selecting this option will support CODEC section.
|
||||
|
||||
config RTS7751R2D_REV11
|
||||
bool "RTS7751R2D Rev. 1.1 board support"
|
||||
depends on SH_RTS7751R2D
|
||||
help
|
||||
Selecting this option will support version rev. 1.1.
|
||||
|
||||
config SH_PCLK_CALC
|
||||
bool
|
||||
default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180
|
||||
config CPU_HAS_SR_RB
|
||||
bool "CPU has SR.RB"
|
||||
depends on CPU_SH3 || CPU_SH4
|
||||
default y
|
||||
help
|
||||
This option will cause the PCLK value to be probed at run-time. It
|
||||
will display a notification if the probed value has greater than a
|
||||
1% variance of the hardcoded CONFIG_SH_PCLK_FREQ.
|
||||
This will enable the use of SR.RB register bank usage. Processors
|
||||
that are lacking this bit must have another method in place for
|
||||
accomplishing what is taken care of by the banked registers.
|
||||
|
||||
config SH_PCLK_FREQ
|
||||
int "Peripheral clock frequency (in Hz)"
|
||||
default "50000000" if CPU_SUBTYPE_SH7750
|
||||
default "60000000" if CPU_SUBTYPE_SH7751
|
||||
default "33333333" if CPU_SUBTYPE_SH7300
|
||||
default "27000000" if CPU_SUBTYPE_SH73180
|
||||
default "66000000" if CPU_SUBTYPE_SH4_202
|
||||
default "1193182"
|
||||
See <file:Documentation/sh/register-banks.txt> for further
|
||||
information on SR.RB and register banking in the kernel in general.
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Boot options"
|
||||
|
||||
config ZERO_PAGE_OFFSET
|
||||
hex "Zero page offset"
|
||||
default "0x00004000" if SH_MPC1211 || SH_SH03
|
||||
default "0x00001000"
|
||||
help
|
||||
This option is used to specify the peripheral clock frequency. This
|
||||
option must be set for each processor in order for the kernel to
|
||||
function reliably. If no sane default exists, we use a default from
|
||||
the legacy i8254. Any discrepancies will be reported on boot time
|
||||
with an auto-probed frequency which should be considered the proper
|
||||
value for your hardware.
|
||||
This sets the default offset of zero page.
|
||||
|
||||
menu "CPU Frequency scaling"
|
||||
|
||||
source "drivers/cpufreq/Kconfig"
|
||||
|
||||
config SH_CPU_FREQ
|
||||
tristate "SuperH CPU Frequency driver"
|
||||
depends on CPU_FREQ
|
||||
select CPU_FREQ_TABLE
|
||||
config BOOT_LINK_OFFSET
|
||||
hex "Link address offset for booting"
|
||||
default "0x00800000"
|
||||
help
|
||||
This adds the cpufreq driver for SuperH. At present, only
|
||||
the SH-4 is supported.
|
||||
This option allows you to set the link address offset of the zImage.
|
||||
This can be useful if you are on a board which has a small amount of
|
||||
memory.
|
||||
|
||||
For details, take a look at <file:Documentation/cpu-freq>.
|
||||
config UBC_WAKEUP
|
||||
bool "Wakeup UBC on startup"
|
||||
help
|
||||
Selecting this option will wakeup the User Break Controller (UBC) on
|
||||
startup. Although the UBC is left in an awake state when the processor
|
||||
comes up, some boot loaders misbehave by putting the UBC to sleep in a
|
||||
power saving state, which causes issues with things like ptrace().
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
endmenu
|
||||
config CMDLINE_BOOL
|
||||
bool "Default bootloader kernel arguments"
|
||||
|
||||
source "arch/sh/drivers/dma/Kconfig"
|
||||
|
||||
source "arch/sh/cchips/Kconfig"
|
||||
|
||||
config HEARTBEAT
|
||||
bool "Heartbeat LED"
|
||||
depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV
|
||||
help
|
||||
Use the power-on LED on your machine as a load meter. The exact
|
||||
behavior is platform-dependent, but normally the flash frequency is
|
||||
a hyperbolic function of the 5-minute load average.
|
||||
|
||||
config RTC_9701JE
|
||||
tristate "EPSON RTC-9701JE support"
|
||||
depends on SH_RTS7751R2D
|
||||
help
|
||||
Selecting this option will support EPSON RTC-9701JE.
|
||||
config CMDLINE
|
||||
string "Initial kernel command string"
|
||||
depends on CMDLINE_BOOL
|
||||
default "console=ttySC1,115200"
|
||||
|
||||
endmenu
|
||||
|
||||
config ISA_DMA_API
|
||||
bool
|
||||
depends on MPC1211
|
||||
default y
|
||||
|
||||
menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
|
||||
menu "Bus options"
|
||||
|
||||
# Even on SuperH devices which don't have an ISA bus,
|
||||
# this variable helps the PCMCIA modules handle
|
||||
@ -701,7 +575,7 @@ menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
|
||||
# PCMCIA outright. -- PFM.
|
||||
config ISA
|
||||
bool
|
||||
default y if PCMCIA || SMC91X
|
||||
default y if PCMCIA
|
||||
help
|
||||
Find out whether you have ISA slots on your motherboard. ISA is the
|
||||
name of a bus system, i.e. the way the CPU talks to the other stuff
|
||||
@ -735,10 +609,9 @@ config MCA
|
||||
config SBUS
|
||||
bool
|
||||
|
||||
config MAPLE
|
||||
tristate "Maple Bus support"
|
||||
depends on SH_DREAMCAST
|
||||
default y
|
||||
config SUPERHYWAY
|
||||
tristate "SuperHyway Bus support"
|
||||
depends on CPU_SUBTYPE_SH4_202
|
||||
|
||||
source "arch/sh/drivers/pci/Kconfig"
|
||||
|
||||
|
@ -17,7 +17,7 @@ config SH_STANDARD_BIOS
|
||||
|
||||
config EARLY_SCIF_CONSOLE
|
||||
bool "Use early SCIF console"
|
||||
depends on CPU_SH4
|
||||
depends on CPU_SH4 || CPU_SH2A && !SH_STANDARD_BIOS
|
||||
|
||||
config EARLY_PRINTK
|
||||
bool "Early printk support"
|
||||
|
@ -17,10 +17,30 @@
|
||||
cflags-y := -mb
|
||||
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
|
||||
|
||||
isa-y := any
|
||||
isa-$(CONFIG_CPU_SH2) := sh2
|
||||
isa-$(CONFIG_CPU_SH3) := sh3
|
||||
isa-$(CONFIG_CPU_SH4) := sh4
|
||||
isa-$(CONFIG_CPU_SH4A) := sh4a
|
||||
isa-$(CONFIG_CPU_SH2A) := sh2a
|
||||
|
||||
isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
|
||||
|
||||
ifndef CONFIG_MMU
|
||||
isa-y := $(isa-y)-nommu
|
||||
endif
|
||||
|
||||
ifndef CONFIG_SH_FPU
|
||||
isa-y := $(isa-y)-nofpu
|
||||
endif
|
||||
|
||||
cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
|
||||
|
||||
cflags-$(CONFIG_CPU_SH2) += -m2
|
||||
cflags-$(CONFIG_CPU_SH3) += -m3
|
||||
cflags-$(CONFIG_CPU_SH4) += -m4 \
|
||||
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
|
||||
cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a-nofpu,)
|
||||
|
||||
cflags-$(CONFIG_SH_DSP) += -Wa,-dsp
|
||||
cflags-$(CONFIG_SH_KGDB) += -g
|
||||
@ -67,9 +87,7 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
|
||||
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
|
||||
machdir-$(CONFIG_SH_STB1_HARP) := harp
|
||||
machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
|
||||
machdir-$(CONFIG_SH_HP620) := hp6xx/hp620
|
||||
machdir-$(CONFIG_SH_HP680) := hp6xx/hp680
|
||||
machdir-$(CONFIG_SH_HP690) := hp6xx/hp690
|
||||
machdir-$(CONFIG_SH_HP6XX) := hp6xx
|
||||
machdir-$(CONFIG_SH_CQREEK) := cqreek
|
||||
machdir-$(CONFIG_SH_DMIDA) := dmida
|
||||
machdir-$(CONFIG_SH_EC3104) := ec3104
|
||||
@ -119,31 +137,39 @@ boot := arch/sh/boot
|
||||
|
||||
CPPFLAGS_vmlinux.lds := -traditional
|
||||
|
||||
ifneq ($(KBUILD_SRC),)
|
||||
incdir-prefix := $(srctree)/include/asm-sh/
|
||||
else
|
||||
incdir-prefix :=
|
||||
endif
|
||||
|
||||
# Update machine arch and proc symlinks if something which affects
|
||||
# them changed. We use .arch and .mach to indicate when they were
|
||||
# updated last, otherwise make uses the target directory mtime.
|
||||
|
||||
include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER
|
||||
@echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)'
|
||||
ifneq ($(KBUILD_SRC),)
|
||||
$(Q)mkdir -p include/asm-sh
|
||||
$(Q)ln -fsn $(srctree)/include/asm-sh/$(cpuincdir-y) include/asm-sh/cpu
|
||||
else
|
||||
$(Q)ln -fsn $(cpuincdir-y) include/asm-sh/cpu
|
||||
endif
|
||||
$(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
|
||||
$(Q)ln -fsn $(incdir-prefix)$(cpuincdir-y) include/asm-sh/cpu
|
||||
@touch $@
|
||||
|
||||
# Most boards have their own mach directories. For the ones that
|
||||
# don't, just reference the parent directory so the semantics are
|
||||
# kept roughly the same.
|
||||
|
||||
include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER
|
||||
@echo ' SYMLINK include/asm-sh/mach -> include/asm-sh/$(incdir-y)'
|
||||
ifneq ($(KBUILD_SRC),)
|
||||
$(Q)mkdir -p include/asm-sh
|
||||
$(Q)ln -fsn $(srctree)/include/asm-sh/$(incdir-y) include/asm-sh/mach
|
||||
else
|
||||
$(Q)ln -fsn $(incdir-y) include/asm-sh/mach
|
||||
endif
|
||||
@echo -n ' SYMLINK include/asm-sh/mach -> '
|
||||
$(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
|
||||
$(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \
|
||||
echo -e 'include/asm-sh/$(incdir-y)'; \
|
||||
ln -fsn $(incdir-prefix)$(incdir-y) \
|
||||
include/asm-sh/mach; \
|
||||
else \
|
||||
echo -e 'include/asm-sh'; \
|
||||
ln -fsn $(incdir-prefix) include/asm-sh/mach; \
|
||||
fi
|
||||
@touch $@
|
||||
|
||||
|
||||
archprepare: maketools include/asm-sh/.cpu include/asm-sh/.mach
|
||||
|
||||
.PHONY: maketools FORCE
|
||||
|
233
arch/sh/mm/Kconfig
Normal file
233
arch/sh/mm/Kconfig
Normal file
@ -0,0 +1,233 @@
|
||||
menu "Processor selection"
|
||||
|
||||
#
|
||||
# Processor families
|
||||
#
|
||||
config CPU_SH2
|
||||
bool
|
||||
select SH_WRITETHROUGH
|
||||
|
||||
config CPU_SH3
|
||||
bool
|
||||
select CPU_HAS_INTEVT
|
||||
select CPU_HAS_SR_RB
|
||||
|
||||
config CPU_SH4
|
||||
bool
|
||||
select CPU_HAS_INTEVT
|
||||
select CPU_HAS_SR_RB
|
||||
|
||||
config CPU_SH4A
|
||||
bool
|
||||
select CPU_SH4
|
||||
select CPU_HAS_INTC2_IRQ
|
||||
|
||||
config CPU_SUBTYPE_ST40
|
||||
bool
|
||||
select CPU_SH4
|
||||
select CPU_HAS_INTC2_IRQ
|
||||
|
||||
#
|
||||
# Processor subtypes
|
||||
#
|
||||
|
||||
comment "SH-2 Processor Support"
|
||||
|
||||
config CPU_SUBTYPE_SH7604
|
||||
bool "Support SH7604 processor"
|
||||
select CPU_SH2
|
||||
|
||||
comment "SH-3 Processor Support"
|
||||
|
||||
config CPU_SUBTYPE_SH7300
|
||||
bool "Support SH7300 processor"
|
||||
select CPU_SH3
|
||||
|
||||
config CPU_SUBTYPE_SH7705
|
||||
bool "Support SH7705 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_PINT_IRQ
|
||||
|
||||
config CPU_SUBTYPE_SH7707
|
||||
bool "Support SH7707 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_PINT_IRQ
|
||||
help
|
||||
Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7708
|
||||
bool "Support SH7708 processor"
|
||||
select CPU_SH3
|
||||
help
|
||||
Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
|
||||
if you have a 100 Mhz SH-3 HD6417708R CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7709
|
||||
bool "Support SH7709 processor"
|
||||
select CPU_SH3
|
||||
select CPU_HAS_PINT_IRQ
|
||||
help
|
||||
Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
|
||||
|
||||
comment "SH-4 Processor Support"
|
||||
|
||||
config CPU_SUBTYPE_SH7750
|
||||
bool "Support SH7750 processor"
|
||||
select CPU_SH4
|
||||
help
|
||||
Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7091
|
||||
bool "Support SH7091 processor"
|
||||
select CPU_SH4
|
||||
select CPU_SUBTYPE_SH7750
|
||||
help
|
||||
Select SH7091 if you have an SH-4 based Sega device (such as
|
||||
the Dreamcast, Naomi, and Naomi 2).
|
||||
|
||||
config CPU_SUBTYPE_SH7750R
|
||||
bool "Support SH7750R processor"
|
||||
select CPU_SH4
|
||||
select CPU_SUBTYPE_SH7750
|
||||
|
||||
config CPU_SUBTYPE_SH7750S
|
||||
bool "Support SH7750S processor"
|
||||
select CPU_SH4
|
||||
select CPU_SUBTYPE_SH7750
|
||||
|
||||
config CPU_SUBTYPE_SH7751
|
||||
bool "Support SH7751 processor"
|
||||
select CPU_SH4
|
||||
help
|
||||
Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
|
||||
or if you have a HD6417751R CPU.
|
||||
|
||||
config CPU_SUBTYPE_SH7751R
|
||||
bool "Support SH7751R processor"
|
||||
select CPU_SH4
|
||||
select CPU_SUBTYPE_SH7751
|
||||
|
||||
config CPU_SUBTYPE_SH7760
|
||||
bool "Support SH7760 processor"
|
||||
select CPU_SH4
|
||||
select CPU_HAS_INTC2_IRQ
|
||||
|
||||
config CPU_SUBTYPE_SH4_202
|
||||
bool "Support SH4-202 processor"
|
||||
select CPU_SH4
|
||||
|
||||
comment "ST40 Processor Support"
|
||||
|
||||
config CPU_SUBTYPE_ST40STB1
|
||||
bool "Support ST40STB1/ST40RA processors"
|
||||
select CPU_SUBTYPE_ST40
|
||||
help
|
||||
Select ST40STB1 if you have a ST40RA CPU.
|
||||
This was previously called the ST40STB1, hence the option name.
|
||||
|
||||
config CPU_SUBTYPE_ST40GX1
|
||||
bool "Support ST40GX1 processor"
|
||||
select CPU_SUBTYPE_ST40
|
||||
help
|
||||
Select ST40GX1 if you have a ST40GX1 CPU.
|
||||
|
||||
comment "SH-4A Processor Support"
|
||||
|
||||
config CPU_SUBTYPE_SH73180
|
||||
bool "Support SH73180 processor"
|
||||
select CPU_SH4A
|
||||
|
||||
config CPU_SUBTYPE_SH7770
|
||||
bool "Support SH7770 processor"
|
||||
select CPU_SH4A
|
||||
|
||||
config CPU_SUBTYPE_SH7780
|
||||
bool "Support SH7780 processor"
|
||||
select CPU_SH4A
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Memory management options"
|
||||
|
||||
config MMU
|
||||
bool "Support for memory management hardware"
|
||||
depends on !CPU_SH2
|
||||
default y
|
||||
help
|
||||
Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
|
||||
boot on these systems, this option must not be set.
|
||||
|
||||
On other systems (such as the SH-3 and 4) where an MMU exists,
|
||||
turning this off will boot the kernel on these machines with the
|
||||
MMU implicitly switched off.
|
||||
|
||||
config 32BIT
|
||||
bool "Support 32-bit physical addressing through PMB"
|
||||
depends on CPU_SH4A
|
||||
default y
|
||||
help
|
||||
If you say Y here, physical addressing will be extended to
|
||||
32-bits through the SH-4A PMB. If this is not set, legacy
|
||||
29-bit physical addressing will be used.
|
||||
|
||||
choice
|
||||
prompt "HugeTLB page size"
|
||||
depends on HUGETLB_PAGE && CPU_SH4 && MMU
|
||||
default HUGETLB_PAGE_SIZE_64K
|
||||
|
||||
config HUGETLB_PAGE_SIZE_64K
|
||||
bool "64K"
|
||||
|
||||
config HUGETLB_PAGE_SIZE_1MB
|
||||
bool "1MB"
|
||||
|
||||
endchoice
|
||||
|
||||
source "mm/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Cache configuration"
|
||||
|
||||
config SH7705_CACHE_32KB
|
||||
bool "Enable 32KB cache size for SH7705"
|
||||
depends on CPU_SUBTYPE_SH7705
|
||||
default y
|
||||
|
||||
config SH_DIRECT_MAPPED
|
||||
bool "Use direct-mapped caching"
|
||||
default n
|
||||
help
|
||||
Selecting this option will configure the caches to be direct-mapped,
|
||||
even if the cache supports a 2 or 4-way mode. This is useful primarily
|
||||
for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
|
||||
SH4-202, SH4-501, etc.)
|
||||
|
||||
Turn this option off for platforms that do not have a direct-mapped
|
||||
cache, and you have no need to run the caches in such a configuration.
|
||||
|
||||
config SH_WRITETHROUGH
|
||||
bool "Use write-through caching"
|
||||
default y if CPU_SH2
|
||||
help
|
||||
Selecting this option will configure the caches in write-through
|
||||
mode, as opposed to the default write-back configuration.
|
||||
|
||||
Since there's sill some aliasing issues on SH-4, this option will
|
||||
unfortunately still require the majority of flushing functions to
|
||||
be implemented to deal with aliasing.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
config SH_OCRAM
|
||||
bool "Operand Cache RAM (OCRAM) support"
|
||||
help
|
||||
Selecting this option will automatically tear down the number of
|
||||
sets in the dcache by half, which in turn exposes a memory range.
|
||||
|
||||
The addresses for the OC RAM base will vary according to the
|
||||
processor version. Consult vendor documentation for specifics.
|
||||
|
||||
If unsure, say N.
|
||||
|
||||
endmenu
|
Loading…
Reference in New Issue
Block a user