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https://github.com/joel16/android_kernel_sony_msm8994.git
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[PATCH] sky2: handle all error irqs
The hardware has additional error trap interrupt bits. I have never seen them trigger, but if they do, it looks like this might be useful. Signed-off-by: Stephen Hemminger <shemminger@osdl.rog> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -2066,6 +2066,27 @@ static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
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}
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}
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/* This should never happen it is a fatal situation */
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static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port,
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const char *rxtx, u32 mask)
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{
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struct net_device *dev = hw->dev[port];
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struct sky2_port *sky2 = netdev_priv(dev);
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u32 imask;
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printk(KERN_ERR PFX "%s: %s descriptor error (hardware problem)\n",
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dev ? dev->name : "<not registered>", rxtx);
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imask = sky2_read32(hw, B0_IMSK);
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imask &= ~mask;
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sky2_write32(hw, B0_IMSK, imask);
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if (dev) {
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spin_lock(&sky2->phy_lock);
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sky2_link_down(sky2);
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spin_unlock(&sky2->phy_lock);
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}
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}
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static int sky2_poll(struct net_device *dev0, int *budget)
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{
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@ -2074,6 +2095,7 @@ static int sky2_poll(struct net_device *dev0, int *budget)
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int work_done = 0;
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u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
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if (unlikely(status & ~Y2_IS_STAT_BMU)) {
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if (status & Y2_IS_HW_ERR)
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sky2_hw_intr(hw);
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@ -2089,6 +2111,19 @@ static int sky2_poll(struct net_device *dev0, int *budget)
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if (status & Y2_IS_IRQ_MAC2)
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sky2_mac_intr(hw, 1);
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if (status & Y2_IS_CHK_RX1)
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sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1);
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if (status & Y2_IS_CHK_RX2)
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sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2);
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if (status & Y2_IS_CHK_TXA1)
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sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1);
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if (status & Y2_IS_CHK_TXA2)
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sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2);
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}
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if (status & Y2_IS_STAT_BMU) {
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work_done = sky2_status_intr(hw, work_limit);
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*budget -= work_done;
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@ -279,8 +279,10 @@ enum {
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Y2_IS_CHK_TXA1 = 1<<0, /* Descriptor error TXA 1 */
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Y2_IS_BASE = Y2_IS_HW_ERR | Y2_IS_STAT_BMU,
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Y2_IS_PORT_1 = Y2_IS_IRQ_PHY1 | Y2_IS_IRQ_MAC1,
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Y2_IS_PORT_2 = Y2_IS_IRQ_PHY2 | Y2_IS_IRQ_MAC2,
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Y2_IS_PORT_1 = Y2_IS_IRQ_PHY1 | Y2_IS_IRQ_MAC1
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| Y2_IS_CHK_TXA1 | Y2_IS_CHK_RX1,
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Y2_IS_PORT_2 = Y2_IS_IRQ_PHY2 | Y2_IS_IRQ_MAC2
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| Y2_IS_CHK_TXA2 | Y2_IS_CHK_RX2,
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};
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/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
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