The APID/PPID mapping data is stored in the device tree and allows the
PMIC Arbiter driver to map the 8-bit hardware identifiers back to the
12-bit identifiers (slave id + peripheral id). This mapping data is
subject to change (and does change for different targets) and therefore
adds maintenance overhead. The same information can be determined at
run-time by using the PMIC Arbiter mapping table to determine the APID
from the PPID at the time that interrupts are being registered.
Therefore, add support to read from the PMIC Arbiter hardware mapping
table.
Change-Id: I72c84a7503f640bc4a9ea7e2dfffb31e472b8a6b
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
It is considered a bug to insert into a radix tree with
preemption enabled. Use radix_tree_preload() to preload resources
for the radix tree and disable preemption.
Change-Id: If518ebfc78630a72e35b6fbd71f4ff9119dc8b0b
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Improve readability and maintainability of the PMIC-arbiter
driver, by reading platform memory resources from device tree
by name rather then by index.
Change-Id: I10651e474210f0859d517d2b60fa04acdf77c9a4
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Add user space interface to the SPMI kernel framework that enables
master-read and master-write transactions.
Each SPMI controller is represented as a file under the root directory
of SPMI debug-fs. For each controller, 'address', 'count', and 'data'
files are added. The user may configure the transaction via the
respective files and invoke a master read transaction by reading from
the 'data' file, and a master write transaction by writing a string of
decimal or hexadecimal byte size values to the 'data' file.
Change-Id: I3e760be7796bfb9aa15c8ab758ff616a72240176
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Add a new device tree binding: qcom,not-wakeup, which can be used
to indicate that PMIC interrupts should not be treated as
wakeable. If this property is not present, then
irq_set_irq_wake() will be called. If it is present then
irq_set_irq_wake() will not be called.
This feature is convenient for bringup situations because it
breaks the dependency between spmi-pmic-arb and the MSM MPM
driver.
Change-Id: I44ac1221d92e13b4f9ab19571e95aa21d7ea10c2
Signed-off-by: David Collins <collinsd@codeaurora.org>
Remove the following line from gpio and spmi Kconfig files:
depends on ARCH_MSM8974
This line is not needed because it enforces a dependency which
does not exist. Targets other than MSM8974 support qpnp-gpio
and qpnp-int.
Change-Id: I38a6d69db5298107b09c0b84696d899ddbf9814a
Signed-off-by: David Collins <collinsd@codeaurora.org>
Set the PMIC Arbiter as a wakeup interrupt in order to enable PMIC
peripherals (i.e. PON) to serve as wakeup interrupts.
Change-Id: I02738ab0fbdd953b73b3f043e35804882a19a92a
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
The irq framework already supports wakeup interrupts. We just
need to provide a dummy irq_set_wake so the framework does not
return an error. Also specify the MASK_ON_SUSPEND flag so that
non-wake interrupts are masked on suspend.
Change-Id: I7fa5717d79467e22647606c3ee93373a2bffc547
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Bug fix for reading and writing multiple bytes. The bug causes holes
in the first 4 bytes when the byte count = 4, 5, or 6. Additionally,
on attempt to write more then the PMIC-arbiter supports, an error
message is logged and error value is returned. The SPMI framework
allows up to 16 byte per transfer, as supported by SPMI spec. However,
the PMIC arbiter supports up to 8 bytes per transfer.
Change-Id: I5c192fc22af51b1c61ed8ce31b75261cb8ad49ce
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
The official name for copper is MSM8974.
Switch to it.
Change-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
The devnode array is currently being used for non
spmi-dev-container devices as a special case where the number of
devnodes is 1. This obfuscates the code and also removes the
ability to store the dev-container's device resource information,
since in that special case the devnode array is dedicated for the
child devices.
Add a new spmi_resource entry used for typical spmi_devices, and
treat the devnode array as the special case for
spmi-dev-container.
Also add a new API spmi_get_primary_dev_name() to return the name
of the device assigned with the 'label' binding if it exists.
Change-Id: Ibe7b12285e37bb0529024558550a96d71393bc10
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since we support multiple device_nodes per spmi_device when used
with the spmi-dev-container flag, it's often unclear how a driver
should make reference to a particular device. Therefore,
introduce the spmi specific binding spmi-dev-name that specifies
the device name for the device_node.
Also introduce an API that can be used from
the driver to lookup the specific device node associated with a
particular device name.
Note that it may seem at first glance that the binding 'label' is
redundant with device_node->name. However, per the ePAPR,
device_node->name is intended to be as generic as possible,
representing the function of the device and not the precise
programming model. 'label' is used to give a platform
specific name that can be queried from device drivers.
Change-Id: I28eca35d0b625372c26a6d8ad81e7679f200d14b
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
reg-names and interrupt-names are standard bindings to map device
tree reg and interrupt indices to particular names. This way the
driver does not need to be concerned with hard coded assignments.
Therefore, add spmi support for these bindings.
Explicit support for reg-names is required since the
implementation does not make use of of_address_to_resource(),
which happens to already support this.
This is because of_address_to_resource() mandates address
translation, which is not relevant to spmi.
interrupt-names is already implicitly handled by
of_irq_to_resource(), which is used in the spmi implementation.
Add additional documentation to state clearly that this binding
is also supported.
Also add supporting routines to easily lookup a resource by name
for both registers and interrupts.
Change-Id: I94faf950da5106ecd4ff36f47e5b46102d9bd426
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Pointers are more flexible than index numbers, since index
numbers depend upon an additional reference to the array in
question. In particular, we'd like to add a new API to lookup a
devnode based on a predefined name in the Device Tree. This API
will return a spmi_resource, and so it's natural to want to use
this pointer directly with the other existing APIs.
Also introduce a new API spmi_for_each_devnode that can be used
to iterate each spmi_resource in the dev_node array. This
abstracts the traversal of the array, which was previously done
within the existing APIs.
Change-Id: I18f9397e5d78770e840a9f95dd8061201931df6e
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
It turns out that the only use cases for the qpnp library use
the existing spmi data structures. As such, there's really
no justification for having the library not be called 'spmi'.
There is nothing Qualcomm specific about this code.
Also cleanup some inconsistencies in the Kernel Doc comments
while we're here.
Change-Id: I1c73c88be740b6f5d38ba2de62de1737981b30fa
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Fix a bug where the code neglects to set the INT_POLARITY_LOW
register to the correct value for the case IRQF_TRIGGER_LOW.
It should be set with a '1' for the corresponding interrupt bit.
Change-Id: Ib05193633b0e7798f5e8ac4ddfb8744a67f8c546
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
The following merge commit chose the irq_domain implementation
from AU_LINUX_ANDROID_ICS.04.00.04.00.126 instead of the version
in v3.4.
commit f132c6cf77251e011e1dad0ec88c0b1fda16d5aa
Merge: 23016de 3f6240f
Author: Steve Muckle <smuckle@codeaurora.org>
Date: Wed Jun 6 18:30:57 2012 -0700
Merge commit 'AU_LINUX_ANDROID_ICS.04.00.04.00.126' into
msm-3.4
Since this version is inconsistent with the upstream,
port the irq_domain framework to the version in v3.4 and
makes all necessary changes to clients that are out of spec.
Details of client ports are below.
-Update the qpnp-int driver for revmap irq_domain API. The revmap
irq_domain implementation introduces a reverse lookup scheme using
a radix tree. This scheme is useful for controllers like qpnp-int
that require a large range of hwirqs.
-Bring the ARM GIC driver up to v3.4, being careful
to port existing CAF changes.
-Partially port the gpio-msm-common driver to the new irq_domain API.
Enable the gpio-msm-common driver to work with the new irq_domain
API using a linear revmap. It is not a full port since irq_domain
is still only registered for Device Tree configurations. It should
be registered even for legacy configurations.
In addition, the irq_domains .map function should be setting all
the fields currently done in msm_gpio_probe(). That's not
currently possible since msm_gpio_probe is invoked
unconditionally - even from Device Tree configurations.
Finally, gpio-msm-common should be converted into a real
platform_device so that probe() is invoked due to driver and
device matching.
Change-Id: I19fa50171bd244759fb6076e3cddc70896d8727b
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
The GIC interrupt should not be firing when the arbiter interrupts
(peripheral interrupts) are disabled. So enabling/disabling the GIC
interrupt is not necessary. Remove those calls, and corresponding
reference counter logic.
Change-Id: Ice8d76ef255ec6c154c546dbd17807012558fe84
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
<linux/pm_runtime.h> should be included to fix any compilation errors
associated with enabling the PM_RUNTIME config.
Change-Id: Ided562e1351ccb5eef8957c305060275a5679d42
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
MSM_QPNP provides the qpnp_get_irq() API that is used by
client drivers using QPNP interrupts.
Change-Id: I4556b07a2c6b8dfeda860ebac57be6eb14f216b1
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
The spmi-dev-container binding is intended for SPMI
configurations that have multiple device nodes associated with
only one spmi_device. By default, if this flag is not specified,
each device node will create a new spmi_device.
Sometimes having multiple spmi_devices for SPMI device nodes is
superfluous. One example of this is gpios. In some architectures,
a single gpio is treated as a unique device. But from a gpio_chip
perspective, the chip is comprised of many gpios. Beyond wasting
memory allocating a unique spmi_device per gpio, the implication
of not coalescing spmi_devices is that the clients probe() routine
would be called N number of times. But this sort of behavior makes
it difficult to realize when a gpio_chip starts and stops. If we
assume that one gpio_chip represents one call to probe(), then
this problem is solved, since all gpios in that chip will be
passed as resources.
In order to support multiple device nodes per spmi_device, we
also need to extend the data structures for spmi_resources.
This change also makes an effort to cleanup some of the error
handling for illegal combinations of device bindings, as well as
adding some additional documentation.
Change-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
QPNP is a Qualcomm SPMI based implementation that specifies 256
devices per SPMI slave ID, with up to 8 interrupts per device.
This brings the theoretical max interrupt support to 32768 per
bus for this architecture.
This driver implements the standard irq chip interfaces to
support QPNP. The chip driver is informed of Device Tree
configuration through a notifier interface. Once informed of an
interrupt, it will allocate resources on the fly. In order to
support this large logical interrupt range, we require SPARSE_IRQ
to be enabled.
This driver supports Device Tree interrupt specs with a cell size
of three. These are comprised of the the slave ID, peripheral ID
and irq number.
Change-Id: Ic7847bafe6598a84ab3650df7c95bb605aefbe62
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
QPNP is a SPMI based PMIC architecture developed by Qualcomm.
This library constitutes routines that should be necessary for
most, if not all QPNP based devices. The goal is to minimize the
amount of code duplication.
Change-Id: I0fddfcef88416bba488480d790d1cf361d9e67ac
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
reduce memory by compressing two values into one 32 bit integer.
Change-Id: I7c0bf7007df082fac53c1138ba45f1ecf77b2f83
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and
is used to communication with one or more PMIC (slave) devices on the
SPMI bus. The PMIC Arbiter is actually a hardware wrapper around the
SPMI controller that provides concurrent and autonomous PMIC access
to various entities that need to communicate with the PMIC.
The SPMI controller hardware handles all of the SPMI bus activity (bus
arbitration, sequence start condition, transmission of frames, etc).
This software driver uses the PMIC Arbiter register interface to
initiate command sequences on the SPMI bus. The status register is
read to determine when the command sequence has completed and whether
or not it completed successfully.
Request Capable Slave (RCS) devices can initiate a master write
command sequence on the SPMI bus that the can be decoded by the
bus master and used to generate interrupts.
Change-Id: I037fefc946ccb5b8e0b04da856a3a96effe1c7e4
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
SPMI (System Power Management Interface) is a specification
developed by the MIPI (Mobile Industry Process Interface) Alliance
optimized for the real time control of Power Management ICs (PMIC).
SPMI is a two-wire serial interface that supports up to 4 master
devices and up to 16 logical slaves. A physical PMIC device may
consist of multiple logical slave interfaces.
The framework supports message APIs, multiple busses (1 controller
per bus) and multiple clients/slave devices per controller.
Change-Id: Ib6319047b4ab9cea6dfb0879312c4c1f63462439
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
