Request the BSI RX, TX and ERR interrupts using level high
triggering instead of rising edge triggering. If an interrupt
is edge triggered, then its interrupt handler will be called upon
enabling the interrupt if it physically triggered while it was
disabled in software. This leads to unexpected interrupt
handler calls in the qpnp-bsi driver when the following sequence
occurs: BIF transaction using interrupts (IRQs enabled), BIF
transaction using polling (IRQs disabled), BIF transaction to
enter interrupt mode bus state (IRQs enabled).
Switching the interrupts to use level triggering fixes the issue
because any interrupt physically triggered during a polling
transaction with the BSI interrupts disabled will be ignored by
the irq framework.
Change-Id: I57a6fb6f75af14970b5a186009ec506e240c151d
Signed-off-by: David Collins <collinsd@codeaurora.org>
Move functions calls which clear PMIC BSI hardware errors and
reset IRQ flags to immediately before BIF transmit calls. This
ensures that the BSI RX and TX blocks are in the correct state
before errors are cleared.
Change-Id: Id266f076968d48484a9366274d30e8ff6f47dc23
Signed-off-by: David Collins <collinsd@codeaurora.org>
When performing a BIF slave register read of a single register
there is no need to specify a burst read length of 1. All reads
are assumed to be of length 1 unless specified otherwise.
Therefore, remove the redundant RBL1 BIF bus command.
Change-Id: I000637a4bec5f6d2c9b48fa848c63779745b662a
Signed-off-by: David Collins <collinsd@codeaurora.org>
The value QPNP_BSI_MAX_TRANSMIT_CYCLES is used to define the
timeout interval when sending or receiving BIF data words.
The MIPI-BIF specification allows for some skew in the length
of bits received from a slave. A '1' can take up to 3.5 tau_bif
and a '0' can take up to 1.5 tau_bif. Therefore, the maximum word
transmission time can be calculated as follows.
max-transmission-time =
= n(1)_max * t(1)_max + (17 - n(1)_max) * t(0)_max + t(stop)_min
= 8 * 3.5 tau_bif + 9 * 1.5 tau_bif + 4.5 tau_bif
= 46 tau_bif
Change QPNP_BSI_MAX_TRANSMIT_CYCLES to 46 in order to match the
value calculated from the MIPI-BIF specification.
Change-Id: Ibb199b54c99cc2de29ae54f6f891a667a30213b2
Signed-off-by: David Collins <collinsd@codeaurora.org>
Disable the BSI PMIC peripheral when the bus state is changed
to master-disabled. This can be used to save power when no
smart battery pack is detect.
Change-Id: Ic0ce8c11153a6bfa32e4661bf8d791265ebf4f95
Signed-off-by: David Collins <collinsd@codeaurora.org>
Support multiple voltage ADC device instance. Clients
need to register with the voltage ADC using the device
consumer name used to associate with the corresponding
phandle of the VADC. Clients receive the device instance
which is to be used everytime an ADC request is made.
This change involves changing the interface to issue
ADC request and the corresponding clients changes.
Change-Id: If0557bc657fecd172a8cf960900ee93b4bce37f8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Add a BIF controller driver which is able to interact with the
BSI (battery serial interface) module found within QPNP compliant
PMIC devices.
Change-Id: I6d63da38e3e7e2b41ee29e75a861123ad3ce3c75
Signed-off-by: David Collins <collinsd@codeaurora.org>
